2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
7 * Author: Johan Palsson <johan.palsson@stericsson.com>
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/delay.h>
15 #include <linux/platform_device.h>
16 #include <linux/completion.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/err.h>
19 #include <linux/slab.h>
20 #include <linux/list.h>
21 #include <linux/mfd/ab8500.h>
22 #include <linux/mfd/abx500.h>
23 #include <linux/mfd/ab8500/ab8500-gpadc.h>
26 * GPADC register offsets
29 #define AB8500_GPADC_CTRL1_REG 0x00
30 #define AB8500_GPADC_CTRL2_REG 0x01
31 #define AB8500_GPADC_CTRL3_REG 0x02
32 #define AB8500_GPADC_AUTO_TIMER_REG 0x03
33 #define AB8500_GPADC_STAT_REG 0x04
34 #define AB8500_GPADC_MANDATAL_REG 0x05
35 #define AB8500_GPADC_MANDATAH_REG 0x06
36 #define AB8500_GPADC_AUTODATAL_REG 0x07
37 #define AB8500_GPADC_AUTODATAH_REG 0x08
38 #define AB8500_GPADC_MUX_CTRL_REG 0x09
41 * OTP register offsets
44 #define AB8500_GPADC_CAL_1 0x0F
45 #define AB8500_GPADC_CAL_2 0x10
46 #define AB8500_GPADC_CAL_3 0x11
47 #define AB8500_GPADC_CAL_4 0x12
48 #define AB8500_GPADC_CAL_5 0x13
49 #define AB8500_GPADC_CAL_6 0x14
50 #define AB8500_GPADC_CAL_7 0x15
53 #define EN_VINTCORE12 0x04
54 #define EN_VTVOUT 0x02
56 #define DIS_GPADC 0x00
57 #define SW_AVG_16 0x60
58 #define ADC_SW_CONV 0x04
61 #define GPADC_BUSY 0x01
63 /* GPADC constants from AB8500 spec, UM0836 */
64 #define ADC_RESOLUTION 1024
65 #define ADC_CH_BTEMP_MIN 0
66 #define ADC_CH_BTEMP_MAX 1350
67 #define ADC_CH_DIETEMP_MIN 0
68 #define ADC_CH_DIETEMP_MAX 1350
69 #define ADC_CH_CHG_V_MIN 0
70 #define ADC_CH_CHG_V_MAX 20030
71 #define ADC_CH_ACCDET2_MIN 0
72 #define ADC_CH_ACCDET2_MAX 2500
73 #define ADC_CH_VBAT_MIN 2300
74 #define ADC_CH_VBAT_MAX 4800
75 #define ADC_CH_CHG_I_MIN 0
76 #define ADC_CH_CHG_I_MAX 1500
77 #define ADC_CH_BKBAT_MIN 0
78 #define ADC_CH_BKBAT_MAX 3200
80 /* This is used to not lose precision when dividing to get gain and offset */
81 #define CALIB_SCALE 1000
91 * struct adc_cal_data - Table for storing gain and offset for the calibrated
93 * @gain: Gain of the ADC channel
94 * @offset: Offset of the ADC channel
102 * struct ab8500_gpadc - AB8500 GPADC device information
103 * @dev: pointer to the struct device
104 * @node: a list of AB8500 GPADCs, hence prepared for
106 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
107 * the completion of gpadc conversion
108 * @ab8500_gpadc_lock: structure of type mutex
109 * @regu: pointer to the struct regulator
110 * @irq: interrupt number that is used by gpadc
111 * @cal_data array of ADC calibration data structs
113 struct ab8500_gpadc {
115 struct list_head node;
116 struct completion ab8500_gpadc_complete;
117 struct mutex ab8500_gpadc_lock;
118 struct regulator *regu;
120 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
123 static LIST_HEAD(ab8500_gpadc_list);
126 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
127 * (i.e. the first GPADC in the instance list)
129 struct ab8500_gpadc *ab8500_gpadc_get(char *name)
131 struct ab8500_gpadc *gpadc;
133 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
134 if (!strcmp(name, dev_name(gpadc->dev)))
138 return ERR_PTR(-ENOENT);
140 EXPORT_SYMBOL(ab8500_gpadc_get);
142 static int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 input,
149 /* For some reason we don't have calibrated data */
150 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
151 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
152 ADC_CH_CHG_V_MIN) * ad_value /
156 /* Here we can use the calibrated data */
157 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
158 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
166 /* For some reason we don't have calibrated data */
167 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
168 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
169 ADC_CH_BTEMP_MIN) * ad_value /
173 /* Here we can use the calibrated data */
174 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
175 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
179 /* For some reason we don't have calibrated data */
180 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
181 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
182 ADC_CH_VBAT_MIN) * ad_value /
186 /* Here we can use the calibrated data */
187 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
188 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
192 res = ADC_CH_DIETEMP_MIN +
193 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
198 res = ADC_CH_ACCDET2_MIN +
199 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
204 res = ADC_CH_CHG_V_MIN +
205 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
211 res = ADC_CH_CHG_I_MIN +
212 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
217 res = ADC_CH_BKBAT_MIN +
218 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
224 "unknown channel, not possible to convert\n");
233 * ab8500_gpadc_convert() - gpadc conversion
234 * @input: analog input to be converted to digital data
236 * This function converts the selected analog i/p to digital
239 int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 input)
244 u8 val, low_data, high_data;
249 mutex_lock(&gpadc->ab8500_gpadc_lock);
250 /* Enable VTVout LDO this is required for GPADC */
251 regulator_enable(gpadc->regu);
253 /* Check if ADC is not busy, lock and proceed */
255 ret = abx500_get_register_interruptible(gpadc->dev,
256 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
259 if (!(val & GPADC_BUSY))
262 } while (++looplimit < 10);
263 if (looplimit >= 10 && (val & GPADC_BUSY)) {
264 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
270 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
271 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
273 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
276 /* Select the input source and set average samples to 16 */
277 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
278 AB8500_GPADC_CTRL2_REG, (input | SW_AVG_16));
281 "gpadc_conversion: set avg samples failed\n");
284 /* Enable ADC, Buffering and select rising edge, start Conversion */
285 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
286 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
289 "gpadc_conversion: select falling edge failed\n");
292 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
293 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
296 "gpadc_conversion: start s/w conversion failed\n");
299 /* wait for completion of conversion */
300 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete, 2*HZ)) {
302 "timeout: didnt recieve GPADC conversion interrupt\n");
307 /* Read the converted RAW data */
308 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
309 AB8500_GPADC_MANDATAL_REG, &low_data);
311 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
315 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
316 AB8500_GPADC_MANDATAH_REG, &high_data);
319 "gpadc_conversion: read high data failed\n");
323 data = (high_data << 8) | low_data;
325 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
326 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
328 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
331 /* Disable VTVout LDO this is required for GPADC */
332 regulator_disable(gpadc->regu);
333 mutex_unlock(&gpadc->ab8500_gpadc_lock);
334 ret = ab8500_gpadc_ad_to_voltage(gpadc, input, data);
339 * It has shown to be needed to turn off the GPADC if an error occurs,
340 * otherwise we might have problem when waiting for the busy bit in the
341 * GPADC status register to go low. In V1.1 there wait_for_completion
342 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
344 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
345 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
346 regulator_disable(gpadc->regu);
347 mutex_unlock(&gpadc->ab8500_gpadc_lock);
349 "gpadc_conversion: Failed to AD convert channel %d\n", input);
352 EXPORT_SYMBOL(ab8500_gpadc_convert);
355 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
357 * @data: pointer to the data passed during request irq
359 * This is a interrupt service routine for s/w gpadc conversion completion.
360 * Notifies the gpadc completion is completed and the converted raw value
361 * can be read from the registers.
362 * Returns IRQ status(IRQ_HANDLED)
364 static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
366 struct ab8500_gpadc *gpadc = _gpadc;
368 complete(&gpadc->ab8500_gpadc_complete);
373 static int otp_cal_regs[] = {
383 static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
386 int ret[ARRAY_SIZE(otp_cal_regs)];
387 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
389 int vmain_high, vmain_low;
390 int btemp_high, btemp_low;
391 int vbat_high, vbat_low;
393 /* First we read all OTP registers and store the error code */
394 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
395 ret[i] = abx500_get_register_interruptible(gpadc->dev,
396 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
398 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
399 __func__, otp_cal_regs[i]);
403 * The ADC calibration data is stored in OTP registers.
404 * The layout of the calibration data is outlined below and a more
405 * detailed description can be found in UM0836
407 * vm_h/l = vmain_high/low
408 * bt_h/l = btemp_high/low
409 * vb_h/l = vbat_high/low
412 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
413 * |.......|.......|.......|.......|.......|.......|.......|.......
415 * |.......|.......|.......|.......|.......|.......|.......|.......
416 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
417 * |.......|.......|.......|.......|.......|.......|.......|.......
418 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
419 * |.......|.......|.......|.......|.......|.......|.......|.......
420 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
421 * |.......|.......|.......|.......|.......|.......|.......|.......
422 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
423 * |.......|.......|.......|.......|.......|.......|.......|.......
424 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
425 * |.......|.......|.......|.......|.......|.......|.......|.......
426 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
427 * |.......|.......|.......|.......|.......|.......|.......|.......
430 * Ideal output ADC codes corresponding to injected input voltages
431 * during manufacturing is:
433 * vmain_high: Vin = 19500mV / ADC ideal code = 997
434 * vmain_low: Vin = 315mV / ADC ideal code = 16
435 * btemp_high: Vin = 1300mV / ADC ideal code = 985
436 * btemp_low: Vin = 21mV / ADC ideal code = 16
437 * vbat_high: Vin = 4700mV / ADC ideal code = 982
438 * vbat_low: Vin = 2380mV / ADC ideal code = 33
441 /* Calculate gain and offset for VMAIN if all reads succeeded */
442 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
443 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
444 ((gpadc_cal[1] & 0x3F) << 2) |
445 ((gpadc_cal[2] & 0xC0) >> 6));
447 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
449 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
450 (19500 - 315) / (vmain_high - vmain_low);
452 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
453 (CALIB_SCALE * (19500 - 315) /
454 (vmain_high - vmain_low)) * vmain_high;
456 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
459 /* Calculate gain and offset for BTEMP if all reads succeeded */
460 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
461 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
462 (gpadc_cal[3] << 1) |
463 ((gpadc_cal[4] & 0x80) >> 7));
465 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
467 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
468 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
470 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
471 (CALIB_SCALE * (1300 - 21) /
472 (btemp_high - btemp_low)) * btemp_high;
474 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
477 /* Calculate gain and offset for VBAT if all reads succeeded */
478 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
479 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
480 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
482 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
483 (4700 - 2380) / (vbat_high - vbat_low);
485 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
486 (CALIB_SCALE * (4700 - 2380) /
487 (vbat_high - vbat_low)) * vbat_high;
489 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
492 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
493 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
494 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
496 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
497 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
498 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
500 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
501 gpadc->cal_data[ADC_INPUT_VBAT].gain,
502 gpadc->cal_data[ADC_INPUT_VBAT].offset);
505 static int __devinit ab8500_gpadc_probe(struct platform_device *pdev)
508 struct ab8500_gpadc *gpadc;
510 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
512 dev_err(&pdev->dev, "Error: No memory\n");
516 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
517 if (gpadc->irq < 0) {
518 dev_err(gpadc->dev, "failed to get platform irq-%d\n",
524 gpadc->dev = &pdev->dev;
525 mutex_init(&gpadc->ab8500_gpadc_lock);
527 /* Initialize completion used to notify completion of conversion */
528 init_completion(&gpadc->ab8500_gpadc_complete);
530 /* Register interrupt - SwAdcComplete */
531 ret = request_threaded_irq(gpadc->irq, NULL,
532 ab8500_bm_gpswadcconvend_handler,
533 IRQF_NO_SUSPEND | IRQF_SHARED, "ab8500-gpadc", gpadc);
535 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
540 /* VTVout LDO used to power up ab8500-GPADC */
541 gpadc->regu = regulator_get(&pdev->dev, "vddadc");
542 if (IS_ERR(gpadc->regu)) {
543 ret = PTR_ERR(gpadc->regu);
544 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
547 ab8500_gpadc_read_calibration_data(gpadc);
548 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
549 dev_dbg(gpadc->dev, "probe success\n");
552 free_irq(gpadc->irq, gpadc);
559 static int __devexit ab8500_gpadc_remove(struct platform_device *pdev)
561 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
563 /* remove this gpadc entry from the list */
564 list_del(&gpadc->node);
565 /* remove interrupt - completion of Sw ADC conversion */
566 free_irq(gpadc->irq, gpadc);
567 /* disable VTVout LDO that is being used by GPADC */
568 regulator_put(gpadc->regu);
574 static struct platform_driver ab8500_gpadc_driver = {
575 .probe = ab8500_gpadc_probe,
576 .remove = __devexit_p(ab8500_gpadc_remove),
578 .name = "ab8500-gpadc",
579 .owner = THIS_MODULE,
583 static int __init ab8500_gpadc_init(void)
585 return platform_driver_register(&ab8500_gpadc_driver);
588 static void __exit ab8500_gpadc_exit(void)
590 platform_driver_unregister(&ab8500_gpadc_driver);
593 subsys_initcall_sync(ab8500_gpadc_init);
594 module_exit(ab8500_gpadc_exit);
596 MODULE_LICENSE("GPL v2");
597 MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
598 MODULE_ALIAS("platform:ab8500_gpadc");
599 MODULE_DESCRIPTION("AB8500 GPADC driver");