2 * V4L2 SoC Camera driver for OmniVision OV6650 Camera Sensor
4 * Copyright (C) 2010 Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>
6 * Based on OmniVision OV96xx Camera Driver
7 * Copyright (C) 2009 Marek Vasut <marek.vasut@gmail.com>
9 * Based on ov772x camera driver:
10 * Copyright (C) 2008 Renesas Solutions Corp.
11 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
13 * Based on ov7670 and soc_camera_platform driver,
14 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
15 * Copyright (C) 2008 Magnus Damm
16 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
18 * Hardware specific bits initialy based on former work by Matt Callow
19 * drivers/media/video/omap/sensor_ov6650.c
20 * Copyright (C) 2006 Matt Callow
22 * This program is free software; you can redistribute it and/or modify
23 * it under the terms of the GNU General Public License version 2 as
24 * published by the Free Software Foundation.
27 #include <linux/bitops.h>
28 #include <linux/delay.h>
29 #include <linux/i2c.h>
30 #include <linux/slab.h>
31 #include <linux/v4l2-mediabus.h>
33 #include <media/soc_camera.h>
34 #include <media/v4l2-chip-ident.h>
35 #include <media/v4l2-ctrls.h>
37 /* Register definitions */
38 #define REG_GAIN 0x00 /* range 00 - 3F */
41 #define REG_SAT 0x03 /* [7:4] saturation [0:3] reserved */
42 #define REG_HUE 0x04 /* [7:6] rsrvd [5] hue en [4:0] hue */
50 #define REG_CLKRC 0x11 /* Data Format and Internal Clock */
51 /* [7:6] Input system clock (MHz)*/
52 /* 00=8, 01=12, 10=16, 11=24 */
53 /* [5:0]: Internal Clock Pre-Scaler */
54 #define REG_COMA 0x12 /* [7] Reset */
59 #define REG_HSTRT 0x17
60 #define REG_HSTOP 0x18
61 #define REG_VSTRT 0x19
62 #define REG_VSTOP 0x1a
63 #define REG_PSHFT 0x1b
66 #define REG_HSYNS 0x1e
67 #define REG_HSYNE 0x1f
79 #define REG_FRARL 0x2b
86 #define REG_FRAJH 0x32
87 #define REG_FRAJL 0x33
89 #define REG_L1AEC 0x35
100 #define REG_SPCE 0x68
101 #define REG_ADCL 0x69
103 #define REG_RMCO 0x6c
104 #define REG_GMCO 0x6d
105 #define REG_BMCO 0x6e
108 /* Register bits, values, etc. */
109 #define OV6650_PIDH 0x66 /* high byte of product ID number */
110 #define OV6650_PIDL 0x50 /* low byte of product ID number */
111 #define OV6650_MIDH 0x7F /* high byte of mfg ID */
112 #define OV6650_MIDL 0xA2 /* low byte of mfg ID */
114 #define DEF_GAIN 0x00
115 #define DEF_BLUE 0x80
119 #define SAT_MASK (0xf << SAT_SHIFT)
120 #define SET_SAT(x) (((x) << SAT_SHIFT) & SAT_MASK)
122 #define HUE_EN BIT(5)
123 #define HUE_MASK 0x1f
125 #define SET_HUE(x) (HUE_EN | ((x) & HUE_MASK))
127 #define DEF_AECH 0x4D
129 #define CLKRC_6MHz 0x00
130 #define CLKRC_12MHz 0x40
131 #define CLKRC_16MHz 0x80
132 #define CLKRC_24MHz 0xc0
133 #define CLKRC_DIV_MASK 0x3f
134 #define GET_CLKRC_DIV(x) (((x) & CLKRC_DIV_MASK) + 1)
136 #define COMA_RESET BIT(7)
137 #define COMA_QCIF BIT(5)
138 #define COMA_RAW_RGB BIT(4)
139 #define COMA_RGB BIT(3)
140 #define COMA_BW BIT(2)
141 #define COMA_WORD_SWAP BIT(1)
142 #define COMA_BYTE_SWAP BIT(0)
143 #define DEF_COMA 0x00
145 #define COMB_FLIP_V BIT(7)
146 #define COMB_FLIP_H BIT(5)
147 #define COMB_BAND_FILTER BIT(4)
148 #define COMB_AWB BIT(2)
149 #define COMB_AGC BIT(1)
150 #define COMB_AEC BIT(0)
151 #define DEF_COMB 0x5f
153 #define COML_ONE_CHANNEL BIT(7)
155 #define DEF_HSTRT 0x24
156 #define DEF_HSTOP 0xd4
157 #define DEF_VSTRT 0x04
158 #define DEF_VSTOP 0x94
160 #define COMF_HREF_LOW BIT(4)
162 #define COMJ_PCLK_RISING BIT(4)
163 #define COMJ_VSYNC_HIGH BIT(0)
165 /* supported resolutions */
166 #define W_QCIF (DEF_HSTOP - DEF_HSTRT)
167 #define W_CIF (W_QCIF << 1)
168 #define H_QCIF (DEF_VSTOP - DEF_VSTRT)
169 #define H_CIF (H_QCIF << 1)
171 #define FRAME_RATE_MAX 30
180 struct v4l2_subdev subdev;
181 struct v4l2_ctrl_handler hdl;
183 /* exposure/autoexposure cluster */
184 struct v4l2_ctrl *autoexposure;
185 struct v4l2_ctrl *exposure;
188 /* gain/autogain cluster */
189 struct v4l2_ctrl *autogain;
190 struct v4l2_ctrl *gain;
193 /* blue/red/autowhitebalance cluster */
194 struct v4l2_ctrl *autowb;
195 struct v4l2_ctrl *blue;
196 struct v4l2_ctrl *red;
198 bool half_scale; /* scale down output by 2 */
199 struct v4l2_rect rect; /* sensor cropping window */
200 unsigned long pclk_limit; /* from host */
201 unsigned long pclk_max; /* from resolution and format */
202 struct v4l2_fract tpf; /* as requested with s_parm */
203 enum v4l2_mbus_pixelcode code;
204 enum v4l2_colorspace colorspace;
208 static enum v4l2_mbus_pixelcode ov6650_codes[] = {
209 V4L2_MBUS_FMT_YUYV8_2X8,
210 V4L2_MBUS_FMT_UYVY8_2X8,
211 V4L2_MBUS_FMT_YVYU8_2X8,
212 V4L2_MBUS_FMT_VYUY8_2X8,
213 V4L2_MBUS_FMT_SBGGR8_1X8,
214 V4L2_MBUS_FMT_Y8_1X8,
217 /* read a register */
218 static int ov6650_reg_read(struct i2c_client *client, u8 reg, u8 *val)
222 struct i2c_msg msg = {
223 .addr = client->addr,
229 ret = i2c_transfer(client->adapter, &msg, 1);
233 msg.flags = I2C_M_RD;
234 ret = i2c_transfer(client->adapter, &msg, 1);
242 dev_err(&client->dev, "Failed reading register 0x%02x!\n", reg);
246 /* write a register */
247 static int ov6650_reg_write(struct i2c_client *client, u8 reg, u8 val)
250 unsigned char data[2] = { reg, val };
251 struct i2c_msg msg = {
252 .addr = client->addr,
258 ret = i2c_transfer(client->adapter, &msg, 1);
262 dev_err(&client->dev, "Failed writing register 0x%02x!\n", reg);
269 /* Read a register, alter its bits, write it back */
270 static int ov6650_reg_rmw(struct i2c_client *client, u8 reg, u8 set, u8 mask)
275 ret = ov6650_reg_read(client, reg, &val);
277 dev_err(&client->dev,
278 "[Read]-Modify-Write of register 0x%02x failed!\n",
286 ret = ov6650_reg_write(client, reg, val);
288 dev_err(&client->dev,
289 "Read-Modify-[Write] of register 0x%02x failed!\n",
295 static struct ov6650 *to_ov6650(const struct i2c_client *client)
297 return container_of(i2c_get_clientdata(client), struct ov6650, subdev);
300 /* Start/Stop streaming from the device */
301 static int ov6650_s_stream(struct v4l2_subdev *sd, int enable)
306 /* Get status of additional camera capabilities */
307 static int ov6550_g_volatile_ctrl(struct v4l2_ctrl *ctrl)
309 struct ov6650 *priv = container_of(ctrl->handler, struct ov6650, hdl);
310 struct v4l2_subdev *sd = &priv->subdev;
311 struct i2c_client *client = v4l2_get_subdevdata(sd);
316 case V4L2_CID_AUTOGAIN:
317 ret = ov6650_reg_read(client, REG_GAIN, ®);
319 priv->gain->val = reg;
321 case V4L2_CID_AUTO_WHITE_BALANCE:
322 ret = ov6650_reg_read(client, REG_BLUE, ®);
324 ret = ov6650_reg_read(client, REG_RED, ®2);
326 priv->blue->val = reg;
327 priv->red->val = reg2;
330 case V4L2_CID_EXPOSURE_AUTO:
331 ret = ov6650_reg_read(client, REG_AECH, ®);
333 priv->exposure->val = reg;
339 /* Set status of additional camera capabilities */
340 static int ov6550_s_ctrl(struct v4l2_ctrl *ctrl)
342 struct ov6650 *priv = container_of(ctrl->handler, struct ov6650, hdl);
343 struct v4l2_subdev *sd = &priv->subdev;
344 struct i2c_client *client = v4l2_get_subdevdata(sd);
348 case V4L2_CID_AUTOGAIN:
349 ret = ov6650_reg_rmw(client, REG_COMB,
350 ctrl->val ? COMB_AGC : 0, COMB_AGC);
351 if (!ret && !ctrl->val)
352 ret = ov6650_reg_write(client, REG_GAIN, priv->gain->val);
354 case V4L2_CID_AUTO_WHITE_BALANCE:
355 ret = ov6650_reg_rmw(client, REG_COMB,
356 ctrl->val ? COMB_AWB : 0, COMB_AWB);
357 if (!ret && !ctrl->val) {
358 ret = ov6650_reg_write(client, REG_BLUE, priv->blue->val);
360 ret = ov6650_reg_write(client, REG_RED,
364 case V4L2_CID_SATURATION:
365 return ov6650_reg_rmw(client, REG_SAT, SET_SAT(ctrl->val),
368 return ov6650_reg_rmw(client, REG_HUE, SET_HUE(ctrl->val),
370 case V4L2_CID_BRIGHTNESS:
371 return ov6650_reg_write(client, REG_BRT, ctrl->val);
372 case V4L2_CID_EXPOSURE_AUTO:
373 if (ctrl->val == V4L2_EXPOSURE_AUTO)
374 ret = ov6650_reg_rmw(client, REG_COMB, COMB_AEC, 0);
376 ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_AEC);
377 if (!ret && ctrl->val == V4L2_EXPOSURE_MANUAL)
378 ret = ov6650_reg_write(client, REG_AECH,
379 priv->exposure->val);
382 return ov6650_reg_write(client, REG_GAM1, ctrl->val);
384 return ov6650_reg_rmw(client, REG_COMB,
385 ctrl->val ? COMB_FLIP_V : 0, COMB_FLIP_V);
387 return ov6650_reg_rmw(client, REG_COMB,
388 ctrl->val ? COMB_FLIP_H : 0, COMB_FLIP_H);
394 /* Get chip identification */
395 static int ov6650_g_chip_ident(struct v4l2_subdev *sd,
396 struct v4l2_dbg_chip_ident *id)
398 id->ident = V4L2_IDENT_OV6650;
404 #ifdef CONFIG_VIDEO_ADV_DEBUG
405 static int ov6650_get_register(struct v4l2_subdev *sd,
406 struct v4l2_dbg_register *reg)
408 struct i2c_client *client = v4l2_get_subdevdata(sd);
412 if (reg->reg & ~0xff)
417 ret = ov6650_reg_read(client, reg->reg, &val);
419 reg->val = (__u64)val;
424 static int ov6650_set_register(struct v4l2_subdev *sd,
425 struct v4l2_dbg_register *reg)
427 struct i2c_client *client = v4l2_get_subdevdata(sd);
429 if (reg->reg & ~0xff || reg->val & ~0xff)
432 return ov6650_reg_write(client, reg->reg, reg->val);
436 static int ov6650_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
438 struct i2c_client *client = v4l2_get_subdevdata(sd);
439 struct ov6650 *priv = to_ov6650(client);
441 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
447 static int ov6650_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
449 struct i2c_client *client = v4l2_get_subdevdata(sd);
450 struct ov6650 *priv = to_ov6650(client);
451 struct v4l2_rect *rect = &a->c;
454 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
457 rect->left = ALIGN(rect->left, 2);
458 rect->width = ALIGN(rect->width, 2);
459 rect->top = ALIGN(rect->top, 2);
460 rect->height = ALIGN(rect->height, 2);
461 soc_camera_limit_side(&rect->left, &rect->width,
462 DEF_HSTRT << 1, 2, W_CIF);
463 soc_camera_limit_side(&rect->top, &rect->height,
464 DEF_VSTRT << 1, 2, H_CIF);
466 ret = ov6650_reg_write(client, REG_HSTRT, rect->left >> 1);
468 priv->rect.left = rect->left;
469 ret = ov6650_reg_write(client, REG_HSTOP,
470 (rect->left + rect->width) >> 1);
473 priv->rect.width = rect->width;
474 ret = ov6650_reg_write(client, REG_VSTRT, rect->top >> 1);
477 priv->rect.top = rect->top;
478 ret = ov6650_reg_write(client, REG_VSTOP,
479 (rect->top + rect->height) >> 1);
482 priv->rect.height = rect->height;
487 static int ov6650_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
489 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
492 a->bounds.left = DEF_HSTRT << 1;
493 a->bounds.top = DEF_VSTRT << 1;
494 a->bounds.width = W_CIF;
495 a->bounds.height = H_CIF;
496 a->defrect = a->bounds;
497 a->pixelaspect.numerator = 1;
498 a->pixelaspect.denominator = 1;
503 static int ov6650_g_fmt(struct v4l2_subdev *sd,
504 struct v4l2_mbus_framefmt *mf)
506 struct i2c_client *client = v4l2_get_subdevdata(sd);
507 struct ov6650 *priv = to_ov6650(client);
509 mf->width = priv->rect.width >> priv->half_scale;
510 mf->height = priv->rect.height >> priv->half_scale;
511 mf->code = priv->code;
512 mf->colorspace = priv->colorspace;
513 mf->field = V4L2_FIELD_NONE;
518 static bool is_unscaled_ok(int width, int height, struct v4l2_rect *rect)
520 return width > rect->width >> 1 || height > rect->height >> 1;
523 static u8 to_clkrc(struct v4l2_fract *timeperframe,
524 unsigned long pclk_limit, unsigned long pclk_max)
528 if (timeperframe->numerator && timeperframe->denominator)
529 pclk = pclk_max * timeperframe->denominator /
530 (FRAME_RATE_MAX * timeperframe->numerator);
534 if (pclk_limit && pclk_limit < pclk)
537 return (pclk_max - 1) / pclk;
540 /* set the format we will capture in */
541 static int ov6650_s_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf)
543 struct i2c_client *client = v4l2_get_subdevdata(sd);
544 struct soc_camera_device *icd = (struct soc_camera_device *)sd->grp_id;
545 struct soc_camera_sense *sense = icd->sense;
546 struct ov6650 *priv = to_ov6650(client);
547 bool half_scale = !is_unscaled_ok(mf->width, mf->height, &priv->rect);
548 struct v4l2_crop a = {
549 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
551 .left = priv->rect.left + (priv->rect.width >> 1) -
552 (mf->width >> (1 - half_scale)),
553 .top = priv->rect.top + (priv->rect.height >> 1) -
554 (mf->height >> (1 - half_scale)),
555 .width = mf->width << half_scale,
556 .height = mf->height << half_scale,
559 enum v4l2_mbus_pixelcode code = mf->code;
560 unsigned long mclk, pclk;
561 u8 coma_set = 0, coma_mask = 0, coml_set, coml_mask, clkrc;
564 /* select color matrix configuration for given color encoding */
566 case V4L2_MBUS_FMT_Y8_1X8:
567 dev_dbg(&client->dev, "pixel format GREY8_1X8\n");
568 coma_mask |= COMA_RGB | COMA_WORD_SWAP | COMA_BYTE_SWAP;
571 case V4L2_MBUS_FMT_YUYV8_2X8:
572 dev_dbg(&client->dev, "pixel format YUYV8_2X8_LE\n");
573 coma_mask |= COMA_RGB | COMA_BW | COMA_BYTE_SWAP;
574 coma_set |= COMA_WORD_SWAP;
576 case V4L2_MBUS_FMT_YVYU8_2X8:
577 dev_dbg(&client->dev, "pixel format YVYU8_2X8_LE (untested)\n");
578 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP |
581 case V4L2_MBUS_FMT_UYVY8_2X8:
582 dev_dbg(&client->dev, "pixel format YUYV8_2X8_BE\n");
584 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
585 coma_set |= COMA_BYTE_SWAP;
587 coma_mask |= COMA_RGB | COMA_BW;
588 coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
591 case V4L2_MBUS_FMT_VYUY8_2X8:
592 dev_dbg(&client->dev, "pixel format YVYU8_2X8_BE (untested)\n");
594 coma_mask |= COMA_RGB | COMA_BW;
595 coma_set |= COMA_BYTE_SWAP | COMA_WORD_SWAP;
597 coma_mask |= COMA_RGB | COMA_BW | COMA_WORD_SWAP;
598 coma_set |= COMA_BYTE_SWAP;
601 case V4L2_MBUS_FMT_SBGGR8_1X8:
602 dev_dbg(&client->dev, "pixel format SBGGR8_1X8 (untested)\n");
603 coma_mask |= COMA_BW | COMA_BYTE_SWAP | COMA_WORD_SWAP;
604 coma_set |= COMA_RAW_RGB | COMA_RGB;
607 dev_err(&client->dev, "Pixel format not handled: 0x%x\n", code);
612 if (code == V4L2_MBUS_FMT_Y8_1X8 ||
613 code == V4L2_MBUS_FMT_SBGGR8_1X8) {
614 coml_mask = COML_ONE_CHANNEL;
616 priv->pclk_max = 4000000;
619 coml_set = COML_ONE_CHANNEL;
620 priv->pclk_max = 8000000;
623 if (code == V4L2_MBUS_FMT_SBGGR8_1X8)
624 priv->colorspace = V4L2_COLORSPACE_SRGB;
626 priv->colorspace = V4L2_COLORSPACE_JPEG;
629 dev_dbg(&client->dev, "max resolution: QCIF\n");
630 coma_set |= COMA_QCIF;
633 dev_dbg(&client->dev, "max resolution: CIF\n");
634 coma_mask |= COMA_QCIF;
636 priv->half_scale = half_scale;
639 if (sense->master_clock == 8000000) {
640 dev_dbg(&client->dev, "8MHz input clock\n");
642 } else if (sense->master_clock == 12000000) {
643 dev_dbg(&client->dev, "12MHz input clock\n");
645 } else if (sense->master_clock == 16000000) {
646 dev_dbg(&client->dev, "16MHz input clock\n");
648 } else if (sense->master_clock == 24000000) {
649 dev_dbg(&client->dev, "24MHz input clock\n");
652 dev_err(&client->dev,
653 "unspported input clock, check platform data\n");
656 mclk = sense->master_clock;
657 priv->pclk_limit = sense->pixel_clock_max;
661 priv->pclk_limit = 0;
662 dev_dbg(&client->dev, "using default 24MHz input clock\n");
665 clkrc |= to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
667 pclk = priv->pclk_max / GET_CLKRC_DIV(clkrc);
668 dev_dbg(&client->dev, "pixel clock divider: %ld.%ld\n",
669 mclk / pclk, 10 * mclk % pclk / pclk);
671 ret = ov6650_s_crop(sd, &a);
673 ret = ov6650_reg_rmw(client, REG_COMA, coma_set, coma_mask);
675 ret = ov6650_reg_write(client, REG_CLKRC, clkrc);
677 ret = ov6650_reg_rmw(client, REG_COML, coml_set, coml_mask);
680 mf->colorspace = priv->colorspace;
681 mf->width = priv->rect.width >> half_scale;
682 mf->height = priv->rect.height >> half_scale;
688 static int ov6650_try_fmt(struct v4l2_subdev *sd,
689 struct v4l2_mbus_framefmt *mf)
691 struct i2c_client *client = v4l2_get_subdevdata(sd);
692 struct ov6650 *priv = to_ov6650(client);
694 if (is_unscaled_ok(mf->width, mf->height, &priv->rect))
695 v4l_bound_align_image(&mf->width, 2, W_CIF, 1,
696 &mf->height, 2, H_CIF, 1, 0);
698 mf->field = V4L2_FIELD_NONE;
701 case V4L2_MBUS_FMT_Y10_1X10:
702 mf->code = V4L2_MBUS_FMT_Y8_1X8;
703 case V4L2_MBUS_FMT_Y8_1X8:
704 case V4L2_MBUS_FMT_YVYU8_2X8:
705 case V4L2_MBUS_FMT_YUYV8_2X8:
706 case V4L2_MBUS_FMT_VYUY8_2X8:
707 case V4L2_MBUS_FMT_UYVY8_2X8:
708 mf->colorspace = V4L2_COLORSPACE_JPEG;
711 mf->code = V4L2_MBUS_FMT_SBGGR8_1X8;
712 case V4L2_MBUS_FMT_SBGGR8_1X8:
713 mf->colorspace = V4L2_COLORSPACE_SRGB;
720 static int ov6650_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
721 enum v4l2_mbus_pixelcode *code)
723 if (index >= ARRAY_SIZE(ov6650_codes))
726 *code = ov6650_codes[index];
730 static int ov6650_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
732 struct i2c_client *client = v4l2_get_subdevdata(sd);
733 struct ov6650 *priv = to_ov6650(client);
734 struct v4l2_captureparm *cp = &parms->parm.capture;
736 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
739 memset(cp, 0, sizeof(*cp));
740 cp->capability = V4L2_CAP_TIMEPERFRAME;
741 cp->timeperframe.numerator = GET_CLKRC_DIV(to_clkrc(&priv->tpf,
742 priv->pclk_limit, priv->pclk_max));
743 cp->timeperframe.denominator = FRAME_RATE_MAX;
745 dev_dbg(&client->dev, "Frame interval: %u/%u s\n",
746 cp->timeperframe.numerator, cp->timeperframe.denominator);
751 static int ov6650_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms)
753 struct i2c_client *client = v4l2_get_subdevdata(sd);
754 struct ov6650 *priv = to_ov6650(client);
755 struct v4l2_captureparm *cp = &parms->parm.capture;
756 struct v4l2_fract *tpf = &cp->timeperframe;
760 if (parms->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
763 if (cp->extendedmode != 0)
766 if (tpf->numerator == 0 || tpf->denominator == 0)
767 div = 1; /* Reset to full rate */
769 div = (tpf->numerator * FRAME_RATE_MAX) / tpf->denominator;
773 else if (div > GET_CLKRC_DIV(CLKRC_DIV_MASK))
774 div = GET_CLKRC_DIV(CLKRC_DIV_MASK);
777 * Keep result to be used as tpf limit
778 * for subseqent clock divider calculations
780 priv->tpf.numerator = div;
781 priv->tpf.denominator = FRAME_RATE_MAX;
783 clkrc = to_clkrc(&priv->tpf, priv->pclk_limit, priv->pclk_max);
785 ret = ov6650_reg_rmw(client, REG_CLKRC, clkrc, CLKRC_DIV_MASK);
787 tpf->numerator = GET_CLKRC_DIV(clkrc);
788 tpf->denominator = FRAME_RATE_MAX;
794 /* Soft reset the camera. This has nothing to do with the RESET pin! */
795 static int ov6650_reset(struct i2c_client *client)
799 dev_dbg(&client->dev, "reset\n");
801 ret = ov6650_reg_rmw(client, REG_COMA, COMA_RESET, 0);
803 dev_err(&client->dev,
804 "An error occurred while entering soft reset!\n");
809 /* program default register values */
810 static int ov6650_prog_dflt(struct i2c_client *client)
814 dev_dbg(&client->dev, "initializing\n");
816 ret = ov6650_reg_write(client, REG_COMA, 0); /* ~COMA_RESET */
818 ret = ov6650_reg_rmw(client, REG_COMB, 0, COMB_BAND_FILTER);
823 static int ov6650_video_probe(struct i2c_client *client)
825 u8 pidh, pidl, midh, midl;
829 * check and show product ID and manufacturer ID
831 ret = ov6650_reg_read(client, REG_PIDH, &pidh);
833 ret = ov6650_reg_read(client, REG_PIDL, &pidl);
835 ret = ov6650_reg_read(client, REG_MIDH, &midh);
837 ret = ov6650_reg_read(client, REG_MIDL, &midl);
842 if ((pidh != OV6650_PIDH) || (pidl != OV6650_PIDL)) {
843 dev_err(&client->dev, "Product ID error 0x%02x:0x%02x\n",
848 dev_info(&client->dev,
849 "ov6650 Product ID 0x%02x:0x%02x Manufacturer ID 0x%02x:0x%02x\n",
850 pidh, pidl, midh, midl);
852 ret = ov6650_reset(client);
854 ret = ov6650_prog_dflt(client);
859 static const struct v4l2_ctrl_ops ov6550_ctrl_ops = {
860 .g_volatile_ctrl = ov6550_g_volatile_ctrl,
861 .s_ctrl = ov6550_s_ctrl,
864 static struct v4l2_subdev_core_ops ov6650_core_ops = {
865 .g_chip_ident = ov6650_g_chip_ident,
866 #ifdef CONFIG_VIDEO_ADV_DEBUG
867 .g_register = ov6650_get_register,
868 .s_register = ov6650_set_register,
872 /* Request bus settings on camera side */
873 static int ov6650_g_mbus_config(struct v4l2_subdev *sd,
874 struct v4l2_mbus_config *cfg)
876 struct i2c_client *client = v4l2_get_subdevdata(sd);
877 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
879 cfg->flags = V4L2_MBUS_MASTER |
880 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
881 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW |
882 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW |
883 V4L2_MBUS_DATA_ACTIVE_HIGH;
884 cfg->type = V4L2_MBUS_PARALLEL;
885 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
890 /* Alter bus settings on camera side */
891 static int ov6650_s_mbus_config(struct v4l2_subdev *sd,
892 const struct v4l2_mbus_config *cfg)
894 struct i2c_client *client = v4l2_get_subdevdata(sd);
895 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
896 unsigned long flags = soc_camera_apply_board_flags(icl, cfg);
899 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
900 ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_PCLK_RISING, 0);
902 ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_PCLK_RISING);
906 if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
907 ret = ov6650_reg_rmw(client, REG_COMF, COMF_HREF_LOW, 0);
909 ret = ov6650_reg_rmw(client, REG_COMF, 0, COMF_HREF_LOW);
913 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
914 ret = ov6650_reg_rmw(client, REG_COMJ, COMJ_VSYNC_HIGH, 0);
916 ret = ov6650_reg_rmw(client, REG_COMJ, 0, COMJ_VSYNC_HIGH);
921 static struct v4l2_subdev_video_ops ov6650_video_ops = {
922 .s_stream = ov6650_s_stream,
923 .g_mbus_fmt = ov6650_g_fmt,
924 .s_mbus_fmt = ov6650_s_fmt,
925 .try_mbus_fmt = ov6650_try_fmt,
926 .enum_mbus_fmt = ov6650_enum_fmt,
927 .cropcap = ov6650_cropcap,
928 .g_crop = ov6650_g_crop,
929 .s_crop = ov6650_s_crop,
930 .g_parm = ov6650_g_parm,
931 .s_parm = ov6650_s_parm,
932 .g_mbus_config = ov6650_g_mbus_config,
933 .s_mbus_config = ov6650_s_mbus_config,
936 static struct v4l2_subdev_ops ov6650_subdev_ops = {
937 .core = &ov6650_core_ops,
938 .video = &ov6650_video_ops,
942 * i2c_driver function
944 static int ov6650_probe(struct i2c_client *client,
945 const struct i2c_device_id *did)
948 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
952 dev_err(&client->dev, "Missing platform_data for driver\n");
956 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
958 dev_err(&client->dev,
959 "Failed to allocate memory for private data!\n");
963 v4l2_i2c_subdev_init(&priv->subdev, client, &ov6650_subdev_ops);
964 v4l2_ctrl_handler_init(&priv->hdl, 13);
965 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
966 V4L2_CID_VFLIP, 0, 1, 1, 0);
967 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
968 V4L2_CID_HFLIP, 0, 1, 1, 0);
969 priv->autogain = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
970 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
971 priv->gain = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
972 V4L2_CID_GAIN, 0, 0x3f, 1, DEF_GAIN);
973 priv->autowb = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
974 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
975 priv->blue = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
976 V4L2_CID_BLUE_BALANCE, 0, 0xff, 1, DEF_BLUE);
977 priv->red = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
978 V4L2_CID_RED_BALANCE, 0, 0xff, 1, DEF_RED);
979 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
980 V4L2_CID_SATURATION, 0, 0xf, 1, 0x8);
981 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
982 V4L2_CID_HUE, 0, HUE_MASK, 1, DEF_HUE);
983 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
984 V4L2_CID_BRIGHTNESS, 0, 0xff, 1, 0x80);
985 priv->autoexposure = v4l2_ctrl_new_std_menu(&priv->hdl,
986 &ov6550_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0,
988 priv->exposure = v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
989 V4L2_CID_EXPOSURE, 0, 0xff, 1, DEF_AECH);
990 v4l2_ctrl_new_std(&priv->hdl, &ov6550_ctrl_ops,
991 V4L2_CID_GAMMA, 0, 0xff, 1, 0x12);
993 priv->subdev.ctrl_handler = &priv->hdl;
994 if (priv->hdl.error) {
995 int err = priv->hdl.error;
1000 v4l2_ctrl_auto_cluster(2, &priv->autogain, 0, true);
1001 v4l2_ctrl_auto_cluster(3, &priv->autowb, 0, true);
1002 v4l2_ctrl_auto_cluster(2, &priv->autoexposure,
1003 V4L2_EXPOSURE_MANUAL, true);
1005 priv->rect.left = DEF_HSTRT << 1;
1006 priv->rect.top = DEF_VSTRT << 1;
1007 priv->rect.width = W_CIF;
1008 priv->rect.height = H_CIF;
1009 priv->half_scale = false;
1010 priv->code = V4L2_MBUS_FMT_YUYV8_2X8;
1011 priv->colorspace = V4L2_COLORSPACE_JPEG;
1013 ret = ov6650_video_probe(client);
1015 ret = v4l2_ctrl_handler_setup(&priv->hdl);
1018 v4l2_ctrl_handler_free(&priv->hdl);
1025 static int ov6650_remove(struct i2c_client *client)
1027 struct ov6650 *priv = to_ov6650(client);
1029 v4l2_device_unregister_subdev(&priv->subdev);
1030 v4l2_ctrl_handler_free(&priv->hdl);
1035 static const struct i2c_device_id ov6650_id[] = {
1039 MODULE_DEVICE_TABLE(i2c, ov6650_id);
1041 static struct i2c_driver ov6650_i2c_driver = {
1045 .probe = ov6650_probe,
1046 .remove = ov6650_remove,
1047 .id_table = ov6650_id,
1050 static int __init ov6650_module_init(void)
1052 return i2c_add_driver(&ov6650_i2c_driver);
1055 static void __exit ov6650_module_exit(void)
1057 i2c_del_driver(&ov6650_i2c_driver);
1060 module_init(ov6650_module_init);
1061 module_exit(ov6650_module_exit);
1063 MODULE_DESCRIPTION("SoC Camera driver for OmniVision OV6650");
1064 MODULE_AUTHOR("Janusz Krzysztofik <jkrzyszt@tis.icnet.pl>");
1065 MODULE_LICENSE("GPL v2");