2 * Copyright (C) 2009 Texas Instruments.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18 * common vpss driver for all video drivers.
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/spinlock.h>
26 #include <linux/compiler.h>
28 #include <mach/hardware.h>
29 #include <media/davinci/vpss.h>
31 MODULE_LICENSE("GPL");
32 MODULE_DESCRIPTION("VPSS Driver");
33 MODULE_AUTHOR("Texas Instruments");
36 #define DM644X_SBL_PCR_VPSS (4)
38 /* vpss BL register offsets */
39 #define DM355_VPSSBL_CCDCMUX 0x1c
40 /* vpss CLK register offsets */
41 #define DM355_VPSSCLK_CLKCTRL 0x04
42 /* masks and shifts */
43 #define VPSS_HSSISEL_SHIFT 4
46 * vpss operations. Depends on platform. Not all functions are available
47 * on all platforms. The api, first check if a functio is available before
48 * invoking it. In the probe, the function ptrs are intialized based on
49 * vpss name. vpss name can be "dm355_vpss", "dm644x_vpss" etc.
53 int (*enable_clock)(enum vpss_clock_sel clock_sel, int en);
54 /* select input to ccdc */
55 void (*select_ccdc_source)(enum vpss_ccdc_source_sel src_sel);
56 /* clear wbl overlflow bit */
57 int (*clear_wbl_overflow)(enum vpss_wbl_sel wbl_sel);
60 /* vpss configuration */
61 struct vpss_oper_config {
62 __iomem void *vpss_bl_regs_base;
63 __iomem void *vpss_regs_base;
70 struct vpss_hw_ops hw_ops;
73 static struct vpss_oper_config oper_cfg;
75 /* register access routines */
76 static inline u32 bl_regr(u32 offset)
78 return __raw_readl(oper_cfg.vpss_bl_regs_base + offset);
81 static inline void bl_regw(u32 val, u32 offset)
83 __raw_writel(val, oper_cfg.vpss_bl_regs_base + offset);
86 static inline u32 vpss_regr(u32 offset)
88 return __raw_readl(oper_cfg.vpss_regs_base + offset);
91 static inline void vpss_regw(u32 val, u32 offset)
93 __raw_writel(val, oper_cfg.vpss_regs_base + offset);
96 static void dm355_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
98 bl_regw(src_sel << VPSS_HSSISEL_SHIFT, DM355_VPSSBL_CCDCMUX);
101 int vpss_select_ccdc_source(enum vpss_ccdc_source_sel src_sel)
103 if (!oper_cfg.hw_ops.select_ccdc_source)
106 dm355_select_ccdc_source(src_sel);
109 EXPORT_SYMBOL(vpss_select_ccdc_source);
111 static int dm644x_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
115 if (wbl_sel < VPSS_PCR_AEW_WBL_0 ||
116 wbl_sel > VPSS_PCR_CCDC_WBL_O)
119 /* writing a 0 clear the overflow */
120 mask = ~(mask << wbl_sel);
121 val = bl_regr(DM644X_SBL_PCR_VPSS) & mask;
122 bl_regw(val, DM644X_SBL_PCR_VPSS);
126 int vpss_clear_wbl_overflow(enum vpss_wbl_sel wbl_sel)
128 if (!oper_cfg.hw_ops.clear_wbl_overflow)
131 return oper_cfg.hw_ops.clear_wbl_overflow(wbl_sel);
133 EXPORT_SYMBOL(vpss_clear_wbl_overflow);
136 * dm355_enable_clock - Enable VPSS Clock
137 * @clock_sel: CLock to be enabled/disabled
138 * @en: enable/disable flag
140 * This is called to enable or disable a vpss clock
142 static int dm355_enable_clock(enum vpss_clock_sel clock_sel, int en)
145 u32 utemp, mask = 0x1, shift = 0;
148 case VPSS_VPBE_CLOCK:
149 /* nothing since lsb */
151 case VPSS_VENC_CLOCK_SEL:
154 case VPSS_CFALD_CLOCK:
160 case VPSS_IPIPE_CLOCK:
163 case VPSS_CCDC_CLOCK:
167 printk(KERN_ERR "dm355_enable_clock:"
168 " Invalid selector: %d\n", clock_sel);
172 spin_lock_irqsave(&oper_cfg.vpss_lock, flags);
173 utemp = vpss_regr(DM355_VPSSCLK_CLKCTRL);
175 utemp &= ~(mask << shift);
177 utemp |= (mask << shift);
179 vpss_regw(utemp, DM355_VPSSCLK_CLKCTRL);
180 spin_unlock_irqrestore(&oper_cfg.vpss_lock, flags);
184 int vpss_enable_clock(enum vpss_clock_sel clock_sel, int en)
186 if (!oper_cfg.hw_ops.enable_clock)
189 return oper_cfg.hw_ops.enable_clock(clock_sel, en);
191 EXPORT_SYMBOL(vpss_enable_clock);
193 static int __init vpss_probe(struct platform_device *pdev)
195 int status, dm355 = 0;
197 if (!pdev->dev.platform_data) {
198 dev_err(&pdev->dev, "no platform data\n");
201 strcpy(oper_cfg.vpss_name, pdev->dev.platform_data);
203 if (!strcmp(oper_cfg.vpss_name, "dm355_vpss"))
205 else if (strcmp(oper_cfg.vpss_name, "dm644x_vpss")) {
206 dev_err(&pdev->dev, "vpss driver not supported on"
211 dev_info(&pdev->dev, "%s vpss probed\n", oper_cfg.vpss_name);
212 oper_cfg.r1 = platform_get_resource(pdev, IORESOURCE_MEM, 0);
216 oper_cfg.len1 = oper_cfg.r1->end - oper_cfg.r1->start + 1;
218 oper_cfg.r1 = request_mem_region(oper_cfg.r1->start, oper_cfg.len1,
223 oper_cfg.vpss_bl_regs_base = ioremap(oper_cfg.r1->start, oper_cfg.len1);
224 if (!oper_cfg.vpss_bl_regs_base) {
230 oper_cfg.r2 = platform_get_resource(pdev, IORESOURCE_MEM, 1);
235 oper_cfg.len2 = oper_cfg.r2->end - oper_cfg.r2->start + 1;
236 oper_cfg.r2 = request_mem_region(oper_cfg.r2->start,
244 oper_cfg.vpss_regs_base = ioremap(oper_cfg.r2->start,
246 if (!oper_cfg.vpss_regs_base) {
253 oper_cfg.hw_ops.enable_clock = dm355_enable_clock;
254 oper_cfg.hw_ops.select_ccdc_source = dm355_select_ccdc_source;
256 oper_cfg.hw_ops.clear_wbl_overflow = dm644x_clear_wbl_overflow;
258 spin_lock_init(&oper_cfg.vpss_lock);
259 dev_info(&pdev->dev, "%s vpss probe success\n", oper_cfg.vpss_name);
263 release_mem_region(oper_cfg.r2->start, oper_cfg.len2);
265 iounmap(oper_cfg.vpss_bl_regs_base);
267 release_mem_region(oper_cfg.r1->start, oper_cfg.len1);
271 static int vpss_remove(struct platform_device *pdev)
273 iounmap(oper_cfg.vpss_bl_regs_base);
274 release_mem_region(oper_cfg.r1->start, oper_cfg.len1);
275 if (!strcmp(oper_cfg.vpss_name, "dm355_vpss")) {
276 iounmap(oper_cfg.vpss_regs_base);
277 release_mem_region(oper_cfg.r2->start, oper_cfg.len2);
282 static struct platform_driver vpss_driver = {
285 .owner = THIS_MODULE,
287 .remove = __devexit_p(vpss_remove),
291 static void vpss_exit(void)
293 platform_driver_unregister(&vpss_driver);
296 static int __init vpss_init(void)
298 return platform_driver_register(&vpss_driver);
300 subsys_initcall(vpss_init);
301 module_exit(vpss_exit);