2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
4 * Copyright (C) 2008 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/i2c.h>
22 #include <linux/types.h>
23 #include <linux/videodev2.h>
24 #include "tuner-i2c.h"
27 static DEFINE_MUTEX(mxl5007t_list_mutex);
28 static LIST_HEAD(hybrid_tuner_instance_list);
30 static int mxl5007t_debug;
31 module_param_named(debug, mxl5007t_debug, int, 0644);
32 MODULE_PARM_DESC(debug, "set debug level");
34 /* ------------------------------------------------------------------------- */
36 #define mxl_printk(kern, fmt, arg...) \
37 printk(kern "%s: " fmt "\n", __func__, ##arg)
39 #define mxl_err(fmt, arg...) \
40 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
42 #define mxl_warn(fmt, arg...) \
43 mxl_printk(KERN_WARNING, fmt, ##arg)
45 #define mxl_info(fmt, arg...) \
46 mxl_printk(KERN_INFO, fmt, ##arg)
48 #define mxl_debug(fmt, arg...) \
51 mxl_printk(KERN_DEBUG, fmt, ##arg); \
54 #define mxl_fail(ret) \
59 mxl_printk(KERN_ERR, "error %d on line %d", \
64 /* ------------------------------------------------------------------------- */
69 MxL_MODE_OTA_DVBT_ATSC = 0,
70 MxL_MODE_OTA_ISDBT = 4,
71 MxL_MODE_CABLE_DIGITAL = 0x10,
74 enum mxl5007t_chip_version {
75 MxL_UNKNOWN_ID = 0x00,
76 MxL_5007_V1_F1 = 0x11,
77 MxL_5007_V1_F2 = 0x12,
78 MxL_5007_V2_100_F1 = 0x21,
79 MxL_5007_V2_100_F2 = 0x22,
80 MxL_5007_V2_200_F1 = 0x23,
81 MxL_5007_V2_200_F2 = 0x24,
89 /* ------------------------------------------------------------------------- */
91 static struct reg_pair_t init_tab[] = {
92 { 0x0b, 0x44 }, /* XTAL */
93 { 0x0c, 0x60 }, /* IF */
94 { 0x10, 0x00 }, /* MISC */
95 { 0x12, 0xca }, /* IDAC */
96 { 0x16, 0x90 }, /* MODE */
97 { 0x32, 0x38 }, /* MODE Analog/Digital */
98 { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */
99 { 0x2c, 0x34 }, /* OVERRIDE */
100 { 0x4d, 0x40 }, /* OVERRIDE */
101 { 0x7f, 0x02 }, /* OVERRIDE */
102 { 0x9a, 0x52 }, /* OVERRIDE */
103 { 0x48, 0x5a }, /* OVERRIDE */
104 { 0x76, 0x1a }, /* OVERRIDE */
105 { 0x6a, 0x48 }, /* OVERRIDE */
106 { 0x64, 0x28 }, /* OVERRIDE */
107 { 0x66, 0xe6 }, /* OVERRIDE */
108 { 0x35, 0x0e }, /* OVERRIDE */
109 { 0x7e, 0x01 }, /* OVERRIDE */
110 { 0x83, 0x00 }, /* OVERRIDE */
111 { 0x04, 0x0b }, /* OVERRIDE */
112 { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */
116 static struct reg_pair_t init_tab_cable[] = {
117 { 0x0b, 0x44 }, /* XTAL */
118 { 0x0c, 0x60 }, /* IF */
119 { 0x10, 0x00 }, /* MISC */
120 { 0x12, 0xca }, /* IDAC */
121 { 0x16, 0x90 }, /* MODE */
122 { 0x32, 0x38 }, /* MODE A/D */
123 { 0x71, 0x3f }, /* TOP1 */
124 { 0x72, 0x3f }, /* TOP2 */
125 { 0x74, 0x3f }, /* TOP3 */
126 { 0xd8, 0x18 }, /* CLK_OUT_ENABLE */
127 { 0x2c, 0x34 }, /* OVERRIDE */
128 { 0x4d, 0x40 }, /* OVERRIDE */
129 { 0x7f, 0x02 }, /* OVERRIDE */
130 { 0x9a, 0x52 }, /* OVERRIDE */
131 { 0x48, 0x5a }, /* OVERRIDE */
132 { 0x76, 0x1a }, /* OVERRIDE */
133 { 0x6a, 0x48 }, /* OVERRIDE */
134 { 0x64, 0x28 }, /* OVERRIDE */
135 { 0x66, 0xe6 }, /* OVERRIDE */
136 { 0x35, 0x0e }, /* OVERRIDE */
137 { 0x7e, 0x01 }, /* OVERRIDE */
138 { 0x04, 0x0b }, /* OVERRIDE */
139 { 0x68, 0xb4 }, /* OVERRIDE */
140 { 0x36, 0x00 }, /* OVERRIDE */
141 { 0x05, 0x01 }, /* TOP_MASTER_ENABLE */
145 /* ------------------------------------------------------------------------- */
147 static struct reg_pair_t reg_pair_rftune[] = {
148 { 0x11, 0x00 }, /* abort tune */
152 { 0x11, 0x02 }, /* start tune */
156 /* ------------------------------------------------------------------------- */
158 struct mxl5007t_state {
159 struct list_head hybrid_tuner_instance_list;
160 struct tuner_i2c_props i2c_props;
164 struct mxl5007t_config *config;
166 enum mxl5007t_chip_version chip_id;
168 struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
169 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
170 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
176 /* ------------------------------------------------------------------------- */
178 /* called by _init and _rftun to manipulate the register arrays */
180 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
184 while (reg_pair[i].reg || reg_pair[i].val) {
185 if (reg_pair[i].reg == reg) {
186 reg_pair[i].val &= ~mask;
187 reg_pair[i].val |= val;
195 static void copy_reg_bits(struct reg_pair_t *reg_pair1,
196 struct reg_pair_t *reg_pair2)
202 while (reg_pair1[i].reg || reg_pair1[i].val) {
203 while (reg_pair2[j].reg || reg_pair2[j].reg) {
204 if (reg_pair1[i].reg != reg_pair2[j].reg) {
208 reg_pair2[j].val = reg_pair1[i].val;
216 /* ------------------------------------------------------------------------- */
218 static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
219 enum mxl5007t_mode mode,
220 s32 if_diff_out_level)
223 case MxL_MODE_OTA_DVBT_ATSC:
224 set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06);
225 set_reg_bits(state->tab_init, 0x35, 0xff, 0x0e);
227 case MxL_MODE_OTA_ISDBT:
228 set_reg_bits(state->tab_init, 0x32, 0x0f, 0x06);
229 set_reg_bits(state->tab_init, 0x35, 0xff, 0x12);
231 case MxL_MODE_CABLE_DIGITAL:
232 set_reg_bits(state->tab_init_cable, 0x71, 0xff, 0x01);
233 set_reg_bits(state->tab_init_cable, 0x72, 0xff,
234 8 - if_diff_out_level);
235 set_reg_bits(state->tab_init_cable, 0x74, 0xff, 0x17);
243 static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
244 enum mxl5007t_if_freq if_freq,
256 case MxL_IF_4_57_MHZ:
262 case MxL_IF_5_38_MHZ:
268 case MxL_IF_6_28_MHZ:
271 case MxL_IF_9_1915_MHZ:
274 case MxL_IF_35_25_MHZ:
277 case MxL_IF_36_15_MHZ:
287 set_reg_bits(state->tab_init, 0x0c, 0xf0, val);
289 /* set inverted IF or normal IF */
290 set_reg_bits(state->tab_init, 0x0c, 0x08, invert_if ? 0x08 : 0x00);
295 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
296 enum mxl5007t_xtal_freq xtal_freq)
301 case MxL_XTAL_16_MHZ:
302 val = 0x00; /* select xtal freq & Ref Freq */
304 case MxL_XTAL_20_MHZ:
307 case MxL_XTAL_20_25_MHZ:
310 case MxL_XTAL_20_48_MHZ:
313 case MxL_XTAL_24_MHZ:
316 case MxL_XTAL_25_MHZ:
319 case MxL_XTAL_25_14_MHZ:
322 case MxL_XTAL_27_MHZ:
325 case MxL_XTAL_28_8_MHZ:
328 case MxL_XTAL_32_MHZ:
331 case MxL_XTAL_40_MHZ:
334 case MxL_XTAL_44_MHZ:
337 case MxL_XTAL_48_MHZ:
340 case MxL_XTAL_49_3811_MHZ:
347 set_reg_bits(state->tab_init, 0x0b, 0xff, val);
352 static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
353 enum mxl5007t_mode mode)
355 struct mxl5007t_config *cfg = state->config;
357 memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
358 memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
360 mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
361 mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
362 mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
364 set_reg_bits(state->tab_init, 0x10, 0x40, cfg->loop_thru_enable << 6);
366 set_reg_bits(state->tab_init, 0xd8, 0x08, cfg->clk_out_enable << 3);
368 set_reg_bits(state->tab_init, 0x10, 0x07, cfg->clk_out_amp);
370 /* set IDAC to automatic mode control by AGC */
371 set_reg_bits(state->tab_init, 0x12, 0x80, 0x00);
373 if (mode >= MxL_MODE_CABLE_DIGITAL) {
374 copy_reg_bits(state->tab_init, state->tab_init_cable);
375 return state->tab_init_cable;
377 return state->tab_init;
380 /* ------------------------------------------------------------------------- */
382 enum mxl5007t_bw_mhz {
388 static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
389 enum mxl5007t_bw_mhz bw)
395 val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
396 * and DIG_MODEINDEX_CSF */
408 set_reg_bits(state->tab_rftune, 0x13, 0x3f, val);
414 reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
415 u32 rf_freq, enum mxl5007t_bw_mhz bw)
419 u32 frac_divider = 1000000;
422 memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));
424 mxl5007t_set_bw_bits(state, bw);
426 /* Convert RF frequency into 16 bits =>
427 * 10 bit integer (MHz) + 6 bit fraction */
428 dig_rf_freq = rf_freq / MHz;
430 temp = rf_freq % MHz;
432 for (i = 0; i < 6; i++) {
435 if (temp > frac_divider) {
436 temp -= frac_divider;
441 /* add to have shift center point by 7.8124 kHz */
445 set_reg_bits(state->tab_rftune, 0x14, 0xff, (u8)dig_rf_freq);
446 set_reg_bits(state->tab_rftune, 0x15, 0xff, (u8)(dig_rf_freq >> 8));
448 return state->tab_rftune;
451 /* ------------------------------------------------------------------------- */
453 static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
455 u8 buf[] = { reg, val };
456 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
457 .buf = buf, .len = 2 };
460 ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
468 static int mxl5007t_write_regs(struct mxl5007t_state *state,
469 struct reg_pair_t *reg_pair)
474 while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
475 ret = mxl5007t_write_reg(state,
476 reg_pair[i].reg, reg_pair[i].val);
482 static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
484 struct i2c_msg msg[] = {
485 { .addr = state->i2c_props.addr, .flags = 0,
486 .buf = ®, .len = 1 },
487 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
488 .buf = val, .len = 1 },
492 ret = i2c_transfer(state->i2c_props.adap, msg, 2);
500 static int mxl5007t_soft_reset(struct mxl5007t_state *state)
503 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
504 .buf = &d, .len = 1 };
506 int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
515 static int mxl5007t_tuner_init(struct mxl5007t_state *state,
516 enum mxl5007t_mode mode)
518 struct reg_pair_t *init_regs;
521 ret = mxl5007t_soft_reset(state);
525 /* calculate initialization reg array */
526 init_regs = mxl5007t_calc_init_regs(state, mode);
528 ret = mxl5007t_write_regs(state, init_regs);
533 ret = mxl5007t_write_reg(state, 0x2c, 0x35);
539 static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
540 enum mxl5007t_bw_mhz bw)
542 struct reg_pair_t *rf_tune_regs;
545 /* calculate channel change reg array */
546 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
548 ret = mxl5007t_write_regs(state, rf_tune_regs);
556 /* ------------------------------------------------------------------------- */
558 static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
559 int *rf_locked, int *ref_locked)
567 ret = mxl5007t_read_reg(state, 0xcf, &d);
571 if ((d & 0x0c) == 0x0c)
574 if ((d & 0x03) == 0x03)
580 /* ------------------------------------------------------------------------- */
582 static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
584 struct mxl5007t_state *state = fe->tuner_priv;
585 int rf_locked, ref_locked;
588 if (fe->ops.i2c_gate_ctrl)
589 fe->ops.i2c_gate_ctrl(fe, 1);
591 ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
594 mxl_debug("%s%s", rf_locked ? "rf locked " : "",
595 ref_locked ? "ref locked" : "");
597 if (fe->ops.i2c_gate_ctrl)
598 fe->ops.i2c_gate_ctrl(fe, 0);
603 /* ------------------------------------------------------------------------- */
605 static int mxl5007t_set_params(struct dvb_frontend *fe,
606 struct dvb_frontend_parameters *params)
608 struct mxl5007t_state *state = fe->tuner_priv;
609 enum mxl5007t_bw_mhz bw;
610 enum mxl5007t_mode mode;
612 u32 freq = params->frequency;
614 if (fe->ops.info.type == FE_ATSC) {
615 switch (params->u.vsb.modulation) {
618 mode = MxL_MODE_OTA_DVBT_ATSC;
622 mode = MxL_MODE_CABLE_DIGITAL;
625 mxl_err("modulation not set!");
629 } else if (fe->ops.info.type == FE_OFDM) {
630 switch (params->u.ofdm.bandwidth) {
631 case BANDWIDTH_6_MHZ:
634 case BANDWIDTH_7_MHZ:
637 case BANDWIDTH_8_MHZ:
641 mxl_err("bandwidth not set!");
644 mode = MxL_MODE_OTA_DVBT_ATSC;
646 mxl_err("modulation type not supported!");
650 if (fe->ops.i2c_gate_ctrl)
651 fe->ops.i2c_gate_ctrl(fe, 1);
653 mutex_lock(&state->lock);
655 ret = mxl5007t_tuner_init(state, mode);
659 ret = mxl5007t_tuner_rf_tune(state, freq, bw);
663 state->frequency = freq;
664 state->bandwidth = (fe->ops.info.type == FE_OFDM) ?
665 params->u.ofdm.bandwidth : 0;
667 mutex_unlock(&state->lock);
669 if (fe->ops.i2c_gate_ctrl)
670 fe->ops.i2c_gate_ctrl(fe, 0);
675 /* ------------------------------------------------------------------------- */
677 static int mxl5007t_init(struct dvb_frontend *fe)
679 struct mxl5007t_state *state = fe->tuner_priv;
683 if (fe->ops.i2c_gate_ctrl)
684 fe->ops.i2c_gate_ctrl(fe, 1);
686 ret = mxl5007t_read_reg(state, 0x05, &d);
690 ret = mxl5007t_write_reg(state, 0x05, d | 0x01);
693 if (fe->ops.i2c_gate_ctrl)
694 fe->ops.i2c_gate_ctrl(fe, 0);
699 static int mxl5007t_sleep(struct dvb_frontend *fe)
701 struct mxl5007t_state *state = fe->tuner_priv;
705 if (fe->ops.i2c_gate_ctrl)
706 fe->ops.i2c_gate_ctrl(fe, 1);
708 ret = mxl5007t_read_reg(state, 0x05, &d);
712 ret = mxl5007t_write_reg(state, 0x05, d & ~0x01);
715 if (fe->ops.i2c_gate_ctrl)
716 fe->ops.i2c_gate_ctrl(fe, 0);
721 /* ------------------------------------------------------------------------- */
723 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
725 struct mxl5007t_state *state = fe->tuner_priv;
726 *frequency = state->frequency;
730 static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
732 struct mxl5007t_state *state = fe->tuner_priv;
733 *bandwidth = state->bandwidth;
737 static int mxl5007t_release(struct dvb_frontend *fe)
739 struct mxl5007t_state *state = fe->tuner_priv;
741 mutex_lock(&mxl5007t_list_mutex);
744 hybrid_tuner_release_state(state);
746 mutex_unlock(&mxl5007t_list_mutex);
748 fe->tuner_priv = NULL;
753 /* ------------------------------------------------------------------------- */
755 static struct dvb_tuner_ops mxl5007t_tuner_ops = {
757 .name = "MaxLinear MxL5007T",
759 .init = mxl5007t_init,
760 .sleep = mxl5007t_sleep,
761 .set_params = mxl5007t_set_params,
762 .get_status = mxl5007t_get_status,
763 .get_frequency = mxl5007t_get_frequency,
764 .get_bandwidth = mxl5007t_get_bandwidth,
765 .release = mxl5007t_release,
768 static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
774 ret = mxl5007t_read_reg(state, 0xd3, &id);
780 name = "MxL5007.v1.f1";
783 name = "MxL5007.v1.f2";
785 case MxL_5007_V2_100_F1:
786 name = "MxL5007.v2.100.f1";
788 case MxL_5007_V2_100_F2:
789 name = "MxL5007.v2.100.f2";
791 case MxL_5007_V2_200_F1:
792 name = "MxL5007.v2.200.f1";
794 case MxL_5007_V2_200_F2:
795 name = "MxL5007.v2.200.f2";
802 mxl_info("%s detected @ %d-%04x", name,
803 i2c_adapter_id(state->i2c_props.adap),
804 state->i2c_props.addr);
807 mxl_warn("unable to identify device @ %d-%04x",
808 i2c_adapter_id(state->i2c_props.adap),
809 state->i2c_props.addr);
811 state->chip_id = MxL_UNKNOWN_ID;
815 struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
816 struct i2c_adapter *i2c, u8 addr,
817 struct mxl5007t_config *cfg)
819 struct mxl5007t_state *state = NULL;
822 mutex_lock(&mxl5007t_list_mutex);
823 instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
824 hybrid_tuner_instance_list,
825 i2c, addr, "mxl5007");
830 /* new tuner instance */
833 mutex_init(&state->lock);
835 if (fe->ops.i2c_gate_ctrl)
836 fe->ops.i2c_gate_ctrl(fe, 1);
838 ret = mxl5007t_get_chip_id(state);
840 if (fe->ops.i2c_gate_ctrl)
841 fe->ops.i2c_gate_ctrl(fe, 0);
843 /* check return value of mxl5007t_get_chip_id */
848 /* existing tuner instance */
851 fe->tuner_priv = state;
852 mutex_unlock(&mxl5007t_list_mutex);
854 memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
855 sizeof(struct dvb_tuner_ops));
859 mutex_unlock(&mxl5007t_list_mutex);
861 mxl5007t_release(fe);
864 EXPORT_SYMBOL_GPL(mxl5007t_attach);
865 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
866 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
867 MODULE_LICENSE("GPL");
868 MODULE_VERSION("0.1");
871 * Overrides for Emacs so that we follow Linus's tabbing style.
872 * ---------------------------------------------------------------------------