2 * twl4030_core.c - driver for TWL4030/TPS659x0 PM and audio CODEC devices
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
30 #include <linux/kernel_stat.h>
31 #include <linux/init.h>
32 #include <linux/mutex.h>
33 #include <linux/interrupt.h>
34 #include <linux/irq.h>
35 #include <linux/random.h>
36 #include <linux/kthread.h>
37 #include <linux/platform_device.h>
38 #include <linux/clk.h>
40 #include <linux/i2c.h>
41 #include <linux/i2c/twl4030.h>
42 #include <linux/i2c/twl4030-gpio.h>
43 #include <linux/i2c/twl4030-madc.h>
44 #include <linux/i2c/twl4030-pwrirq.h>
46 #define DRIVER_NAME "twl4030"
49 /* Primary Interrupt Handler on TWL4030 Registers */
51 /* Register Definitions */
53 #define REG_PIH_ISR_P1 (0x1)
54 #define REG_PIH_ISR_P2 (0x2)
55 #define REG_PIH_SIR (0x3)
57 /* Triton Core internal information (BEGIN) */
59 /* Last - for index max*/
60 #define TWL4030_MODULE_LAST TWL4030_MODULE_SECURED_REG
62 #define TWL4030_NUM_SLAVES 4
65 #define TWL4030_SLAVENUM_NUM0 0x00
66 #define TWL4030_SLAVENUM_NUM1 0x01
67 #define TWL4030_SLAVENUM_NUM2 0x02
68 #define TWL4030_SLAVENUM_NUM3 0x03
70 /* Base Address defns */
72 #define TWL4030_BASEADD_USB 0x0000
74 #define TWL4030_BASEADD_AUDIO_VOICE 0x0000
75 #define TWL4030_BASEADD_GPIO 0x0098
77 #define TWL4030_BASEADD_INTBR 0x0085
78 #define TWL4030_BASEADD_PIH 0x0080
79 #define TWL4030_BASEADD_TEST 0x004C
81 #define TWL4030_BASEADD_INTERRUPTS 0x00B9
82 #define TWL4030_BASEADD_LED 0x00EE
83 #define TWL4030_BASEADD_MADC 0x0000
84 #define TWL4030_BASEADD_MAIN_CHARGE 0x0074
85 #define TWL4030_BASEADD_PRECHARGE 0x00AA
86 #define TWL4030_BASEADD_PWM0 0x00F8
87 #define TWL4030_BASEADD_PWM1 0x00FB
88 #define TWL4030_BASEADD_PWMA 0x00EF
89 #define TWL4030_BASEADD_PWMB 0x00F1
90 #define TWL4030_BASEADD_KEYPAD 0x00D2
92 #define TWL4030_BASEADD_BACKUP 0x0014
93 #define TWL4030_BASEADD_INT 0x002E
94 #define TWL4030_BASEADD_PM_MASTER 0x0036
95 #define TWL4030_BASEADD_PM_RECEIVER 0x005B
96 #define TWL4030_BASEADD_RTC 0x001C
97 #define TWL4030_BASEADD_SECURED_REG 0x0000
99 /* TWL4030 BCI registers */
100 #define TWL4030_INTERRUPTS_BCIIMR1A 0x2
101 #define TWL4030_INTERRUPTS_BCIIMR2A 0x3
102 #define TWL4030_INTERRUPTS_BCIIMR1B 0x6
103 #define TWL4030_INTERRUPTS_BCIIMR2B 0x7
104 #define TWL4030_INTERRUPTS_BCIISR1A 0x0
105 #define TWL4030_INTERRUPTS_BCIISR2A 0x1
106 #define TWL4030_INTERRUPTS_BCIISR1B 0x4
107 #define TWL4030_INTERRUPTS_BCIISR2B 0x5
109 /* TWL4030 keypad registers */
110 #define TWL4030_KEYPAD_KEYP_IMR1 0x12
111 #define TWL4030_KEYPAD_KEYP_IMR2 0x14
112 #define TWL4030_KEYPAD_KEYP_ISR1 0x11
113 #define TWL4030_KEYPAD_KEYP_ISR2 0x13
116 /* Triton Core internal information (END) */
118 /* Few power values */
119 #define R_CFG_BOOT 0x05
120 #define R_PROTECT_KEY 0x0E
123 #define KEY_UNLOCK1 0xce
124 #define KEY_UNLOCK2 0xec
125 #define KEY_LOCK 0x00
127 #define HFCLK_FREQ_19p2_MHZ (1 << 0)
128 #define HFCLK_FREQ_26_MHZ (2 << 0)
129 #define HFCLK_FREQ_38p4_MHZ (3 << 0)
130 #define HIGH_PERF_SQ (1 << 3)
132 /* SIH_CTRL registers that aren't defined elsewhere */
133 #define TWL4030_INTERRUPTS_BCISIHCTRL 0x0d
134 #define TWL4030_MADC_MADC_SIH_CTRL 0x67
135 #define TWL4030_KEYPAD_KEYP_SIH_CTRL 0x17
137 #define TWL4030_SIH_CTRL_COR_MASK (1 << 2)
140 * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init
141 * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO)
142 * @sih_ctrl: address of module SIH_CTRL register
143 * @reg_cnt: number of IMR/ISR regs
144 * @imrs: pointer to array of TWL module interrupt mask register indices
145 * @isrs: pointer to array of TWL module interrupt status register indices
147 * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear
148 * during twl_init_irq().
150 struct twl4030_mod_iregs {
158 /* TWL4030 INT module interrupt mask registers */
159 static const u8 __initconst twl4030_int_imr_regs[] = {
160 TWL4030_INT_PWR_IMR1,
161 TWL4030_INT_PWR_IMR2,
164 /* TWL4030 INT module interrupt status registers */
165 static const u8 __initconst twl4030_int_isr_regs[] = {
166 TWL4030_INT_PWR_ISR1,
167 TWL4030_INT_PWR_ISR2,
170 /* TWL4030 INTERRUPTS module interrupt mask registers */
171 static const u8 __initconst twl4030_interrupts_imr_regs[] = {
172 TWL4030_INTERRUPTS_BCIIMR1A,
173 TWL4030_INTERRUPTS_BCIIMR1B,
174 TWL4030_INTERRUPTS_BCIIMR2A,
175 TWL4030_INTERRUPTS_BCIIMR2B,
178 /* TWL4030 INTERRUPTS module interrupt status registers */
179 static const u8 __initconst twl4030_interrupts_isr_regs[] = {
180 TWL4030_INTERRUPTS_BCIISR1A,
181 TWL4030_INTERRUPTS_BCIISR1B,
182 TWL4030_INTERRUPTS_BCIISR2A,
183 TWL4030_INTERRUPTS_BCIISR2B,
186 /* TWL4030 MADC module interrupt mask registers */
187 static const u8 __initconst twl4030_madc_imr_regs[] = {
192 /* TWL4030 MADC module interrupt status registers */
193 static const u8 __initconst twl4030_madc_isr_regs[] = {
198 /* TWL4030 keypad module interrupt mask registers */
199 static const u8 __initconst twl4030_keypad_imr_regs[] = {
200 TWL4030_KEYPAD_KEYP_IMR1,
201 TWL4030_KEYPAD_KEYP_IMR2,
204 /* TWL4030 keypad module interrupt status registers */
205 static const u8 __initconst twl4030_keypad_isr_regs[] = {
206 TWL4030_KEYPAD_KEYP_ISR1,
207 TWL4030_KEYPAD_KEYP_ISR2,
210 /* TWL4030 GPIO module interrupt mask registers */
211 static const u8 __initconst twl4030_gpio_imr_regs[] = {
220 /* TWL4030 GPIO module interrupt status registers */
221 static const u8 __initconst twl4030_gpio_isr_regs[] = {
230 /* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */
231 static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = {
233 .mod_no = TWL4030_MODULE_INT,
234 .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL,
235 .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs),
236 .imrs = twl4030_int_imr_regs,
237 .isrs = twl4030_int_isr_regs,
240 .mod_no = TWL4030_MODULE_INTERRUPTS,
241 .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL,
242 .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs),
243 .imrs = twl4030_interrupts_imr_regs,
244 .isrs = twl4030_interrupts_isr_regs,
247 .mod_no = TWL4030_MODULE_MADC,
248 .sih_ctrl = TWL4030_MADC_MADC_SIH_CTRL,
249 .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs),
250 .imrs = twl4030_madc_imr_regs,
251 .isrs = twl4030_madc_isr_regs,
254 .mod_no = TWL4030_MODULE_KEYPAD,
255 .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL,
256 .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs),
257 .imrs = twl4030_keypad_imr_regs,
258 .isrs = twl4030_keypad_isr_regs,
261 .mod_no = TWL4030_MODULE_GPIO,
262 .sih_ctrl = REG_GPIO_SIH_CTRL,
263 .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs),
264 .imrs = twl4030_gpio_imr_regs,
265 .isrs = twl4030_gpio_isr_regs,
270 /* Data Structures */
271 /* To have info on T2 IRQ substem activated or not */
272 static struct completion irq_event;
274 /* Structure to define on TWL4030 Slave ID */
275 struct twl4030_client {
276 struct i2c_client *client;
280 /* max numb of i2c_msg required is for read =2 */
281 struct i2c_msg xfer_msg[2];
283 /* To lock access to xfer_msg */
284 struct mutex xfer_lock;
288 struct twl4030mapping {
289 unsigned char sid; /* Slave ID */
290 unsigned char base; /* base address */
293 /* mapping the module id to slave id and base address */
294 static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
295 { TWL4030_SLAVENUM_NUM0, TWL4030_BASEADD_USB },
296 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_AUDIO_VOICE },
297 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_GPIO },
298 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_INTBR },
299 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_PIH },
300 { TWL4030_SLAVENUM_NUM1, TWL4030_BASEADD_TEST },
301 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_KEYPAD },
302 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_MADC },
303 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_INTERRUPTS },
304 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_LED },
305 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_MAIN_CHARGE },
306 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PRECHARGE },
307 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWM0 },
308 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWM1 },
309 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWMA },
310 { TWL4030_SLAVENUM_NUM2, TWL4030_BASEADD_PWMB },
311 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_BACKUP },
312 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_INT },
313 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_PM_MASTER },
314 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_PM_RECEIVER },
315 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_RTC },
316 { TWL4030_SLAVENUM_NUM3, TWL4030_BASEADD_SECURED_REG },
319 static struct twl4030_client twl4030_modules[TWL4030_NUM_SLAVES];
322 * TWL4030 doesn't have PIH mask, hence dummy function for mask
326 static void twl4030_i2c_ackirq(unsigned int irq)
330 static void twl4030_i2c_disableint(unsigned int irq)
334 static void twl4030_i2c_enableint(unsigned int irq)
338 /* information for processing in the Work Item */
339 static struct irq_chip twl4030_irq_chip = {
341 .ack = twl4030_i2c_ackirq,
342 .mask = twl4030_i2c_disableint,
343 .unmask = twl4030_i2c_enableint,
346 /* Global Functions */
349 * twl4030_i2c_write - Writes a n bit register in TWL4030
350 * @mod_no: module number
351 * @value: an array of num_bytes+1 containing data to write
352 * @reg: register address (just offset will do)
353 * @num_bytes: number of bytes to transfer
355 * IMPORTANT: for 'value' parameter: Allocate value num_bytes+1 and
356 * valid data starts at Offset 1.
358 * Returns the result of operation - 0 is success
360 int twl4030_i2c_write(u8 mod_no, u8 *value, u8 reg, u8 num_bytes)
364 struct twl4030_client *twl;
367 if (unlikely(mod_no > TWL4030_MODULE_LAST)) {
368 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
371 sid = twl4030_map[mod_no].sid;
372 twl = &twl4030_modules[sid];
374 if (unlikely(!twl->inuse)) {
375 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
378 mutex_lock(&twl->xfer_lock);
380 * [MSG1]: fill the register address data
381 * fill the data Tx buffer
383 msg = &twl->xfer_msg[0];
384 msg->addr = twl->address;
385 msg->len = num_bytes + 1;
388 /* over write the first byte of buffer with the register address */
389 *value = twl4030_map[mod_no].base + reg;
390 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 1);
391 mutex_unlock(&twl->xfer_lock);
393 /* i2cTransfer returns num messages.translate it pls.. */
398 EXPORT_SYMBOL(twl4030_i2c_write);
401 * twl4030_i2c_read - Reads a n bit register in TWL4030
402 * @mod_no: module number
403 * @value: an array of num_bytes containing data to be read
404 * @reg: register address (just offset will do)
405 * @num_bytes: number of bytes to transfer
407 * Returns result of operation - num_bytes is success else failure.
409 int twl4030_i2c_read(u8 mod_no, u8 *value, u8 reg, u8 num_bytes)
414 struct twl4030_client *twl;
417 if (unlikely(mod_no > TWL4030_MODULE_LAST)) {
418 pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
421 sid = twl4030_map[mod_no].sid;
422 twl = &twl4030_modules[sid];
424 if (unlikely(!twl->inuse)) {
425 pr_err("%s: client %d is not initialized\n", DRIVER_NAME, sid);
428 mutex_lock(&twl->xfer_lock);
429 /* [MSG1] fill the register address data */
430 msg = &twl->xfer_msg[0];
431 msg->addr = twl->address;
433 msg->flags = 0; /* Read the register value */
434 val = twl4030_map[mod_no].base + reg;
436 /* [MSG2] fill the data rx buffer */
437 msg = &twl->xfer_msg[1];
438 msg->addr = twl->address;
439 msg->flags = I2C_M_RD; /* Read the register value */
440 msg->len = num_bytes; /* only n bytes */
442 ret = i2c_transfer(twl->client->adapter, twl->xfer_msg, 2);
443 mutex_unlock(&twl->xfer_lock);
445 /* i2cTransfer returns num messages.translate it pls.. */
450 EXPORT_SYMBOL(twl4030_i2c_read);
453 * twl4030_i2c_write_u8 - Writes a 8 bit register in TWL4030
454 * @mod_no: module number
455 * @value: the value to be written 8 bit
456 * @reg: register address (just offset will do)
458 * Returns result of operation - 0 is success
460 int twl4030_i2c_write_u8(u8 mod_no, u8 value, u8 reg)
463 /* 2 bytes offset 1 contains the data offset 0 is used by i2c_write */
464 u8 temp_buffer[2] = { 0 };
465 /* offset 1 contains the data */
466 temp_buffer[1] = value;
467 return twl4030_i2c_write(mod_no, temp_buffer, reg, 1);
469 EXPORT_SYMBOL(twl4030_i2c_write_u8);
472 * twl4030_i2c_read_u8 - Reads a 8 bit register from TWL4030
473 * @mod_no: module number
474 * @value: the value read 8 bit
475 * @reg: register address (just offset will do)
477 * Returns result of operation - 0 is success
479 int twl4030_i2c_read_u8(u8 mod_no, u8 *value, u8 reg)
481 return twl4030_i2c_read(mod_no, value, reg, 1);
483 EXPORT_SYMBOL(twl4030_i2c_read_u8);
485 /* Helper Functions */
488 * do_twl4030_module_irq() is the desc->handle method for each of the twl4030
489 * module interrupts. It executes in kernel thread context.
490 * On entry, cpu interrupts are disabled.
492 static void do_twl4030_module_irq(unsigned int irq, irq_desc_t *desc)
494 struct irqaction *action;
495 const unsigned int cpu = smp_processor_id();
498 * Earlier this was desc->triggered = 1;
500 desc->status |= IRQ_LEVEL;
503 * The desc->handle method would normally call the desc->chip->ack
504 * method here, but we won't bother since our ack method is NULL.
508 kstat_cpu(cpu).irqs[irq]++;
510 action = desc->action;
519 /* Call the ISR with cpu interrupts enabled */
520 ret = action->handler(irq, action->dev_id);
521 if (ret == IRQ_HANDLED)
522 status |= action->flags;
524 action = action->next;
527 if (status & IRQF_SAMPLE_RANDOM)
528 add_interrupt_randomness(irq);
532 if (retval != IRQ_HANDLED)
533 printk(KERN_ERR "ISR for TWL4030 module"
534 " irq %d can't handle interrupt\n",
538 * Here is where we should call the unmask method, but
539 * again we won't bother since it is NULL.
542 printk(KERN_CRIT "TWL4030 module irq %d has no ISR"
543 " but can't be masked!\n", irq);
545 printk(KERN_CRIT "TWL4030 module irq %d is disabled but can't"
546 " be masked!\n", irq);
549 static unsigned twl4030_irq_base;
552 * twl4030_irq_thread() runs as a kernel thread. It queries the twl4030
553 * interrupt controller to see which modules are generating interrupt requests
554 * and then calls the desc->handle method for each module requesting service.
556 static int twl4030_irq_thread(void *data)
559 irq_desc_t *desc = irq_desc + irq;
560 static unsigned i2c_errors;
561 const static unsigned max_i2c_errors = 100;
563 daemonize("twl4030-irq");
564 current->flags |= PF_NOFREEZE;
566 while (!kthread_should_stop()) {
571 wait_for_completion_interruptible(&irq_event);
573 ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr,
576 printk(KERN_WARNING "I2C error %d while reading TWL4030"
577 " PIH ISR register.\n", ret);
578 if (++i2c_errors >= max_i2c_errors) {
579 printk(KERN_ERR "Maximum I2C error count"
580 " exceeded. Terminating %s.\n",
587 for (module_irq = twl4030_irq_base; 0 != pih_isr;
588 pih_isr >>= 1, module_irq++) {
590 irq_desc_t *d = irq_desc + module_irq;
594 d->handle_irq(module_irq, d);
600 desc->chip->unmask(irq);
607 * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt.
608 * This is a chained interrupt, so there is no desc->action method for it.
609 * Now we need to query the interrupt controller in the twl4030 to determine
610 * which module is generating the interrupt request. However, we can't do i2c
611 * transactions in interrupt context, so we must defer that work to a kernel
612 * thread. All we do here is acknowledge and mask the interrupt and wakeup
615 static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc)
617 const unsigned int cpu = smp_processor_id();
620 * Earlier this was desc->triggered = 1;
622 desc->status |= IRQ_LEVEL;
625 * Acknowledge, clear _AND_ disable the interrupt.
627 desc->chip->ack(irq);
630 kstat_cpu(cpu).irqs[irq]++;
632 complete(&irq_event);
636 static int add_children(struct twl4030_platform_data *pdata)
638 struct platform_device *pdev = NULL;
639 struct twl4030_client *twl = NULL;
642 #ifdef CONFIG_RTC_DRV_TWL4030
643 pdev = platform_device_alloc("twl4030_rtc", -1);
645 twl = &twl4030_modules[TWL4030_SLAVENUM_NUM3];
646 pdev->dev.parent = &twl->client->dev;
647 device_init_wakeup(&pdev->dev, 1);
650 * FIXME add the relevant IRQ resource, and make the
651 * rtc driver use it instead of hard-wiring ...
653 * REVISIT platform_data here currently only supports
654 * setting up the "msecure" line ... which actually
655 * violates the "princple of least privilege", since
656 * it's effectively always in "high trust" mode.
658 * For now, expect equivalent treatment at board init:
659 * setting msecure high. Eventually, Linux might
660 * become more aware of those HW security concerns.
663 status = platform_device_add(pdev);
665 platform_device_put(pdev);
673 static struct task_struct * __init start_twl4030_irq_thread(int irq)
675 struct task_struct *thread;
677 init_completion(&irq_event);
678 thread = kthread_run(twl4030_irq_thread, (void *)irq,
679 "twl4030 irq %d", irq);
681 pr_err("%s: could not create twl4030 irq %d thread!\n",
688 * These three functions should be part of Voltage frame work
689 * added here to complete the functionality for now.
691 static int __init protect_pm_master(void)
695 e = twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_LOCK,
700 static int __init unprotect_pm_master(void)
704 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK1,
706 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, KEY_UNLOCK2,
711 static int __init power_companion_init(void)
715 u8 ctrl = HFCLK_FREQ_26_MHZ;
718 if (cpu_is_omap2430())
719 osc = clk_get(NULL, "osc_ck");
721 osc = clk_get(NULL, "osc_sys_ck");
723 printk(KERN_WARNING "Skipping twl3040 internal clock init and "
724 "using bootloader value (unknown osc rate)\n");
728 rate = clk_get_rate(osc);
733 ctrl = HFCLK_FREQ_19p2_MHZ;
736 ctrl = HFCLK_FREQ_26_MHZ;
739 ctrl = HFCLK_FREQ_38p4_MHZ;
743 ctrl |= HIGH_PERF_SQ;
744 e |= unprotect_pm_master();
745 /* effect->MADC+USB ck en */
746 e |= twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
747 e |= protect_pm_master();
753 * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write
754 * @mod_no: TWL4030 module number
755 * @reg: register index to clear
756 * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0)
758 * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt
759 * status register to ensure that any prior interrupts are cleared.
760 * Returns the status from the I2C read operation.
762 static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor)
766 return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) :
767 twl4030_i2c_write_u8(mod_no, 0xff, reg);
771 * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes?
772 * @mod_no: TWL4030 module number
773 * @reg: register index to clear
775 * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for
776 * the specified TWL module are cleared by reads, or 0 if cleared by
779 static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
783 WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0);
785 tmp &= TWL4030_SIH_CTRL_COR_MASK;
786 tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK);
792 * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts
793 * @t: pointer to twl4030_mod_iregs array
794 * @t_sz: ARRAY_SIZE(t) (starting at 1)
796 * Mask all TWL4030 interrupt mask registers (IMRs) and clear all
797 * interrupt status registers (ISRs). No return value, but will WARN if
798 * any I2C operations fail.
800 static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t,
806 * N.B. - further efficiency is possible here. Eight I2C
807 * operations on BCI and GPIO modules are avoidable if I2C
808 * burst read/write transactions were implemented. Would
809 * probably save about 1ms of boot time and a small amount of
812 for (i = 0; i < t_sz; i++) {
813 const struct twl4030_mod_iregs tmr = t[i];
816 /* Are ISRs cleared by reads or writes? */
817 cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
820 for (j = 0; j < tmr.reg_cnt; j++) {
822 /* Mask interrupts at the TWL4030 */
823 WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
826 /* Clear TWL4030 ISRs */
827 WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
828 tmr.isrs[j], cor) < 0);
836 static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
840 char *msg = "Unable to register interrupt subsystem";
843 * Mask and clear all TWL4030 interrupts since initially we do
844 * not have any TWL4030 module interrupt handlers present
846 twl4030_mask_clear_intrs(twl4030_mod_regs,
847 ARRAY_SIZE(twl4030_mod_regs));
849 twl4030_irq_base = irq_base;
851 /* install an irq handler for each of the PIH modules */
852 for (i = irq_base; i < irq_end; i++) {
853 set_irq_chip(i, &twl4030_irq_chip);
854 set_irq_handler(i, do_twl4030_module_irq);
855 set_irq_flags(i, IRQF_VALID);
858 /* install an irq handler to demultiplex the TWL4030 interrupt */
859 set_irq_data(irq_num, start_twl4030_irq_thread(irq_num));
860 set_irq_type(irq_num, IRQ_TYPE_EDGE_FALLING);
861 set_irq_chained_handler(irq_num, do_twl4030_irq);
863 res = power_companion_init();
865 pr_err("%s: %s[%d]\n", DRIVER_NAME, msg, res);
868 /*----------------------------------------------------------------------*/
870 static int twl4030_remove(struct i2c_client *client)
874 /* FIXME undo twl_init_irq() */
875 if (twl4030_irq_base) {
876 dev_err(&client->dev, "can't yet clean up IRQs?\n");
880 for (i = 0; i < TWL4030_NUM_SLAVES; i++) {
881 struct twl4030_client *twl = &twl4030_modules[i];
883 if (twl->client && twl->client != client)
884 i2c_unregister_device(twl->client);
885 twl4030_modules[i].client = NULL;
886 twl4030_modules[i].inuse = false;
891 /* NOTE: this driver only handles a single twl4030/tps659x0 chip */
893 twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
897 struct twl4030_platform_data *pdata = client->dev.platform_data;
900 dev_dbg(&client->dev, "no platform data?\n");
904 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
905 dev_dbg(&client->dev, "can't talk I2C?\n");
909 for (i = 0; i < TWL4030_NUM_SLAVES; i++) {
910 if (twl4030_modules[i].inuse || twl4030_irq_base) {
911 dev_dbg(&client->dev, "driver is already in use\n");
916 for (i = 0; i < TWL4030_NUM_SLAVES; i++) {
917 struct twl4030_client *twl = &twl4030_modules[i];
919 twl->address = client->addr + i;
921 twl->client = client;
923 twl->client = i2c_new_dummy(client->adapter,
926 dev_err(&twl->client->dev,
927 "can't attach client %d\n", i);
931 strlcpy(twl->client->name, id->name,
932 sizeof(twl->client->name));
935 mutex_init(&twl->xfer_lock);
938 status = add_children(pdata);
943 * Check if the PIH module is initialized, if yes, then init
944 * the T2 Interrupt subsystem
946 if (twl4030_modules[twl4030_map[TWL4030_MODULE_PIH].sid].inuse
947 && twl4030_irq_base == 0
950 && pdata->irq_end > pdata->irq_base)
951 twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end);
953 dev_info(&client->dev, "chaining %d irqs\n",
955 ? (pdata->irq_end - pdata->irq_base)
960 twl4030_remove(client);
964 static const struct i2c_device_id twl4030_ids[] = {
965 { "twl4030", 0 }, /* "Triton 2" */
966 { "tps65950", 0 }, /* catalog version of twl4030 */
967 { "tps65930", 0 }, /* fewer LDOs and DACs; no charger */
968 { "tps65920", 0 }, /* fewer LDOs; no codec or charger */
969 { /* end of list */ },
971 MODULE_DEVICE_TABLE(i2c, twl4030_ids);
973 /* One Client Driver , 4 Clients */
974 static struct i2c_driver twl4030_driver = {
975 .driver.name = DRIVER_NAME,
976 .id_table = twl4030_ids,
977 .probe = twl4030_probe,
978 .remove = twl4030_remove,
981 static int __init twl4030_init(void)
983 return i2c_add_driver(&twl4030_driver);
985 subsys_initcall(twl4030_init);
987 static void __exit twl4030_exit(void)
989 i2c_del_driver(&twl4030_driver);
991 module_exit(twl4030_exit);
993 MODULE_AUTHOR("Texas Instruments, Inc.");
994 MODULE_DESCRIPTION("I2C Core interface for TWL4030");
995 MODULE_LICENSE("GPL");