2 * coretemp.c - Linux kernel module for hardware monitoring
4 * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz>
6 * Inspired from many hwmon drivers
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
23 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
25 #include <linux/module.h>
26 #include <linux/init.h>
27 #include <linux/slab.h>
28 #include <linux/jiffies.h>
29 #include <linux/hwmon.h>
30 #include <linux/sysfs.h>
31 #include <linux/hwmon-sysfs.h>
32 #include <linux/err.h>
33 #include <linux/mutex.h>
34 #include <linux/list.h>
35 #include <linux/platform_device.h>
36 #include <linux/cpu.h>
37 #include <linux/pci.h>
39 #include <asm/processor.h>
42 #define DRVNAME "coretemp"
44 #define BASE_SYSFS_ATTR_NO 2 /* Sysfs Base attr no for coretemp */
45 #define NUM_REAL_CORES 16 /* Number of Real cores per cpu */
46 #define CORETEMP_NAME_LENGTH 17 /* String Length of attrs */
47 #define MAX_ATTRS 5 /* Maximum no of per-core attrs */
48 #define MAX_CORE_DATA (NUM_REAL_CORES + BASE_SYSFS_ATTR_NO)
51 #define TO_PHYS_ID(cpu) cpu_data(cpu).phys_proc_id
52 #define TO_CORE_ID(cpu) cpu_data(cpu).cpu_core_id
53 #define TO_ATTR_NO(cpu) (TO_CORE_ID(cpu) + BASE_SYSFS_ATTR_NO)
55 #define TO_PHYS_ID(cpu) (cpu)
56 #define TO_CORE_ID(cpu) (cpu)
57 #define TO_ATTR_NO(cpu) (cpu)
61 * Per-Core Temperature Data
62 * @last_updated: The time when the current temperature value was updated
63 * earlier (in jiffies).
64 * @cpu_core_id: The CPU Core from which temperature values should be read
65 * This value is passed as "id" field to rdmsr/wrmsr functions.
66 * @status_reg: One of IA32_THERM_STATUS or IA32_PACKAGE_THERM_STATUS,
67 * from where the temperature values should be read.
68 * @is_pkg_data: If this is 1, the temp_data holds pkgtemp data.
69 * Otherwise, temp_data holds coretemp data.
70 * @valid: If this is 1, the current temperature is valid.
76 unsigned long last_updated;
82 struct sensor_device_attribute sd_attrs[MAX_ATTRS];
83 char attr_name[MAX_ATTRS][CORETEMP_NAME_LENGTH];
84 struct mutex update_lock;
87 /* Platform Data per Physical CPU */
88 struct platform_data {
89 struct device *hwmon_dev;
91 struct temp_data *core_data[MAX_CORE_DATA];
92 struct device_attribute name_attr;
96 struct list_head list;
97 struct platform_device *pdev;
103 static LIST_HEAD(pdev_list);
104 static DEFINE_MUTEX(pdev_list_mutex);
106 static ssize_t show_name(struct device *dev,
107 struct device_attribute *devattr, char *buf)
109 return sprintf(buf, "%s\n", DRVNAME);
112 static ssize_t show_label(struct device *dev,
113 struct device_attribute *devattr, char *buf)
115 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
116 struct platform_data *pdata = dev_get_drvdata(dev);
117 struct temp_data *tdata = pdata->core_data[attr->index];
119 if (tdata->is_pkg_data)
120 return sprintf(buf, "Physical id %u\n", pdata->phys_proc_id);
122 return sprintf(buf, "Core %u\n", tdata->cpu_core_id);
125 static ssize_t show_crit_alarm(struct device *dev,
126 struct device_attribute *devattr, char *buf)
129 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
130 struct platform_data *pdata = dev_get_drvdata(dev);
131 struct temp_data *tdata = pdata->core_data[attr->index];
133 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
135 return sprintf(buf, "%d\n", (eax >> 5) & 1);
138 static ssize_t show_tjmax(struct device *dev,
139 struct device_attribute *devattr, char *buf)
141 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
142 struct platform_data *pdata = dev_get_drvdata(dev);
144 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->tjmax);
147 static ssize_t show_ttarget(struct device *dev,
148 struct device_attribute *devattr, char *buf)
150 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
151 struct platform_data *pdata = dev_get_drvdata(dev);
153 return sprintf(buf, "%d\n", pdata->core_data[attr->index]->ttarget);
156 static ssize_t show_temp(struct device *dev,
157 struct device_attribute *devattr, char *buf)
160 struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr);
161 struct platform_data *pdata = dev_get_drvdata(dev);
162 struct temp_data *tdata = pdata->core_data[attr->index];
164 mutex_lock(&tdata->update_lock);
166 /* Check whether the time interval has elapsed */
167 if (!tdata->valid || time_after(jiffies, tdata->last_updated + HZ)) {
168 rdmsr_on_cpu(tdata->cpu, tdata->status_reg, &eax, &edx);
170 /* Check whether the data is valid */
171 if (eax & 0x80000000) {
172 tdata->temp = tdata->tjmax -
173 (((eax >> 16) & 0x7f) * 1000);
176 tdata->last_updated = jiffies;
179 mutex_unlock(&tdata->update_lock);
180 return tdata->valid ? sprintf(buf, "%d\n", tdata->temp) : -EAGAIN;
183 static int adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
185 /* The 100C is default for both mobile and non mobile CPUs */
188 int tjmax_ee = 85000;
192 struct pci_dev *host_bridge;
194 /* Early chips have no MSR for TjMax */
196 if ((c->x86_model == 0xf) && (c->x86_mask < 4)) {
202 if (c->x86_model == 0x1c) {
205 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
207 if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
208 && (host_bridge->device == 0xa000 /* NM10 based nettop */
209 || host_bridge->device == 0xa010)) /* NM10 based netbook */
214 pci_dev_put(host_bridge);
217 if ((c->x86_model > 0xe) && (usemsr_ee)) {
220 /* Now we can detect the mobile CPU using Intel provided table
221 http://softwarecommunity.intel.com/Wiki/Mobility/720.htm
222 For Core2 cores, check MSR 0x17, bit 28 1 = Mobile CPU
225 err = rdmsr_safe_on_cpu(id, 0x17, &eax, &edx);
228 "Unable to access MSR 0x17, assuming desktop"
231 } else if (c->x86_model < 0x17 && !(eax & 0x10000000)) {
232 /* Trust bit 28 up to Penryn, I could not find any
233 documentation on that; if you happen to know
234 someone at Intel please ask */
237 /* Platform ID bits 52:50 (EDX starts at bit 32) */
238 platform_id = (edx >> 18) & 0x7;
240 /* Mobile Penryn CPU seems to be platform ID 7 or 5
242 if ((c->x86_model == 0x17) &&
243 ((platform_id == 5) || (platform_id == 7))) {
244 /* If MSR EE bit is set, set it to 90 degrees C,
245 otherwise 105 degrees C */
254 err = rdmsr_safe_on_cpu(id, 0xee, &eax, &edx);
257 "Unable to access MSR 0xEE, for Tjmax, left"
259 } else if (eax & 0x40000000) {
262 /* if we dont use msr EE it means we are desktop CPU (with exeception
264 } else if (tjmax == 100000) {
265 dev_warn(dev, "Using relative temperature scale!\n");
271 static int get_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *dev)
273 /* The 100C is default for both mobile and non mobile CPUs */
278 /* A new feature of current Intel(R) processors, the
279 IA32_TEMPERATURE_TARGET contains the TjMax value */
280 err = rdmsr_safe_on_cpu(id, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
282 dev_warn(dev, "Unable to read TjMax from CPU.\n");
284 val = (eax >> 16) & 0xff;
286 * If the TjMax is not plausible, an assumption
289 if ((val > 80) && (val < 120)) {
290 dev_info(dev, "TjMax is %d C.\n", val);
296 * An assumption is made for early CPUs and unreadable MSR.
297 * NOTE: the given value may not be correct.
300 switch (c->x86_model) {
305 dev_warn(dev, "TjMax is assumed as 100 C!\n");
308 case 0x1c: /* Atom CPUs */
309 return adjust_tjmax(c, id, dev);
311 dev_warn(dev, "CPU (model=0x%x) is not supported yet,"
312 " using default TjMax of 100C.\n", c->x86_model);
317 static void __devinit get_ucode_rev_on_cpu(void *edx)
321 wrmsr(MSR_IA32_UCODE_REV, 0, 0);
323 rdmsr(MSR_IA32_UCODE_REV, eax, *(u32 *)edx);
326 static int get_pkg_tjmax(unsigned int cpu, struct device *dev)
331 err = rdmsr_safe_on_cpu(cpu, MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
333 val = (eax >> 16) & 0xff;
334 if ((val > 80) && (val < 120))
337 dev_warn(dev, "Unable to read Pkg-TjMax from CPU:%u\n", cpu);
338 return 100000; /* Default TjMax: 100 degree celsius */
341 static int create_name_attr(struct platform_data *pdata, struct device *dev)
343 pdata->name_attr.attr.name = "name";
344 pdata->name_attr.attr.mode = S_IRUGO;
345 pdata->name_attr.show = show_name;
346 return device_create_file(dev, &pdata->name_attr);
349 static int create_core_attrs(struct temp_data *tdata, struct device *dev,
353 static ssize_t (*rd_ptr[MAX_ATTRS]) (struct device *dev,
354 struct device_attribute *devattr, char *buf) = {
355 show_label, show_crit_alarm, show_ttarget,
356 show_temp, show_tjmax };
357 static const char *names[MAX_ATTRS] = {
358 "temp%d_label", "temp%d_crit_alarm",
359 "temp%d_max", "temp%d_input",
362 for (i = 0; i < MAX_ATTRS; i++) {
363 snprintf(tdata->attr_name[i], CORETEMP_NAME_LENGTH, names[i],
365 tdata->sd_attrs[i].dev_attr.attr.name = tdata->attr_name[i];
366 tdata->sd_attrs[i].dev_attr.attr.mode = S_IRUGO;
367 tdata->sd_attrs[i].dev_attr.show = rd_ptr[i];
368 tdata->sd_attrs[i].dev_attr.store = NULL;
369 tdata->sd_attrs[i].index = attr_no;
370 err = device_create_file(dev, &tdata->sd_attrs[i].dev_attr);
378 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
382 static void update_ttarget(__u8 cpu_model, struct temp_data *tdata,
389 * Initialize ttarget value. Eventually this will be
390 * initialized with the value from MSR_IA32_THERM_INTERRUPT
391 * register. If IA32_TEMPERATURE_TARGET is supported, this
392 * value will be over written below.
393 * To Do: Patch to initialize ttarget from MSR_IA32_THERM_INTERRUPT
395 tdata->ttarget = tdata->tjmax - 20000;
398 * Read the still undocumented IA32_TEMPERATURE_TARGET. It exists
399 * on older CPUs but not in this register,
400 * Atoms don't have it either.
402 if ((cpu_model > 0xe) && (cpu_model != 0x1c)) {
403 err = rdmsr_safe_on_cpu(tdata->cpu,
404 MSR_IA32_TEMPERATURE_TARGET, &eax, &edx);
407 "Unable to read IA32_TEMPERATURE_TARGET MSR\n");
409 tdata->ttarget = tdata->tjmax -
410 (((eax >> 8) & 0xff) * 1000);
415 static int chk_ucode_version(struct platform_device *pdev)
417 struct cpuinfo_x86 *c = &cpu_data(pdev->id);
422 * Check if we have problem with errata AE18 of Core processors:
423 * Readings might stop update when processor visited too deep sleep,
424 * fixed for stepping D0 (6EC).
426 if ((c->x86_model == 0xe) && (c->x86_mask < 0xc)) {
427 /* check for microcode update */
428 err = smp_call_function_single(pdev->id, get_ucode_rev_on_cpu,
432 "Cannot determine microcode revision of "
433 "CPU#%u (%d)!\n", pdev->id, err);
435 } else if (edx < 0x39) {
437 "Errata AE18 not fixed, update BIOS or "
438 "microcode of the CPU!\n");
445 static struct platform_device *coretemp_get_pdev(unsigned int cpu)
447 u16 phys_proc_id = TO_PHYS_ID(cpu);
448 struct pdev_entry *p;
450 mutex_lock(&pdev_list_mutex);
452 list_for_each_entry(p, &pdev_list, list)
453 if (p->phys_proc_id == phys_proc_id) {
454 mutex_unlock(&pdev_list_mutex);
458 mutex_unlock(&pdev_list_mutex);
462 static struct temp_data *init_temp_data(unsigned int cpu, int pkg_flag)
464 struct temp_data *tdata;
466 tdata = kzalloc(sizeof(struct temp_data), GFP_KERNEL);
470 tdata->status_reg = pkg_flag ? MSR_IA32_PACKAGE_THERM_STATUS :
471 MSR_IA32_THERM_STATUS;
472 tdata->is_pkg_data = pkg_flag;
474 tdata->cpu_core_id = TO_CORE_ID(cpu);
475 mutex_init(&tdata->update_lock);
479 static int create_core_data(struct platform_data *pdata,
480 struct platform_device *pdev,
481 unsigned int cpu, int pkg_flag)
483 struct temp_data *tdata;
484 struct cpuinfo_x86 *c = &cpu_data(cpu);
489 * Find attr number for sysfs:
490 * We map the attr number to core id of the CPU
491 * The attr number is always core id + 2
492 * The Pkgtemp will always show up as temp1_*, if available
494 attr_no = pkg_flag ? 1 : TO_ATTR_NO(cpu);
496 if (attr_no > MAX_CORE_DATA - 1)
499 /* Skip if it is a HT core, Not an error */
500 if (pdata->core_data[attr_no] != NULL)
503 tdata = init_temp_data(cpu, pkg_flag);
507 /* Test if we can access the status register */
508 err = rdmsr_safe_on_cpu(cpu, tdata->status_reg, &eax, &edx);
512 /* We can access status register. Get Critical Temperature */
514 tdata->tjmax = get_pkg_tjmax(pdev->id, &pdev->dev);
516 tdata->tjmax = get_tjmax(c, cpu, &pdev->dev);
518 update_ttarget(c->x86_model, tdata, &pdev->dev);
519 pdata->core_data[attr_no] = tdata;
521 /* Create sysfs interfaces */
522 err = create_core_attrs(tdata, &pdev->dev, attr_no);
532 static void coretemp_add_core(unsigned int cpu, int pkg_flag)
534 struct platform_data *pdata;
535 struct platform_device *pdev = coretemp_get_pdev(cpu);
541 pdata = platform_get_drvdata(pdev);
543 err = create_core_data(pdata, pdev, cpu, pkg_flag);
545 dev_err(&pdev->dev, "Adding Core %u failed\n", cpu);
548 static void coretemp_remove_core(struct platform_data *pdata,
549 struct device *dev, int indx)
552 struct temp_data *tdata = pdata->core_data[indx];
554 /* Remove the sysfs attributes */
555 for (i = 0; i < MAX_ATTRS; i++)
556 device_remove_file(dev, &tdata->sd_attrs[i].dev_attr);
558 kfree(pdata->core_data[indx]);
559 pdata->core_data[indx] = NULL;
562 static int __devinit coretemp_probe(struct platform_device *pdev)
564 struct platform_data *pdata;
567 /* Check the microcode version of the CPU */
568 err = chk_ucode_version(pdev);
572 /* Initialize the per-package data structures */
573 pdata = kzalloc(sizeof(struct platform_data), GFP_KERNEL);
577 err = create_name_attr(pdata, &pdev->dev);
581 pdata->phys_proc_id = TO_PHYS_ID(pdev->id);
582 platform_set_drvdata(pdev, pdata);
584 pdata->hwmon_dev = hwmon_device_register(&pdev->dev);
585 if (IS_ERR(pdata->hwmon_dev)) {
586 err = PTR_ERR(pdata->hwmon_dev);
587 dev_err(&pdev->dev, "Class registration failed (%d)\n", err);
593 device_remove_file(&pdev->dev, &pdata->name_attr);
594 platform_set_drvdata(pdev, NULL);
600 static int __devexit coretemp_remove(struct platform_device *pdev)
602 struct platform_data *pdata = platform_get_drvdata(pdev);
605 for (i = MAX_CORE_DATA - 1; i >= 0; --i)
606 if (pdata->core_data[i])
607 coretemp_remove_core(pdata, &pdev->dev, i);
609 device_remove_file(&pdev->dev, &pdata->name_attr);
610 hwmon_device_unregister(pdata->hwmon_dev);
611 platform_set_drvdata(pdev, NULL);
616 static struct platform_driver coretemp_driver = {
618 .owner = THIS_MODULE,
621 .probe = coretemp_probe,
622 .remove = __devexit_p(coretemp_remove),
625 static int __cpuinit coretemp_device_add(unsigned int cpu)
628 struct platform_device *pdev;
629 struct pdev_entry *pdev_entry;
631 mutex_lock(&pdev_list_mutex);
633 pdev = platform_device_alloc(DRVNAME, cpu);
636 pr_err("Device allocation failed\n");
640 pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL);
643 goto exit_device_put;
646 err = platform_device_add(pdev);
648 pr_err("Device addition failed (%d)\n", err);
649 goto exit_device_free;
652 pdev_entry->pdev = pdev;
653 pdev_entry->cpu = cpu;
654 pdev_entry->phys_proc_id = TO_PHYS_ID(cpu);
655 pdev_entry->cpu_core_id = TO_CORE_ID(cpu);
657 list_add_tail(&pdev_entry->list, &pdev_list);
658 mutex_unlock(&pdev_list_mutex);
665 platform_device_put(pdev);
667 mutex_unlock(&pdev_list_mutex);
671 static void coretemp_device_remove(unsigned int cpu)
673 struct pdev_entry *p, *n;
674 u16 phys_proc_id = TO_PHYS_ID(cpu);
676 mutex_lock(&pdev_list_mutex);
677 list_for_each_entry_safe(p, n, &pdev_list, list) {
678 if (p->phys_proc_id != phys_proc_id)
680 platform_device_unregister(p->pdev);
684 mutex_unlock(&pdev_list_mutex);
687 static bool is_any_core_online(struct platform_data *pdata)
691 /* Find online cores, except pkgtemp data */
692 for (i = MAX_CORE_DATA - 1; i >= 0; --i) {
693 if (pdata->core_data[i] &&
694 !pdata->core_data[i]->is_pkg_data) {
701 static void __cpuinit get_core_online(unsigned int cpu)
703 struct cpuinfo_x86 *c = &cpu_data(cpu);
704 struct platform_device *pdev = coretemp_get_pdev(cpu);
708 * CPUID.06H.EAX[0] indicates whether the CPU has thermal
709 * sensors. We check this bit only, all the early CPUs
710 * without thermal sensors will be filtered out.
712 if (!cpu_has(c, X86_FEATURE_DTS))
717 * Alright, we have DTS support.
718 * We are bringing the _first_ core in this pkg
719 * online. So, initialize per-pkg data structures and
720 * then bring this core online.
722 err = coretemp_device_add(cpu);
726 * Check whether pkgtemp support is available.
727 * If so, add interfaces for pkgtemp.
729 if (cpu_has(c, X86_FEATURE_PTS))
730 coretemp_add_core(cpu, 1);
733 * Physical CPU device already exists.
734 * So, just add interfaces for this core.
736 coretemp_add_core(cpu, 0);
739 static void __cpuinit put_core_offline(unsigned int cpu)
742 struct platform_data *pdata;
743 struct platform_device *pdev = coretemp_get_pdev(cpu);
745 /* If the physical CPU device does not exist, just return */
749 pdata = platform_get_drvdata(pdev);
751 indx = TO_ATTR_NO(cpu);
753 if (pdata->core_data[indx] && pdata->core_data[indx]->cpu == cpu)
754 coretemp_remove_core(pdata, &pdev->dev, indx);
756 /* Online the HT version of this core, if any */
757 for_each_cpu(i, cpu_sibling_mask(cpu)) {
764 * If all cores in this pkg are offline, remove the device.
765 * coretemp_device_remove calls unregister_platform_device,
766 * which in turn calls coretemp_remove. This removes the
767 * pkgtemp entry and does other clean ups.
769 if (!is_any_core_online(pdata))
770 coretemp_device_remove(cpu);
773 static int __cpuinit coretemp_cpu_callback(struct notifier_block *nfb,
774 unsigned long action, void *hcpu)
776 unsigned int cpu = (unsigned long) hcpu;
780 case CPU_DOWN_FAILED:
781 get_core_online(cpu);
783 case CPU_DOWN_PREPARE:
784 put_core_offline(cpu);
790 static struct notifier_block coretemp_cpu_notifier __refdata = {
791 .notifier_call = coretemp_cpu_callback,
795 static int __init coretemp_init(void)
797 int i, err = -ENODEV;
799 /* quick check if we run Intel */
800 if (cpu_data(0).x86_vendor != X86_VENDOR_INTEL)
803 err = platform_driver_register(&coretemp_driver);
807 for_each_online_cpu(i)
810 #ifndef CONFIG_HOTPLUG_CPU
811 if (list_empty(&pdev_list)) {
813 goto exit_driver_unreg;
817 register_hotcpu_notifier(&coretemp_cpu_notifier);
820 #ifndef CONFIG_HOTPLUG_CPU
822 platform_driver_unregister(&coretemp_driver);
828 static void __exit coretemp_exit(void)
830 struct pdev_entry *p, *n;
832 unregister_hotcpu_notifier(&coretemp_cpu_notifier);
833 mutex_lock(&pdev_list_mutex);
834 list_for_each_entry_safe(p, n, &pdev_list, list) {
835 platform_device_unregister(p->pdev);
839 mutex_unlock(&pdev_list_mutex);
840 platform_driver_unregister(&coretemp_driver);
843 MODULE_AUTHOR("Rudolf Marek <r.marek@assembler.cz>");
844 MODULE_DESCRIPTION("Intel Core temperature monitor");
845 MODULE_LICENSE("GPL");
847 module_init(coretemp_init)
848 module_exit(coretemp_exit)