1 /**************************************************************************
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
29 #include "vmwgfx_drv.h"
30 #include "ttm/ttm_placement.h"
31 #include "ttm/ttm_bo_driver.h"
32 #include "ttm/ttm_object.h"
33 #include "ttm/ttm_module.h"
35 #define VMWGFX_DRIVER_NAME "vmwgfx"
36 #define VMWGFX_DRIVER_DESC "Linux drm driver for VMware graphics devices"
37 #define VMWGFX_CHIP_SVGAII 0
38 #define VMW_FB_RESERVATION 0
41 * Fully encoded drm commands. Might move to vmw_drm.h
44 #define DRM_IOCTL_VMW_GET_PARAM \
45 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_GET_PARAM, \
46 struct drm_vmw_getparam_arg)
47 #define DRM_IOCTL_VMW_ALLOC_DMABUF \
48 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_ALLOC_DMABUF, \
49 union drm_vmw_alloc_dmabuf_arg)
50 #define DRM_IOCTL_VMW_UNREF_DMABUF \
51 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_DMABUF, \
52 struct drm_vmw_unref_dmabuf_arg)
53 #define DRM_IOCTL_VMW_CURSOR_BYPASS \
54 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CURSOR_BYPASS, \
55 struct drm_vmw_cursor_bypass_arg)
57 #define DRM_IOCTL_VMW_CONTROL_STREAM \
58 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_CONTROL_STREAM, \
59 struct drm_vmw_control_stream_arg)
60 #define DRM_IOCTL_VMW_CLAIM_STREAM \
61 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CLAIM_STREAM, \
62 struct drm_vmw_stream_arg)
63 #define DRM_IOCTL_VMW_UNREF_STREAM \
64 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_STREAM, \
65 struct drm_vmw_stream_arg)
67 #define DRM_IOCTL_VMW_CREATE_CONTEXT \
68 DRM_IOR(DRM_COMMAND_BASE + DRM_VMW_CREATE_CONTEXT, \
69 struct drm_vmw_context_arg)
70 #define DRM_IOCTL_VMW_UNREF_CONTEXT \
71 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_CONTEXT, \
72 struct drm_vmw_context_arg)
73 #define DRM_IOCTL_VMW_CREATE_SURFACE \
74 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_CREATE_SURFACE, \
75 union drm_vmw_surface_create_arg)
76 #define DRM_IOCTL_VMW_UNREF_SURFACE \
77 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_UNREF_SURFACE, \
78 struct drm_vmw_surface_arg)
79 #define DRM_IOCTL_VMW_REF_SURFACE \
80 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_REF_SURFACE, \
81 union drm_vmw_surface_reference_arg)
82 #define DRM_IOCTL_VMW_EXECBUF \
83 DRM_IOW(DRM_COMMAND_BASE + DRM_VMW_EXECBUF, \
84 struct drm_vmw_execbuf_arg)
85 #define DRM_IOCTL_VMW_FIFO_DEBUG \
86 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FIFO_DEBUG, \
87 struct drm_vmw_fifo_debug_arg)
88 #define DRM_IOCTL_VMW_FENCE_WAIT \
89 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_FENCE_WAIT, \
90 struct drm_vmw_fence_wait_arg)
91 #define DRM_IOCTL_VMW_UPDATE_LAYOUT \
92 DRM_IOWR(DRM_COMMAND_BASE + DRM_VMW_UPDATE_LAYOUT, \
93 struct drm_vmw_update_layout_arg)
97 * The core DRM version of this macro doesn't account for
101 #define VMW_IOCTL_DEF(ioctl, func, flags) \
102 [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl}
108 static struct drm_ioctl_desc vmw_ioctls[] = {
109 VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl,
110 DRM_AUTH | DRM_UNLOCKED),
111 VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl,
112 DRM_AUTH | DRM_UNLOCKED),
113 VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl,
114 DRM_AUTH | DRM_UNLOCKED),
115 VMW_IOCTL_DEF(VMW_CURSOR_BYPASS,
116 vmw_kms_cursor_bypass_ioctl,
117 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
119 VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl,
120 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
121 VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl,
122 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
123 VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl,
124 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED),
126 VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl,
127 DRM_AUTH | DRM_UNLOCKED),
128 VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl,
129 DRM_AUTH | DRM_UNLOCKED),
130 VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl,
131 DRM_AUTH | DRM_UNLOCKED),
132 VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl,
133 DRM_AUTH | DRM_UNLOCKED),
134 VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl,
135 DRM_AUTH | DRM_UNLOCKED),
136 VMW_IOCTL_DEF(VMW_EXECBUF, vmw_execbuf_ioctl,
137 DRM_AUTH | DRM_UNLOCKED),
138 VMW_IOCTL_DEF(VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl,
139 DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED),
140 VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_wait_ioctl,
141 DRM_AUTH | DRM_UNLOCKED),
142 VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT, vmw_kms_update_layout_ioctl,
143 DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED)
146 static struct pci_device_id vmw_pci_id_list[] = {
147 {0x15ad, 0x0405, PCI_ANY_ID, PCI_ANY_ID, 0, 0, VMWGFX_CHIP_SVGAII},
151 static char *vmw_devname = "vmwgfx";
152 static int enable_fbdev;
154 static int vmw_probe(struct pci_dev *, const struct pci_device_id *);
155 static void vmw_master_init(struct vmw_master *);
156 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
159 MODULE_PARM_DESC(enable_fbdev, "Enable vmwgfx fbdev");
160 module_param_named(enable_fbdev, enable_fbdev, int, 0600);
162 static void vmw_print_capabilities(uint32_t capabilities)
164 DRM_INFO("Capabilities:\n");
165 if (capabilities & SVGA_CAP_RECT_COPY)
166 DRM_INFO(" Rect copy.\n");
167 if (capabilities & SVGA_CAP_CURSOR)
168 DRM_INFO(" Cursor.\n");
169 if (capabilities & SVGA_CAP_CURSOR_BYPASS)
170 DRM_INFO(" Cursor bypass.\n");
171 if (capabilities & SVGA_CAP_CURSOR_BYPASS_2)
172 DRM_INFO(" Cursor bypass 2.\n");
173 if (capabilities & SVGA_CAP_8BIT_EMULATION)
174 DRM_INFO(" 8bit emulation.\n");
175 if (capabilities & SVGA_CAP_ALPHA_CURSOR)
176 DRM_INFO(" Alpha cursor.\n");
177 if (capabilities & SVGA_CAP_3D)
179 if (capabilities & SVGA_CAP_EXTENDED_FIFO)
180 DRM_INFO(" Extended Fifo.\n");
181 if (capabilities & SVGA_CAP_MULTIMON)
182 DRM_INFO(" Multimon.\n");
183 if (capabilities & SVGA_CAP_PITCHLOCK)
184 DRM_INFO(" Pitchlock.\n");
185 if (capabilities & SVGA_CAP_IRQMASK)
186 DRM_INFO(" Irq mask.\n");
187 if (capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)
188 DRM_INFO(" Display Topology.\n");
189 if (capabilities & SVGA_CAP_GMR)
191 if (capabilities & SVGA_CAP_TRACES)
192 DRM_INFO(" Traces.\n");
195 static int vmw_request_device(struct vmw_private *dev_priv)
199 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo);
200 if (unlikely(ret != 0)) {
201 DRM_ERROR("Unable to initialize FIFO.\n");
208 static void vmw_release_device(struct vmw_private *dev_priv)
210 vmw_fifo_release(dev_priv, &dev_priv->fifo);
213 int vmw_3d_resource_inc(struct vmw_private *dev_priv)
217 mutex_lock(&dev_priv->release_mutex);
218 if (unlikely(dev_priv->num_3d_resources++ == 0)) {
219 ret = vmw_request_device(dev_priv);
220 if (unlikely(ret != 0))
221 --dev_priv->num_3d_resources;
223 mutex_unlock(&dev_priv->release_mutex);
228 void vmw_3d_resource_dec(struct vmw_private *dev_priv)
232 mutex_lock(&dev_priv->release_mutex);
233 if (unlikely(--dev_priv->num_3d_resources == 0))
234 vmw_release_device(dev_priv);
235 n3d = (int32_t) dev_priv->num_3d_resources;
236 mutex_unlock(&dev_priv->release_mutex);
241 static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
243 struct vmw_private *dev_priv;
247 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
248 if (unlikely(dev_priv == NULL)) {
249 DRM_ERROR("Failed allocating a device private struct.\n");
252 memset(dev_priv, 0, sizeof(*dev_priv));
255 dev_priv->vmw_chipset = chipset;
256 dev_priv->last_read_sequence = (uint32_t) -100;
257 mutex_init(&dev_priv->hw_mutex);
258 mutex_init(&dev_priv->cmdbuf_mutex);
259 mutex_init(&dev_priv->release_mutex);
260 rwlock_init(&dev_priv->resource_lock);
261 idr_init(&dev_priv->context_idr);
262 idr_init(&dev_priv->surface_idr);
263 idr_init(&dev_priv->stream_idr);
264 ida_init(&dev_priv->gmr_ida);
265 mutex_init(&dev_priv->init_mutex);
266 init_waitqueue_head(&dev_priv->fence_queue);
267 init_waitqueue_head(&dev_priv->fifo_queue);
268 atomic_set(&dev_priv->fence_queue_waiters, 0);
269 atomic_set(&dev_priv->fifo_queue_waiters, 0);
270 INIT_LIST_HEAD(&dev_priv->gmr_lru);
272 dev_priv->io_start = pci_resource_start(dev->pdev, 0);
273 dev_priv->vram_start = pci_resource_start(dev->pdev, 1);
274 dev_priv->mmio_start = pci_resource_start(dev->pdev, 2);
276 dev_priv->enable_fb = enable_fbdev;
278 mutex_lock(&dev_priv->hw_mutex);
280 vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2);
281 svga_id = vmw_read(dev_priv, SVGA_REG_ID);
282 if (svga_id != SVGA_ID_2) {
284 DRM_ERROR("Unsuported SVGA ID 0x%x\n", svga_id);
285 mutex_unlock(&dev_priv->hw_mutex);
289 dev_priv->capabilities = vmw_read(dev_priv, SVGA_REG_CAPABILITIES);
291 if (dev_priv->capabilities & SVGA_CAP_GMR) {
292 dev_priv->max_gmr_descriptors =
294 SVGA_REG_GMR_MAX_DESCRIPTOR_LENGTH);
295 dev_priv->max_gmr_ids =
296 vmw_read(dev_priv, SVGA_REG_GMR_MAX_IDS);
299 dev_priv->vram_size = vmw_read(dev_priv, SVGA_REG_VRAM_SIZE);
300 dev_priv->mmio_size = vmw_read(dev_priv, SVGA_REG_MEM_SIZE);
301 dev_priv->fb_max_width = vmw_read(dev_priv, SVGA_REG_MAX_WIDTH);
302 dev_priv->fb_max_height = vmw_read(dev_priv, SVGA_REG_MAX_HEIGHT);
304 mutex_unlock(&dev_priv->hw_mutex);
306 vmw_print_capabilities(dev_priv->capabilities);
308 if (dev_priv->capabilities & SVGA_CAP_GMR) {
309 DRM_INFO("Max GMR ids is %u\n",
310 (unsigned)dev_priv->max_gmr_ids);
311 DRM_INFO("Max GMR descriptors is %u\n",
312 (unsigned)dev_priv->max_gmr_descriptors);
314 DRM_INFO("VRAM at 0x%08x size is %u kiB\n",
315 dev_priv->vram_start, dev_priv->vram_size / 1024);
316 DRM_INFO("MMIO at 0x%08x size is %u kiB\n",
317 dev_priv->mmio_start, dev_priv->mmio_size / 1024);
319 ret = vmw_ttm_global_init(dev_priv);
320 if (unlikely(ret != 0))
324 vmw_master_init(&dev_priv->fbdev_master);
325 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
326 dev_priv->active_master = &dev_priv->fbdev_master;
329 ret = ttm_bo_device_init(&dev_priv->bdev,
330 dev_priv->bo_global_ref.ref.object,
331 &vmw_bo_driver, VMWGFX_FILE_PAGE_OFFSET,
333 if (unlikely(ret != 0)) {
334 DRM_ERROR("Failed initializing TTM buffer object driver.\n");
338 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
339 (dev_priv->vram_size >> PAGE_SHIFT));
340 if (unlikely(ret != 0)) {
341 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
345 dev_priv->mmio_mtrr = drm_mtrr_add(dev_priv->mmio_start,
346 dev_priv->mmio_size, DRM_MTRR_WC);
348 dev_priv->mmio_virt = ioremap_wc(dev_priv->mmio_start,
349 dev_priv->mmio_size);
351 if (unlikely(dev_priv->mmio_virt == NULL)) {
353 DRM_ERROR("Failed mapping MMIO.\n");
357 /* Need mmio memory to check for fifo pitchlock cap. */
358 if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY) &&
359 !(dev_priv->capabilities & SVGA_CAP_PITCHLOCK) &&
360 !vmw_fifo_have_pitchlock(dev_priv)) {
362 DRM_ERROR("Hardware has no pitchlock\n");
366 dev_priv->tdev = ttm_object_device_init
367 (dev_priv->mem_global_ref.object, 12);
369 if (unlikely(dev_priv->tdev == NULL)) {
370 DRM_ERROR("Unable to initialize TTM object management.\n");
375 dev->dev_private = dev_priv;
378 dev->devname = vmw_devname;
380 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) {
381 ret = drm_irq_install(dev);
382 if (unlikely(ret != 0)) {
383 DRM_ERROR("Failed installing irq: %d\n", ret);
388 ret = pci_request_regions(dev->pdev, "vmwgfx probe");
389 dev_priv->stealth = (ret != 0);
390 if (dev_priv->stealth) {
392 * Request at least the mmio PCI resource.
395 DRM_INFO("It appears like vesafb is loaded. "
396 "Ignore above error if any.\n");
397 ret = pci_request_region(dev->pdev, 2, "vmwgfx stealth probe");
398 if (unlikely(ret != 0)) {
399 DRM_ERROR("Failed reserving the SVGA MMIO resource.\n");
403 vmw_kms_init(dev_priv);
404 vmw_overlay_init(dev_priv);
405 if (dev_priv->enable_fb) {
406 ret = vmw_3d_resource_inc(dev_priv);
407 if (unlikely(ret != 0))
409 vmw_kms_save_vga(dev_priv);
410 vmw_fb_init(dev_priv);
411 DRM_INFO("%s", vmw_fifo_have_3d(dev_priv) ?
412 "Detected device 3D availability.\n" :
413 "Detected no device 3D availability.\n");
415 DRM_INFO("Delayed 3D detection since we're not "
416 "running the device in SVGA mode yet.\n");
419 dev_priv->pm_nb.notifier_call = vmwgfx_pm_notifier;
420 register_pm_notifier(&dev_priv->pm_nb);
425 vmw_overlay_close(dev_priv);
426 vmw_kms_close(dev_priv);
427 if (dev_priv->stealth)
428 pci_release_region(dev->pdev, 2);
430 pci_release_regions(dev->pdev);
432 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
433 drm_irq_uninstall(dev_priv->dev);
434 if (dev->devname == vmw_devname)
437 ttm_object_device_release(&dev_priv->tdev);
439 iounmap(dev_priv->mmio_virt);
441 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
442 dev_priv->mmio_size, DRM_MTRR_WC);
443 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
445 (void)ttm_bo_device_release(&dev_priv->bdev);
447 vmw_ttm_global_release(dev_priv);
449 ida_destroy(&dev_priv->gmr_ida);
450 idr_destroy(&dev_priv->surface_idr);
451 idr_destroy(&dev_priv->context_idr);
452 idr_destroy(&dev_priv->stream_idr);
457 static int vmw_driver_unload(struct drm_device *dev)
459 struct vmw_private *dev_priv = vmw_priv(dev);
461 unregister_pm_notifier(&dev_priv->pm_nb);
463 if (dev_priv->enable_fb) {
464 vmw_fb_close(dev_priv);
465 vmw_kms_restore_vga(dev_priv);
466 vmw_3d_resource_dec(dev_priv);
468 vmw_kms_close(dev_priv);
469 vmw_overlay_close(dev_priv);
470 if (dev_priv->stealth)
471 pci_release_region(dev->pdev, 2);
473 pci_release_regions(dev->pdev);
475 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
476 drm_irq_uninstall(dev_priv->dev);
477 if (dev->devname == vmw_devname)
479 ttm_object_device_release(&dev_priv->tdev);
480 iounmap(dev_priv->mmio_virt);
481 drm_mtrr_del(dev_priv->mmio_mtrr, dev_priv->mmio_start,
482 dev_priv->mmio_size, DRM_MTRR_WC);
483 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
484 (void)ttm_bo_device_release(&dev_priv->bdev);
485 vmw_ttm_global_release(dev_priv);
486 ida_destroy(&dev_priv->gmr_ida);
487 idr_destroy(&dev_priv->surface_idr);
488 idr_destroy(&dev_priv->context_idr);
489 idr_destroy(&dev_priv->stream_idr);
496 static void vmw_postclose(struct drm_device *dev,
497 struct drm_file *file_priv)
499 struct vmw_fpriv *vmw_fp;
501 vmw_fp = vmw_fpriv(file_priv);
502 ttm_object_file_release(&vmw_fp->tfile);
503 if (vmw_fp->locked_master)
504 drm_master_put(&vmw_fp->locked_master);
508 static int vmw_driver_open(struct drm_device *dev, struct drm_file *file_priv)
510 struct vmw_private *dev_priv = vmw_priv(dev);
511 struct vmw_fpriv *vmw_fp;
514 vmw_fp = kzalloc(sizeof(*vmw_fp), GFP_KERNEL);
515 if (unlikely(vmw_fp == NULL))
518 vmw_fp->tfile = ttm_object_file_init(dev_priv->tdev, 10);
519 if (unlikely(vmw_fp->tfile == NULL))
522 file_priv->driver_priv = vmw_fp;
524 if (unlikely(dev_priv->bdev.dev_mapping == NULL))
525 dev_priv->bdev.dev_mapping =
526 file_priv->filp->f_path.dentry->d_inode->i_mapping;
535 static long vmw_unlocked_ioctl(struct file *filp, unsigned int cmd,
538 struct drm_file *file_priv = filp->private_data;
539 struct drm_device *dev = file_priv->minor->dev;
540 unsigned int nr = DRM_IOCTL_NR(cmd);
543 * Do extra checking on driver private ioctls.
546 if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END)
547 && (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) {
548 struct drm_ioctl_desc *ioctl =
549 &vmw_ioctls[nr - DRM_COMMAND_BASE];
551 if (unlikely(ioctl->cmd_drv != cmd)) {
552 DRM_ERROR("Invalid command format, ioctl %d\n",
553 nr - DRM_COMMAND_BASE);
558 return drm_ioctl(filp, cmd, arg);
561 static int vmw_firstopen(struct drm_device *dev)
563 struct vmw_private *dev_priv = vmw_priv(dev);
564 dev_priv->is_opened = true;
569 static void vmw_lastclose(struct drm_device *dev)
571 struct vmw_private *dev_priv = vmw_priv(dev);
572 struct drm_crtc *crtc;
573 struct drm_mode_set set;
577 * Do nothing on the lastclose call from drm_unload.
580 if (!dev_priv->is_opened)
583 dev_priv->is_opened = false;
588 set.connectors = NULL;
589 set.num_connectors = 0;
591 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
593 ret = crtc->funcs->set_config(&set);
599 static void vmw_master_init(struct vmw_master *vmaster)
601 ttm_lock_init(&vmaster->lock);
604 static int vmw_master_create(struct drm_device *dev,
605 struct drm_master *master)
607 struct vmw_master *vmaster;
609 vmaster = kzalloc(sizeof(*vmaster), GFP_KERNEL);
610 if (unlikely(vmaster == NULL))
613 ttm_lock_init(&vmaster->lock);
614 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
615 master->driver_priv = vmaster;
620 static void vmw_master_destroy(struct drm_device *dev,
621 struct drm_master *master)
623 struct vmw_master *vmaster = vmw_master(master);
625 master->driver_priv = NULL;
630 static int vmw_master_set(struct drm_device *dev,
631 struct drm_file *file_priv,
634 struct vmw_private *dev_priv = vmw_priv(dev);
635 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
636 struct vmw_master *active = dev_priv->active_master;
637 struct vmw_master *vmaster = vmw_master(file_priv->master);
640 if (!dev_priv->enable_fb) {
641 ret = vmw_3d_resource_inc(dev_priv);
642 if (unlikely(ret != 0))
644 vmw_kms_save_vga(dev_priv);
645 mutex_lock(&dev_priv->hw_mutex);
646 vmw_write(dev_priv, SVGA_REG_TRACES, 0);
647 mutex_unlock(&dev_priv->hw_mutex);
651 BUG_ON(active != &dev_priv->fbdev_master);
652 ret = ttm_vt_lock(&active->lock, false, vmw_fp->tfile);
653 if (unlikely(ret != 0))
654 goto out_no_active_lock;
656 ttm_lock_set_kill(&active->lock, true, SIGTERM);
657 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
658 if (unlikely(ret != 0)) {
659 DRM_ERROR("Unable to clean VRAM on "
663 dev_priv->active_master = NULL;
666 ttm_lock_set_kill(&vmaster->lock, false, SIGTERM);
668 ttm_vt_unlock(&vmaster->lock);
669 BUG_ON(vmw_fp->locked_master != file_priv->master);
670 drm_master_put(&vmw_fp->locked_master);
673 dev_priv->active_master = vmaster;
678 if (!dev_priv->enable_fb) {
679 mutex_lock(&dev_priv->hw_mutex);
680 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
681 mutex_unlock(&dev_priv->hw_mutex);
682 vmw_kms_restore_vga(dev_priv);
683 vmw_3d_resource_dec(dev_priv);
688 static void vmw_master_drop(struct drm_device *dev,
689 struct drm_file *file_priv,
692 struct vmw_private *dev_priv = vmw_priv(dev);
693 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
694 struct vmw_master *vmaster = vmw_master(file_priv->master);
698 * Make sure the master doesn't disappear while we have
702 vmw_fp->locked_master = drm_master_get(file_priv->master);
703 ret = ttm_vt_lock(&vmaster->lock, false, vmw_fp->tfile);
705 if (unlikely((ret != 0))) {
706 DRM_ERROR("Unable to lock TTM at VT switch.\n");
707 drm_master_put(&vmw_fp->locked_master);
710 ttm_lock_set_kill(&vmaster->lock, true, SIGTERM);
712 if (!dev_priv->enable_fb) {
713 ret = ttm_bo_evict_mm(&dev_priv->bdev, TTM_PL_VRAM);
714 if (unlikely(ret != 0))
715 DRM_ERROR("Unable to clean VRAM on master drop.\n");
716 mutex_lock(&dev_priv->hw_mutex);
717 vmw_write(dev_priv, SVGA_REG_TRACES, 1);
718 mutex_unlock(&dev_priv->hw_mutex);
719 vmw_kms_restore_vga(dev_priv);
720 vmw_3d_resource_dec(dev_priv);
723 dev_priv->active_master = &dev_priv->fbdev_master;
724 ttm_lock_set_kill(&dev_priv->fbdev_master.lock, false, SIGTERM);
725 ttm_vt_unlock(&dev_priv->fbdev_master.lock);
727 if (dev_priv->enable_fb)
732 static void vmw_remove(struct pci_dev *pdev)
734 struct drm_device *dev = pci_get_drvdata(pdev);
739 static int vmwgfx_pm_notifier(struct notifier_block *nb, unsigned long val,
742 struct vmw_private *dev_priv =
743 container_of(nb, struct vmw_private, pm_nb);
744 struct vmw_master *vmaster = dev_priv->active_master;
747 case PM_HIBERNATION_PREPARE:
748 case PM_SUSPEND_PREPARE:
749 ttm_suspend_lock(&vmaster->lock);
752 * This empties VRAM and unbinds all GMR bindings.
753 * Buffer contents is moved to swappable memory.
755 ttm_bo_swapout_all(&dev_priv->bdev);
757 case PM_POST_HIBERNATION:
758 case PM_POST_SUSPEND:
759 ttm_suspend_unlock(&vmaster->lock);
761 case PM_RESTORE_PREPARE:
763 case PM_POST_RESTORE:
772 * These might not be needed with the virtual SVGA device.
775 int vmw_pci_suspend(struct pci_dev *pdev, pm_message_t state)
777 pci_save_state(pdev);
778 pci_disable_device(pdev);
779 pci_set_power_state(pdev, PCI_D3hot);
783 int vmw_pci_resume(struct pci_dev *pdev)
785 pci_set_power_state(pdev, PCI_D0);
786 pci_restore_state(pdev);
787 return pci_enable_device(pdev);
790 static struct drm_driver driver = {
791 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED |
793 .load = vmw_driver_load,
794 .unload = vmw_driver_unload,
795 .firstopen = vmw_firstopen,
796 .lastclose = vmw_lastclose,
797 .irq_preinstall = vmw_irq_preinstall,
798 .irq_postinstall = vmw_irq_postinstall,
799 .irq_uninstall = vmw_irq_uninstall,
800 .irq_handler = vmw_irq_handler,
801 .reclaim_buffers_locked = NULL,
802 .get_map_ofs = drm_core_get_map_ofs,
803 .get_reg_ofs = drm_core_get_reg_ofs,
804 .ioctls = vmw_ioctls,
805 .num_ioctls = DRM_ARRAY_SIZE(vmw_ioctls),
806 .dma_quiescent = NULL, /*vmw_dma_quiescent, */
807 .master_create = vmw_master_create,
808 .master_destroy = vmw_master_destroy,
809 .master_set = vmw_master_set,
810 .master_drop = vmw_master_drop,
811 .open = vmw_driver_open,
812 .postclose = vmw_postclose,
814 .owner = THIS_MODULE,
816 .release = drm_release,
817 .unlocked_ioctl = vmw_unlocked_ioctl,
820 .fasync = drm_fasync,
821 #if defined(CONFIG_COMPAT)
822 .compat_ioctl = drm_compat_ioctl,
826 .name = VMWGFX_DRIVER_NAME,
827 .id_table = vmw_pci_id_list,
829 .remove = vmw_remove,
830 .suspend = vmw_pci_suspend,
831 .resume = vmw_pci_resume
833 .name = VMWGFX_DRIVER_NAME,
834 .desc = VMWGFX_DRIVER_DESC,
835 .date = VMWGFX_DRIVER_DATE,
836 .major = VMWGFX_DRIVER_MAJOR,
837 .minor = VMWGFX_DRIVER_MINOR,
838 .patchlevel = VMWGFX_DRIVER_PATCHLEVEL
841 static int vmw_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
843 return drm_get_pci_dev(pdev, ent, &driver);
846 static int __init vmwgfx_init(void)
849 ret = drm_init(&driver);
851 DRM_ERROR("Failed initializing DRM.\n");
855 static void __exit vmwgfx_exit(void)
860 module_init(vmwgfx_init);
861 module_exit(vmwgfx_exit);
863 MODULE_AUTHOR("VMware Inc. and others");
864 MODULE_DESCRIPTION("Standalone drm driver for the VMware SVGA device");
865 MODULE_LICENSE("GPL and additional rights");