drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25
  26 int
  27 gm100_identify(struct nvkm_device *device)
  28 {
  29         switch (device->chipset) {
  30         case 0x117:
  31                 device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
  32                 device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
  33
  34 #if 0
  35                 device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
  36 #endif
  37                 device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
  38                 device->oclass[NVDEV_ENGINE_FIFO   ] =  gk208_fifo_oclass;
  39                 device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
  40                 device->oclass[NVDEV_ENGINE_GR     ] =  gm107_gr_oclass;
  41                 device->oclass[NVDEV_ENGINE_DISP   ] =  gm107_disp_oclass;
  42                 device->oclass[NVDEV_ENGINE_CE0    ] = &gk104_ce0_oclass;
  43 #if 0
  44                 device->oclass[NVDEV_ENGINE_CE1    ] = &gk104_ce1_oclass;
  45 #endif
  46                 device->oclass[NVDEV_ENGINE_CE2    ] = &gk104_ce2_oclass;
  47 #if 0
  48                 device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
  49                 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
  50                 device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
  51 #endif
  52                 break;
  53         case 0x124:
  54 #if 0
  55                 /* looks to be some non-trivial changes */
  56                 /* priv ring says no to 0x10eb14 writes */
  57                 device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
  58 #endif
  59                 device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
  60 #if 0
  61                 device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
  62 #endif
  63                 device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
  64                 device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;
  65                 device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
  66                 device->oclass[NVDEV_ENGINE_GR     ] =  gm204_gr_oclass;
  67                 device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
  68                 device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
  69                 device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
  70                 device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
  71 #if 0
  72                 device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
  73                 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
  74                 device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
  75 #endif
  76                 break;
  77         case 0x126:
  78 #if 0
  79                 /* looks to be some non-trivial changes */
  80                 /* priv ring says no to 0x10eb14 writes */
  81                 device->oclass[NVDEV_SUBDEV_THERM  ] = &gm107_therm_oclass;
  82 #endif
  83                 device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
  84 #if 0
  85                 device->oclass[NVDEV_SUBDEV_VOLT   ] = &nv40_volt_oclass;
  86 #endif
  87                 device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
  88                 device->oclass[NVDEV_ENGINE_FIFO   ] =  gm204_fifo_oclass;
  89                 device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
  90                 device->oclass[NVDEV_ENGINE_GR     ] =  gm206_gr_oclass;
  91                 device->oclass[NVDEV_ENGINE_DISP   ] =  gm204_disp_oclass;
  92                 device->oclass[NVDEV_ENGINE_CE0    ] = &gm204_ce0_oclass;
  93                 device->oclass[NVDEV_ENGINE_CE1    ] = &gm204_ce1_oclass;
  94                 device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
  95 #if 0
  96                 device->oclass[NVDEV_ENGINE_MSVLD  ] = &gk104_msvld_oclass;
  97                 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
  98                 device->oclass[NVDEV_ENGINE_MSPPP  ] = &gf100_msppp_oclass;
  99 #endif
 100                 break;
 101         case 0x12b:
 102
 103                 device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;
 104                 device->oclass[NVDEV_ENGINE_DMAOBJ ] =  gf110_dmaeng_oclass;
 105                 device->oclass[NVDEV_ENGINE_FIFO   ] =  gm20b_fifo_oclass;
 106                 device->oclass[NVDEV_ENGINE_SW     ] =  gf100_sw_oclass;
 107                 device->oclass[NVDEV_ENGINE_GR     ] =  gm20b_gr_oclass;
 108                 device->oclass[NVDEV_ENGINE_CE2    ] = &gm204_ce2_oclass;
 109                 break;
 110         default:
 111                 return -EINVAL;
 112         }
 113
 114         return 0;
 115 }