2 * Copyright 2007-2008 Nouveau Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 #ifndef __NOUVEAU_BIOS_H__
25 #define __NOUVEAU_BIOS_H__
28 #include "nouveau_i2c.h"
30 #define DCB_MAX_NUM_ENTRIES 16
31 #define DCB_MAX_NUM_I2C_ENTRIES 16
32 #define DCB_MAX_NUM_GPIO_ENTRIES 32
33 #define DCB_MAX_NUM_CONNECTOR_ENTRIES 16
35 #define DCB_LOC_ON_CHIP 0
37 struct dcb_i2c_entry {
40 struct nouveau_i2c_chan *chan;
44 DCB_GPIO_TVDAC0 = 0xc,
45 DCB_GPIO_TVDAC1 = 0x2d,
48 struct dcb_gpio_entry {
49 enum dcb_gpio_tag tag;
55 struct dcb_gpio_table {
57 struct dcb_gpio_entry entry[DCB_MAX_NUM_GPIO_ENTRIES];
60 enum dcb_connector_type {
61 DCB_CONNECTOR_VGA = 0x00,
62 DCB_CONNECTOR_TV_0 = 0x10,
63 DCB_CONNECTOR_TV_1 = 0x11,
64 DCB_CONNECTOR_TV_3 = 0x13,
65 DCB_CONNECTOR_DVI_I = 0x30,
66 DCB_CONNECTOR_DVI_D = 0x31,
67 DCB_CONNECTOR_LVDS = 0x40,
68 DCB_CONNECTOR_DP = 0x46,
69 DCB_CONNECTOR_eDP = 0x47,
70 DCB_CONNECTOR_HDMI_0 = 0x60,
71 DCB_CONNECTOR_HDMI_1 = 0x61,
72 DCB_CONNECTOR_NONE = 0xff
75 struct dcb_connector_table_entry {
78 enum dcb_connector_type type;
83 struct dcb_connector_table {
85 struct dcb_connector_table_entry entry[DCB_MAX_NUM_CONNECTOR_ENTRIES];
98 int index; /* may not be raw dcb index if merging has happened */
106 bool duallink_possible;
116 bool use_straps_for_mode;
117 bool use_power_scripts;
120 bool has_component_output;
131 bool i2c_upper_default;
138 struct dcb_entry entry[DCB_MAX_NUM_ENTRIES];
141 uint8_t i2c_default_indices;
142 struct dcb_i2c_entry i2c[DCB_MAX_NUM_I2C_ENTRIES];
144 uint16_t gpio_table_ptr;
145 struct dcb_gpio_table gpio;
146 uint16_t connector_table_ptr;
147 struct dcb_connector_table connector;
157 /* Order *does* matter here */
166 /* changing these requires matching changes to reg tables in nv_get_clock */
167 #define MAX_PLL_TYPES 4
190 * for most pre nv50 cards setting a log2P of 7 (the common max_log2p
191 * value) is no different to 6 (at least for vplls) so allowing the MNP
192 * calc to use 7 causes the generated clock to be out by a factor of 2.
193 * however, max_log2p cannot be fixed-up during parsing as the
194 * unmodified max_log2p value is still needed for setting mplls, hence
195 * an additional max_usable_log2p member
197 uint8_t max_usable_log2p;
207 struct drm_device *dev;
209 uint8_t chip_version;
212 uint32_t tvdactestval;
213 uint8_t digital_min_front_porch;
218 uint8_t data[NV_PROM_SIZE];
222 uint8_t major_version;
223 uint8_t feature_byte;
226 uint32_t fmaxvco, fminvco;
229 uint16_t init_script_tbls_ptr;
230 uint16_t extra_init_script_tbl_ptr;
231 uint16_t macro_index_tbl_ptr;
232 uint16_t macro_tbl_ptr;
233 uint16_t condition_tbl_ptr;
234 uint16_t io_condition_tbl_ptr;
235 uint16_t io_flag_condition_tbl_ptr;
236 uint16_t init_function_tbl_ptr;
238 uint16_t pll_limit_tbl_ptr;
239 uint16_t ram_restrict_tbl_ptr;
240 uint8_t ram_restrict_group_count;
242 uint16_t some_script_ptr; /* BIT I + 14 */
243 uint16_t init96_tbl_ptr; /* BIT I + 16 */
245 struct dcb_table dcb;
249 /* these need remembering across suspend */
250 uint32_t saved_nv_pfb_cfg0;
254 struct dcb_entry *output;
255 uint16_t script_table_ptr;
256 uint16_t dp_table_ptr;
260 uint16_t fptablepointer; /* also used by tmds */
261 uint16_t fpxlatetableptr;
263 uint16_t lvdsmanufacturerpointer;
264 uint16_t fpxlatemanufacturertableptr;
266 uint16_t xlated_entry;
267 bool power_off_for_reset;
268 bool reset_after_pclk_change;
270 bool link_c_increment;
272 int duallink_transition_clk;
273 uint8_t strapless_is_24bit;
276 /* will need resetting after suspend */
277 int last_script_invoc;
282 uint16_t output0_script_ptr;
283 uint16_t output1_script_ptr;
287 uint16_t mem_init_tbl_ptr;
288 uint16_t sdr_seq_tbl_ptr;
289 uint16_t ddr_seq_tbl_ptr;
292 uint8_t crt, tv, panel;
295 uint16_t lvds_single_a_script_ptr;