drivers/gpu/drm/i915/i915_debugfs.c

   1 /*
   2  * Copyright © 2008 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Eric Anholt <eric@anholt.net>
  25  *    Keith Packard <keithp@keithp.com>
  26  *
  27  */
  28
  29 #include <linux/seq_file.h>
  30 #include <linux/debugfs.h>
  31 #include <linux/slab.h>
  32 #include <linux/export.h>
  33 #include "drmP.h"
  34 #include "drm.h"
  35 #include "intel_drv.h"
  36 #include "intel_ringbuffer.h"
  37 #include "i915_drm.h"
  38 #include "i915_drv.h"
  39
  40 #define DRM_I915_RING_DEBUG 1
  41
  42
  43 #if defined(CONFIG_DEBUG_FS)
  44
  45 enum {
  46         ACTIVE_LIST,
  47         FLUSHING_LIST,
  48         INACTIVE_LIST,
  49         PINNED_LIST,
  50 };
  51
  52 static const char *yesno(int v)
  53 {
  54         return v ? "yes" : "no";
  55 }
  56
  57 static int i915_capabilities(struct seq_file *m, void *data)
  58 {
  59         struct drm_info_node *node = (struct drm_info_node *) m->private;
  60         struct drm_device *dev = node->minor->dev;
  61         const struct intel_device_info *info = INTEL_INFO(dev);
  62
  63         seq_printf(m, "gen: %d\n", info->gen);
  64         seq_printf(m, "pch: %d\n", INTEL_PCH_TYPE(dev));
  65 #define B(x) seq_printf(m, #x ": %s\n", yesno(info->x))
  66         B(is_mobile);
  67         B(is_i85x);
  68         B(is_i915g);
  69         B(is_i945gm);
  70         B(is_g33);
  71         B(need_gfx_hws);
  72         B(is_g4x);
  73         B(is_pineview);
  74         B(is_broadwater);
  75         B(is_crestline);
  76         B(has_fbc);
  77         B(has_pipe_cxsr);
  78         B(has_hotplug);
  79         B(cursor_needs_physical);
  80         B(has_overlay);
  81         B(overlay_needs_physical);
  82         B(supports_tv);
  83         B(has_bsd_ring);
  84         B(has_blt_ring);
  85         B(has_llc);
  86 #undef B
  87
  88         return 0;
  89 }
  90
  91 static const char *get_pin_flag(struct drm_i915_gem_object *obj)
  92 {
  93         if (obj->user_pin_count > 0)
  94                 return "P";
  95         else if (obj->pin_count > 0)
  96                 return "p";
  97         else
  98                 return " ";
  99 }
 100
 101 static const char *get_tiling_flag(struct drm_i915_gem_object *obj)
 102 {
 103         switch (obj->tiling_mode) {
 104         default:
 105         case I915_TILING_NONE: return " ";
 106         case I915_TILING_X: return "X";
 107         case I915_TILING_Y: return "Y";
 108         }
 109 }
 110
 111 static const char *cache_level_str(int type)
 112 {
 113         switch (type) {
 114         case I915_CACHE_NONE: return " uncached";
 115         case I915_CACHE_LLC: return " snooped (LLC)";
 116         case I915_CACHE_LLC_MLC: return " snooped (LLC+MLC)";
 117         default: return "";
 118         }
 119 }
 120
 121 static void
 122 describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
 123 {
 124         seq_printf(m, "%p: %s%s %8zdKiB %04x %04x %d %d %d%s%s%s",
 125                    &obj->base,
 126                    get_pin_flag(obj),
 127                    get_tiling_flag(obj),
 128                    obj->base.size / 1024,
 129                    obj->base.read_domains,
 130                    obj->base.write_domain,
 131                    obj->last_read_seqno,
 132                    obj->last_write_seqno,
 133                    obj->last_fenced_seqno,
 134                    cache_level_str(obj->cache_level),
 135                    obj->dirty ? " dirty" : "",
 136                    obj->madv == I915_MADV_DONTNEED ? " purgeable" : "");
 137         if (obj->base.name)
 138                 seq_printf(m, " (name: %d)", obj->base.name);
 139         if (obj->fence_reg != I915_FENCE_REG_NONE)
 140                 seq_printf(m, " (fence: %d)", obj->fence_reg);
 141         if (obj->gtt_space != NULL)
 142                 seq_printf(m, " (gtt offset: %08x, size: %08x)",
 143                            obj->gtt_offset, (unsigned int)obj->gtt_space->size);
 144         if (obj->pin_mappable || obj->fault_mappable) {
 145                 char s[3], *t = s;
 146                 if (obj->pin_mappable)
 147                         *t++ = 'p';
 148                 if (obj->fault_mappable)
 149                         *t++ = 'f';
 150                 *t = '\0';
 151                 seq_printf(m, " (%s mappable)", s);
 152         }
 153         if (obj->ring != NULL)
 154                 seq_printf(m, " (%s)", obj->ring->name);
 155 }
 156
 157 static int i915_gem_object_list_info(struct seq_file *m, void *data)
 158 {
 159         struct drm_info_node *node = (struct drm_info_node *) m->private;
 160         uintptr_t list = (uintptr_t) node->info_ent->data;
 161         struct list_head *head;
 162         struct drm_device *dev = node->minor->dev;
 163         drm_i915_private_t *dev_priv = dev->dev_private;
 164         struct drm_i915_gem_object *obj;
 165         size_t total_obj_size, total_gtt_size;
 166         int count, ret;
 167
 168         ret = mutex_lock_interruptible(&dev->struct_mutex);
 169         if (ret)
 170                 return ret;
 171
 172         switch (list) {
 173         case ACTIVE_LIST:
 174                 seq_printf(m, "Active:\n");
 175                 head = &dev_priv->mm.active_list;
 176                 break;
 177         case INACTIVE_LIST:
 178                 seq_printf(m, "Inactive:\n");
 179                 head = &dev_priv->mm.inactive_list;
 180                 break;
 181         case FLUSHING_LIST:
 182                 seq_printf(m, "Flushing:\n");
 183                 head = &dev_priv->mm.flushing_list;
 184                 break;
 185         default:
 186                 mutex_unlock(&dev->struct_mutex);
 187                 return -EINVAL;
 188         }
 189
 190         total_obj_size = total_gtt_size = count = 0;
 191         list_for_each_entry(obj, head, mm_list) {
 192                 seq_printf(m, "   ");
 193                 describe_obj(m, obj);
 194                 seq_printf(m, "\n");
 195                 total_obj_size += obj->base.size;
 196                 total_gtt_size += obj->gtt_space->size;
 197                 count++;
 198         }
 199         mutex_unlock(&dev->struct_mutex);
 200
 201         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 202                    count, total_obj_size, total_gtt_size);
 203         return 0;
 204 }
 205
 206 #define count_objects(list, member) do { \
 207         list_for_each_entry(obj, list, member) { \
 208                 size += obj->gtt_space->size; \
 209                 ++count; \
 210                 if (obj->map_and_fenceable) { \
 211                         mappable_size += obj->gtt_space->size; \
 212                         ++mappable_count; \
 213                 } \
 214         } \
 215 } while (0)
 216
 217 static int i915_gem_object_info(struct seq_file *m, void* data)
 218 {
 219         struct drm_info_node *node = (struct drm_info_node *) m->private;
 220         struct drm_device *dev = node->minor->dev;
 221         struct drm_i915_private *dev_priv = dev->dev_private;
 222         u32 count, mappable_count;
 223         size_t size, mappable_size;
 224         struct drm_i915_gem_object *obj;
 225         int ret;
 226
 227         ret = mutex_lock_interruptible(&dev->struct_mutex);
 228         if (ret)
 229                 return ret;
 230
 231         seq_printf(m, "%u objects, %zu bytes\n",
 232                    dev_priv->mm.object_count,
 233                    dev_priv->mm.object_memory);
 234
 235         size = count = mappable_size = mappable_count = 0;
 236         count_objects(&dev_priv->mm.gtt_list, gtt_list);
 237         seq_printf(m, "%u [%u] objects, %zu [%zu] bytes in gtt\n",
 238                    count, mappable_count, size, mappable_size);
 239
 240         size = count = mappable_size = mappable_count = 0;
 241         count_objects(&dev_priv->mm.active_list, mm_list);
 242         count_objects(&dev_priv->mm.flushing_list, mm_list);
 243         seq_printf(m, "  %u [%u] active objects, %zu [%zu] bytes\n",
 244                    count, mappable_count, size, mappable_size);
 245
 246         size = count = mappable_size = mappable_count = 0;
 247         count_objects(&dev_priv->mm.inactive_list, mm_list);
 248         seq_printf(m, "  %u [%u] inactive objects, %zu [%zu] bytes\n",
 249                    count, mappable_count, size, mappable_size);
 250
 251         size = count = mappable_size = mappable_count = 0;
 252         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 253                 if (obj->fault_mappable) {
 254                         size += obj->gtt_space->size;
 255                         ++count;
 256                 }
 257                 if (obj->pin_mappable) {
 258                         mappable_size += obj->gtt_space->size;
 259                         ++mappable_count;
 260                 }
 261         }
 262         seq_printf(m, "%u pinned mappable objects, %zu bytes\n",
 263                    mappable_count, mappable_size);
 264         seq_printf(m, "%u fault mappable objects, %zu bytes\n",
 265                    count, size);
 266
 267         seq_printf(m, "%zu [%zu] gtt total\n",
 268                    dev_priv->mm.gtt_total, dev_priv->mm.mappable_gtt_total);
 269
 270         mutex_unlock(&dev->struct_mutex);
 271
 272         return 0;
 273 }
 274
 275 static int i915_gem_gtt_info(struct seq_file *m, void* data)
 276 {
 277         struct drm_info_node *node = (struct drm_info_node *) m->private;
 278         struct drm_device *dev = node->minor->dev;
 279         uintptr_t list = (uintptr_t) node->info_ent->data;
 280         struct drm_i915_private *dev_priv = dev->dev_private;
 281         struct drm_i915_gem_object *obj;
 282         size_t total_obj_size, total_gtt_size;
 283         int count, ret;
 284
 285         ret = mutex_lock_interruptible(&dev->struct_mutex);
 286         if (ret)
 287                 return ret;
 288
 289         total_obj_size = total_gtt_size = count = 0;
 290         list_for_each_entry(obj, &dev_priv->mm.gtt_list, gtt_list) {
 291                 if (list == PINNED_LIST && obj->pin_count == 0)
 292                         continue;
 293
 294                 seq_printf(m, "   ");
 295                 describe_obj(m, obj);
 296                 seq_printf(m, "\n");
 297                 total_obj_size += obj->base.size;
 298                 total_gtt_size += obj->gtt_space->size;
 299                 count++;
 300         }
 301
 302         mutex_unlock(&dev->struct_mutex);
 303
 304         seq_printf(m, "Total %d objects, %zu bytes, %zu GTT size\n",
 305                    count, total_obj_size, total_gtt_size);
 306
 307         return 0;
 308 }
 309
 310 static int i915_gem_pageflip_info(struct seq_file *m, void *data)
 311 {
 312         struct drm_info_node *node = (struct drm_info_node *) m->private;
 313         struct drm_device *dev = node->minor->dev;
 314         unsigned long flags;
 315         struct intel_crtc *crtc;
 316
 317         list_for_each_entry(crtc, &dev->mode_config.crtc_list, base.head) {
 318                 const char pipe = pipe_name(crtc->pipe);
 319                 const char plane = plane_name(crtc->plane);
 320                 struct intel_unpin_work *work;
 321
 322                 spin_lock_irqsave(&dev->event_lock, flags);
 323                 work = crtc->unpin_work;
 324                 if (work == NULL) {
 325                         seq_printf(m, "No flip due on pipe %c (plane %c)\n",
 326                                    pipe, plane);
 327                 } else {
 328                         if (!work->pending) {
 329                                 seq_printf(m, "Flip queued on pipe %c (plane %c)\n",
 330                                            pipe, plane);
 331                         } else {
 332                                 seq_printf(m, "Flip pending (waiting for vsync) on pipe %c (plane %c)\n",
 333                                            pipe, plane);
 334                         }
 335                         if (work->enable_stall_check)
 336                                 seq_printf(m, "Stall check enabled, ");
 337                         else
 338                                 seq_printf(m, "Stall check waiting for page flip ioctl, ");
 339                         seq_printf(m, "%d prepares\n", work->pending);
 340
 341                         if (work->old_fb_obj) {
 342                                 struct drm_i915_gem_object *obj = work->old_fb_obj;
 343                                 if (obj)
 344                                         seq_printf(m, "Old framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 345                         }
 346                         if (work->pending_flip_obj) {
 347                                 struct drm_i915_gem_object *obj = work->pending_flip_obj;
 348                                 if (obj)
 349                                         seq_printf(m, "New framebuffer gtt_offset 0x%08x\n", obj->gtt_offset);
 350                         }
 351                 }
 352                 spin_unlock_irqrestore(&dev->event_lock, flags);
 353         }
 354
 355         return 0;
 356 }
 357
 358 static int i915_gem_request_info(struct seq_file *m, void *data)
 359 {
 360         struct drm_info_node *node = (struct drm_info_node *) m->private;
 361         struct drm_device *dev = node->minor->dev;
 362         drm_i915_private_t *dev_priv = dev->dev_private;
 363         struct drm_i915_gem_request *gem_request;
 364         int ret, count;
 365
 366         ret = mutex_lock_interruptible(&dev->struct_mutex);
 367         if (ret)
 368                 return ret;
 369
 370         count = 0;
 371         if (!list_empty(&dev_priv->ring[RCS].request_list)) {
 372                 seq_printf(m, "Render requests:\n");
 373                 list_for_each_entry(gem_request,
 374                                     &dev_priv->ring[RCS].request_list,
 375                                     list) {
 376                         seq_printf(m, "    %d @ %d\n",
 377                                    gem_request->seqno,
 378                                    (int) (jiffies - gem_request->emitted_jiffies));
 379                 }
 380                 count++;
 381         }
 382         if (!list_empty(&dev_priv->ring[VCS].request_list)) {
 383                 seq_printf(m, "BSD requests:\n");
 384                 list_for_each_entry(gem_request,
 385                                     &dev_priv->ring[VCS].request_list,
 386                                     list) {
 387                         seq_printf(m, "    %d @ %d\n",
 388                                    gem_request->seqno,
 389                                    (int) (jiffies - gem_request->emitted_jiffies));
 390                 }
 391                 count++;
 392         }
 393         if (!list_empty(&dev_priv->ring[BCS].request_list)) {
 394                 seq_printf(m, "BLT requests:\n");
 395                 list_for_each_entry(gem_request,
 396                                     &dev_priv->ring[BCS].request_list,
 397                                     list) {
 398                         seq_printf(m, "    %d @ %d\n",
 399                                    gem_request->seqno,
 400                                    (int) (jiffies - gem_request->emitted_jiffies));
 401                 }
 402                 count++;
 403         }
 404         mutex_unlock(&dev->struct_mutex);
 405
 406         if (count == 0)
 407                 seq_printf(m, "No requests\n");
 408
 409         return 0;
 410 }
 411
 412 static void i915_ring_seqno_info(struct seq_file *m,
 413                                  struct intel_ring_buffer *ring)
 414 {
 415         if (ring->get_seqno) {
 416                 seq_printf(m, "Current sequence (%s): %d\n",
 417                            ring->name, ring->get_seqno(ring));
 418         }
 419 }
 420
 421 static int i915_gem_seqno_info(struct seq_file *m, void *data)
 422 {
 423         struct drm_info_node *node = (struct drm_info_node *) m->private;
 424         struct drm_device *dev = node->minor->dev;
 425         drm_i915_private_t *dev_priv = dev->dev_private;
 426         int ret, i;
 427
 428         ret = mutex_lock_interruptible(&dev->struct_mutex);
 429         if (ret)
 430                 return ret;
 431
 432         for (i = 0; i < I915_NUM_RINGS; i++)
 433                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 434
 435         mutex_unlock(&dev->struct_mutex);
 436
 437         return 0;
 438 }
 439
 440
 441 static int i915_interrupt_info(struct seq_file *m, void *data)
 442 {
 443         struct drm_info_node *node = (struct drm_info_node *) m->private;
 444         struct drm_device *dev = node->minor->dev;
 445         drm_i915_private_t *dev_priv = dev->dev_private;
 446         int ret, i, pipe;
 447
 448         ret = mutex_lock_interruptible(&dev->struct_mutex);
 449         if (ret)
 450                 return ret;
 451
 452         if (IS_VALLEYVIEW(dev)) {
 453                 seq_printf(m, "Display IER:\t%08x\n",
 454                            I915_READ(VLV_IER));
 455                 seq_printf(m, "Display IIR:\t%08x\n",
 456                            I915_READ(VLV_IIR));
 457                 seq_printf(m, "Display IIR_RW:\t%08x\n",
 458                            I915_READ(VLV_IIR_RW));
 459                 seq_printf(m, "Display IMR:\t%08x\n",
 460                            I915_READ(VLV_IMR));
 461                 for_each_pipe(pipe)
 462                         seq_printf(m, "Pipe %c stat:\t%08x\n",
 463                                    pipe_name(pipe),
 464                                    I915_READ(PIPESTAT(pipe)));
 465
 466                 seq_printf(m, "Master IER:\t%08x\n",
 467                            I915_READ(VLV_MASTER_IER));
 468
 469                 seq_printf(m, "Render IER:\t%08x\n",
 470                            I915_READ(GTIER));
 471                 seq_printf(m, "Render IIR:\t%08x\n",
 472                            I915_READ(GTIIR));
 473                 seq_printf(m, "Render IMR:\t%08x\n",
 474                            I915_READ(GTIMR));
 475
 476                 seq_printf(m, "PM IER:\t\t%08x\n",
 477                            I915_READ(GEN6_PMIER));
 478                 seq_printf(m, "PM IIR:\t\t%08x\n",
 479                            I915_READ(GEN6_PMIIR));
 480                 seq_printf(m, "PM IMR:\t\t%08x\n",
 481                            I915_READ(GEN6_PMIMR));
 482
 483                 seq_printf(m, "Port hotplug:\t%08x\n",
 484                            I915_READ(PORT_HOTPLUG_EN));
 485                 seq_printf(m, "DPFLIPSTAT:\t%08x\n",
 486                            I915_READ(VLV_DPFLIPSTAT));
 487                 seq_printf(m, "DPINVGTT:\t%08x\n",
 488                            I915_READ(DPINVGTT));
 489
 490         } else if (!HAS_PCH_SPLIT(dev)) {
 491                 seq_printf(m, "Interrupt enable:    %08x\n",
 492                            I915_READ(IER));
 493                 seq_printf(m, "Interrupt identity:  %08x\n",
 494                            I915_READ(IIR));
 495                 seq_printf(m, "Interrupt mask:      %08x\n",
 496                            I915_READ(IMR));
 497                 for_each_pipe(pipe)
 498                         seq_printf(m, "Pipe %c stat:         %08x\n",
 499                                    pipe_name(pipe),
 500                                    I915_READ(PIPESTAT(pipe)));
 501         } else {
 502                 seq_printf(m, "North Display Interrupt enable:          %08x\n",
 503                            I915_READ(DEIER));
 504                 seq_printf(m, "North Display Interrupt identity:        %08x\n",
 505                            I915_READ(DEIIR));
 506                 seq_printf(m, "North Display Interrupt mask:            %08x\n",
 507                            I915_READ(DEIMR));
 508                 seq_printf(m, "South Display Interrupt enable:          %08x\n",
 509                            I915_READ(SDEIER));
 510                 seq_printf(m, "South Display Interrupt identity:        %08x\n",
 511                            I915_READ(SDEIIR));
 512                 seq_printf(m, "South Display Interrupt mask:            %08x\n",
 513                            I915_READ(SDEIMR));
 514                 seq_printf(m, "Graphics Interrupt enable:               %08x\n",
 515                            I915_READ(GTIER));
 516                 seq_printf(m, "Graphics Interrupt identity:             %08x\n",
 517                            I915_READ(GTIIR));
 518                 seq_printf(m, "Graphics Interrupt mask:         %08x\n",
 519                            I915_READ(GTIMR));
 520         }
 521         seq_printf(m, "Interrupts received: %d\n",
 522                    atomic_read(&dev_priv->irq_received));
 523         for (i = 0; i < I915_NUM_RINGS; i++) {
 524                 if (IS_GEN6(dev) || IS_GEN7(dev)) {
 525                         seq_printf(m, "Graphics Interrupt mask (%s):    %08x\n",
 526                                    dev_priv->ring[i].name,
 527                                    I915_READ_IMR(&dev_priv->ring[i]));
 528                 }
 529                 i915_ring_seqno_info(m, &dev_priv->ring[i]);
 530         }
 531         mutex_unlock(&dev->struct_mutex);
 532
 533         return 0;
 534 }
 535
 536 static int i915_gem_fence_regs_info(struct seq_file *m, void *data)
 537 {
 538         struct drm_info_node *node = (struct drm_info_node *) m->private;
 539         struct drm_device *dev = node->minor->dev;
 540         drm_i915_private_t *dev_priv = dev->dev_private;
 541         int i, ret;
 542
 543         ret = mutex_lock_interruptible(&dev->struct_mutex);
 544         if (ret)
 545                 return ret;
 546
 547         seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start);
 548         seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs);
 549         for (i = 0; i < dev_priv->num_fence_regs; i++) {
 550                 struct drm_i915_gem_object *obj = dev_priv->fence_regs[i].obj;
 551
 552                 seq_printf(m, "Fenced object[%2d] = ", i);
 553                 if (obj == NULL)
 554                         seq_printf(m, "unused");
 555                 else
 556                         describe_obj(m, obj);
 557                 seq_printf(m, "\n");
 558         }
 559
 560         mutex_unlock(&dev->struct_mutex);
 561         return 0;
 562 }
 563
 564 static int i915_hws_info(struct seq_file *m, void *data)
 565 {
 566         struct drm_info_node *node = (struct drm_info_node *) m->private;
 567         struct drm_device *dev = node->minor->dev;
 568         drm_i915_private_t *dev_priv = dev->dev_private;
 569         struct intel_ring_buffer *ring;
 570         const volatile u32 __iomem *hws;
 571         int i;
 572
 573         ring = &dev_priv->ring[(uintptr_t)node->info_ent->data];
 574         hws = (volatile u32 __iomem *)ring->status_page.page_addr;
 575         if (hws == NULL)
 576                 return 0;
 577
 578         for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) {
 579                 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n",
 580                            i * 4,
 581                            hws[i], hws[i + 1], hws[i + 2], hws[i + 3]);
 582         }
 583         return 0;
 584 }
 585
 586 static const char *ring_str(int ring)
 587 {
 588         switch (ring) {
 589         case RCS: return "render";
 590         case VCS: return "bsd";
 591         case BCS: return "blt";
 592         default: return "";
 593         }
 594 }
 595
 596 static const char *pin_flag(int pinned)
 597 {
 598         if (pinned > 0)
 599                 return " P";
 600         else if (pinned < 0)
 601                 return " p";
 602         else
 603                 return "";
 604 }
 605
 606 static const char *tiling_flag(int tiling)
 607 {
 608         switch (tiling) {
 609         default:
 610         case I915_TILING_NONE: return "";
 611         case I915_TILING_X: return " X";
 612         case I915_TILING_Y: return " Y";
 613         }
 614 }
 615
 616 static const char *dirty_flag(int dirty)
 617 {
 618         return dirty ? " dirty" : "";
 619 }
 620
 621 static const char *purgeable_flag(int purgeable)
 622 {
 623         return purgeable ? " purgeable" : "";
 624 }
 625
 626 static void print_error_buffers(struct seq_file *m,
 627                                 const char *name,
 628                                 struct drm_i915_error_buffer *err,
 629                                 int count)
 630 {
 631         seq_printf(m, "%s [%d]:\n", name, count);
 632
 633         while (count--) {
 634                 seq_printf(m, "  %08x %8u %04x %04x %x %x%s%s%s%s%s%s%s",
 635                            err->gtt_offset,
 636                            err->size,
 637                            err->read_domains,
 638                            err->write_domain,
 639                            err->rseqno, err->wseqno,
 640                            pin_flag(err->pinned),
 641                            tiling_flag(err->tiling),
 642                            dirty_flag(err->dirty),
 643                            purgeable_flag(err->purgeable),
 644                            err->ring != -1 ? " " : "",
 645                            ring_str(err->ring),
 646                            cache_level_str(err->cache_level));
 647
 648                 if (err->name)
 649                         seq_printf(m, " (name: %d)", err->name);
 650                 if (err->fence_reg != I915_FENCE_REG_NONE)
 651                         seq_printf(m, " (fence: %d)", err->fence_reg);
 652
 653                 seq_printf(m, "\n");
 654                 err++;
 655         }
 656 }
 657
 658 static void i915_ring_error_state(struct seq_file *m,
 659                                   struct drm_device *dev,
 660                                   struct drm_i915_error_state *error,
 661                                   unsigned ring)
 662 {
 663         BUG_ON(ring >= I915_NUM_RINGS); /* shut up confused gcc */
 664         seq_printf(m, "%s command stream:\n", ring_str(ring));
 665         seq_printf(m, "  HEAD: 0x%08x\n", error->head[ring]);
 666         seq_printf(m, "  TAIL: 0x%08x\n", error->tail[ring]);
 667         seq_printf(m, "  ACTHD: 0x%08x\n", error->acthd[ring]);
 668         seq_printf(m, "  IPEIR: 0x%08x\n", error->ipeir[ring]);
 669         seq_printf(m, "  IPEHR: 0x%08x\n", error->ipehr[ring]);
 670         seq_printf(m, "  INSTDONE: 0x%08x\n", error->instdone[ring]);
 671         if (ring == RCS && INTEL_INFO(dev)->gen >= 4) {
 672                 seq_printf(m, "  INSTDONE1: 0x%08x\n", error->instdone1);
 673                 seq_printf(m, "  BBADDR: 0x%08llx\n", error->bbaddr);
 674         }
 675         if (INTEL_INFO(dev)->gen >= 4)
 676                 seq_printf(m, "  INSTPS: 0x%08x\n", error->instps[ring]);
 677         seq_printf(m, "  INSTPM: 0x%08x\n", error->instpm[ring]);
 678         seq_printf(m, "  FADDR: 0x%08x\n", error->faddr[ring]);
 679         if (INTEL_INFO(dev)->gen >= 6) {
 680                 seq_printf(m, "  RC PSMI: 0x%08x\n", error->rc_psmi[ring]);
 681                 seq_printf(m, "  FAULT_REG: 0x%08x\n", error->fault_reg[ring]);
 682                 seq_printf(m, "  SYNC_0: 0x%08x\n",
 683                            error->semaphore_mboxes[ring][0]);
 684                 seq_printf(m, "  SYNC_1: 0x%08x\n",
 685                            error->semaphore_mboxes[ring][1]);
 686         }
 687         seq_printf(m, "  seqno: 0x%08x\n", error->seqno[ring]);
 688         seq_printf(m, "  waiting: %s\n", yesno(error->waiting[ring]));
 689         seq_printf(m, "  ring->head: 0x%08x\n", error->cpu_ring_head[ring]);
 690         seq_printf(m, "  ring->tail: 0x%08x\n", error->cpu_ring_tail[ring]);
 691 }
 692
 693 struct i915_error_state_file_priv {
 694         struct drm_device *dev;
 695         struct drm_i915_error_state *error;
 696 };
 697
 698 static int i915_error_state(struct seq_file *m, void *unused)
 699 {
 700         struct i915_error_state_file_priv *error_priv = m->private;
 701         struct drm_device *dev = error_priv->dev;
 702         drm_i915_private_t *dev_priv = dev->dev_private;
 703         struct drm_i915_error_state *error = error_priv->error;
 704         struct intel_ring_buffer *ring;
 705         int i, j, page, offset, elt;
 706
 707         if (!error) {
 708                 seq_printf(m, "no error state collected\n");
 709                 return 0;
 710         }
 711
 712         seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
 713                    error->time.tv_usec);
 714         seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
 715         seq_printf(m, "EIR: 0x%08x\n", error->eir);
 716         seq_printf(m, "IER: 0x%08x\n", error->ier);
 717         seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
 718         seq_printf(m, "CCID: 0x%08x\n", error->ccid);
 719
 720         for (i = 0; i < dev_priv->num_fence_regs; i++)
 721                 seq_printf(m, "  fence[%d] = %08llx\n", i, error->fence[i]);
 722
 723         if (INTEL_INFO(dev)->gen >= 6) {
 724                 seq_printf(m, "ERROR: 0x%08x\n", error->error);
 725                 seq_printf(m, "DONE_REG: 0x%08x\n", error->done_reg);
 726         }
 727
 728         for_each_ring(ring, dev_priv, i)
 729                 i915_ring_error_state(m, dev, error, i);
 730
 731         if (error->active_bo)
 732                 print_error_buffers(m, "Active",
 733                                     error->active_bo,
 734                                     error->active_bo_count);
 735
 736         if (error->pinned_bo)
 737                 print_error_buffers(m, "Pinned",
 738                                     error->pinned_bo,
 739                                     error->pinned_bo_count);
 740
 741         for (i = 0; i < ARRAY_SIZE(error->ring); i++) {
 742                 struct drm_i915_error_object *obj;
 743
 744                 if ((obj = error->ring[i].batchbuffer)) {
 745                         seq_printf(m, "%s --- gtt_offset = 0x%08x\n",
 746                                    dev_priv->ring[i].name,
 747                                    obj->gtt_offset);
 748                         offset = 0;
 749                         for (page = 0; page < obj->page_count; page++) {
 750                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 751                                         seq_printf(m, "%08x :  %08x\n", offset, obj->pages[page][elt]);
 752                                         offset += 4;
 753                                 }
 754                         }
 755                 }
 756
 757                 if (error->ring[i].num_requests) {
 758                         seq_printf(m, "%s --- %d requests\n",
 759                                    dev_priv->ring[i].name,
 760                                    error->ring[i].num_requests);
 761                         for (j = 0; j < error->ring[i].num_requests; j++) {
 762                                 seq_printf(m, "  seqno 0x%08x, emitted %ld, tail 0x%08x\n",
 763                                            error->ring[i].requests[j].seqno,
 764                                            error->ring[i].requests[j].jiffies,
 765                                            error->ring[i].requests[j].tail);
 766                         }
 767                 }
 768
 769                 if ((obj = error->ring[i].ringbuffer)) {
 770                         seq_printf(m, "%s --- ringbuffer = 0x%08x\n",
 771                                    dev_priv->ring[i].name,
 772                                    obj->gtt_offset);
 773                         offset = 0;
 774                         for (page = 0; page < obj->page_count; page++) {
 775                                 for (elt = 0; elt < PAGE_SIZE/4; elt++) {
 776                                         seq_printf(m, "%08x :  %08x\n",
 777                                                    offset,
 778                                                    obj->pages[page][elt]);
 779                                         offset += 4;
 780                                 }
 781                         }
 782                 }
 783         }
 784
 785         if (error->overlay)
 786                 intel_overlay_print_error_state(m, error->overlay);
 787
 788         if (error->display)
 789                 intel_display_print_error_state(m, dev, error->display);
 790
 791         return 0;
 792 }
 793
 794 static ssize_t
 795 i915_error_state_write(struct file *filp,
 796                        const char __user *ubuf,
 797                        size_t cnt,
 798                        loff_t *ppos)
 799 {
 800         struct seq_file *m = filp->private_data;
 801         struct i915_error_state_file_priv *error_priv = m->private;
 802         struct drm_device *dev = error_priv->dev;
 803
 804         DRM_DEBUG_DRIVER("Resetting error state\n");
 805
 806         mutex_lock(&dev->struct_mutex);
 807         i915_destroy_error_state(dev);
 808         mutex_unlock(&dev->struct_mutex);
 809
 810         return cnt;
 811 }
 812
 813 static int i915_error_state_open(struct inode *inode, struct file *file)
 814 {
 815         struct drm_device *dev = inode->i_private;
 816         drm_i915_private_t *dev_priv = dev->dev_private;
 817         struct i915_error_state_file_priv *error_priv;
 818         unsigned long flags;
 819
 820         error_priv = kzalloc(sizeof(*error_priv), GFP_KERNEL);
 821         if (!error_priv)
 822                 return -ENOMEM;
 823
 824         error_priv->dev = dev;
 825
 826         spin_lock_irqsave(&dev_priv->error_lock, flags);
 827         error_priv->error = dev_priv->first_error;
 828         if (error_priv->error)
 829                 kref_get(&error_priv->error->ref);
 830         spin_unlock_irqrestore(&dev_priv->error_lock, flags);
 831
 832         return single_open(file, i915_error_state, error_priv);
 833 }
 834
 835 static int i915_error_state_release(struct inode *inode, struct file *file)
 836 {
 837         struct seq_file *m = file->private_data;
 838         struct i915_error_state_file_priv *error_priv = m->private;
 839
 840         if (error_priv->error)
 841                 kref_put(&error_priv->error->ref, i915_error_state_free);
 842         kfree(error_priv);
 843
 844         return single_release(inode, file);
 845 }
 846
 847 static const struct file_operations i915_error_state_fops = {
 848         .owner = THIS_MODULE,
 849         .open = i915_error_state_open,
 850         .read = seq_read,
 851         .write = i915_error_state_write,
 852         .llseek = default_llseek,
 853         .release = i915_error_state_release,
 854 };
 855
 856 static int i915_rstdby_delays(struct seq_file *m, void *unused)
 857 {
 858         struct drm_info_node *node = (struct drm_info_node *) m->private;
 859         struct drm_device *dev = node->minor->dev;
 860         drm_i915_private_t *dev_priv = dev->dev_private;
 861         u16 crstanddelay;
 862         int ret;
 863
 864         ret = mutex_lock_interruptible(&dev->struct_mutex);
 865         if (ret)
 866                 return ret;
 867
 868         crstanddelay = I915_READ16(CRSTANDVID);
 869
 870         mutex_unlock(&dev->struct_mutex);
 871
 872         seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f));
 873
 874         return 0;
 875 }
 876
 877 static int i915_cur_delayinfo(struct seq_file *m, void *unused)
 878 {
 879         struct drm_info_node *node = (struct drm_info_node *) m->private;
 880         struct drm_device *dev = node->minor->dev;
 881         drm_i915_private_t *dev_priv = dev->dev_private;
 882         int ret;
 883
 884         if (IS_GEN5(dev)) {
 885                 u16 rgvswctl = I915_READ16(MEMSWCTL);
 886                 u16 rgvstat = I915_READ16(MEMSTAT_ILK);
 887
 888                 seq_printf(m, "Requested P-state: %d\n", (rgvswctl >> 8) & 0xf);
 889                 seq_printf(m, "Requested VID: %d\n", rgvswctl & 0x3f);
 890                 seq_printf(m, "Current VID: %d\n", (rgvstat & MEMSTAT_VID_MASK) >>
 891                            MEMSTAT_VID_SHIFT);
 892                 seq_printf(m, "Current P-state: %d\n",
 893                            (rgvstat & MEMSTAT_PSTATE_MASK) >> MEMSTAT_PSTATE_SHIFT);
 894         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
 895                 u32 gt_perf_status = I915_READ(GEN6_GT_PERF_STATUS);
 896                 u32 rp_state_limits = I915_READ(GEN6_RP_STATE_LIMITS);
 897                 u32 rp_state_cap = I915_READ(GEN6_RP_STATE_CAP);
 898                 u32 rpstat;
 899                 u32 rpupei, rpcurup, rpprevup;
 900                 u32 rpdownei, rpcurdown, rpprevdown;
 901                 int max_freq;
 902
 903                 /* RPSTAT1 is in the GT power well */
 904                 ret = mutex_lock_interruptible(&dev->struct_mutex);
 905                 if (ret)
 906                         return ret;
 907
 908                 gen6_gt_force_wake_get(dev_priv);
 909
 910                 rpstat = I915_READ(GEN6_RPSTAT1);
 911                 rpupei = I915_READ(GEN6_RP_CUR_UP_EI);
 912                 rpcurup = I915_READ(GEN6_RP_CUR_UP);
 913                 rpprevup = I915_READ(GEN6_RP_PREV_UP);
 914                 rpdownei = I915_READ(GEN6_RP_CUR_DOWN_EI);
 915                 rpcurdown = I915_READ(GEN6_RP_CUR_DOWN);
 916                 rpprevdown = I915_READ(GEN6_RP_PREV_DOWN);
 917
 918                 gen6_gt_force_wake_put(dev_priv);
 919                 mutex_unlock(&dev->struct_mutex);
 920
 921                 seq_printf(m, "GT_PERF_STATUS: 0x%08x\n", gt_perf_status);
 922                 seq_printf(m, "RPSTAT1: 0x%08x\n", rpstat);
 923                 seq_printf(m, "Render p-state ratio: %d\n",
 924                            (gt_perf_status & 0xff00) >> 8);
 925                 seq_printf(m, "Render p-state VID: %d\n",
 926                            gt_perf_status & 0xff);
 927                 seq_printf(m, "Render p-state limit: %d\n",
 928                            rp_state_limits & 0xff);
 929                 seq_printf(m, "CAGF: %dMHz\n", ((rpstat & GEN6_CAGF_MASK) >>
 930                                                 GEN6_CAGF_SHIFT) * 50);
 931                 seq_printf(m, "RP CUR UP EI: %dus\n", rpupei &
 932                            GEN6_CURICONT_MASK);
 933                 seq_printf(m, "RP CUR UP: %dus\n", rpcurup &
 934                            GEN6_CURBSYTAVG_MASK);
 935                 seq_printf(m, "RP PREV UP: %dus\n", rpprevup &
 936                            GEN6_CURBSYTAVG_MASK);
 937                 seq_printf(m, "RP CUR DOWN EI: %dus\n", rpdownei &
 938                            GEN6_CURIAVG_MASK);
 939                 seq_printf(m, "RP CUR DOWN: %dus\n", rpcurdown &
 940                            GEN6_CURBSYTAVG_MASK);
 941                 seq_printf(m, "RP PREV DOWN: %dus\n", rpprevdown &
 942                            GEN6_CURBSYTAVG_MASK);
 943
 944                 max_freq = (rp_state_cap & 0xff0000) >> 16;
 945                 seq_printf(m, "Lowest (RPN) frequency: %dMHz\n",
 946                            max_freq * 50);
 947
 948                 max_freq = (rp_state_cap & 0xff00) >> 8;
 949                 seq_printf(m, "Nominal (RP1) frequency: %dMHz\n",
 950                            max_freq * 50);
 951
 952                 max_freq = rp_state_cap & 0xff;
 953                 seq_printf(m, "Max non-overclocked (RP0) frequency: %dMHz\n",
 954                            max_freq * 50);
 955         } else {
 956                 seq_printf(m, "no P-state info available\n");
 957         }
 958
 959         return 0;
 960 }
 961
 962 static int i915_delayfreq_table(struct seq_file *m, void *unused)
 963 {
 964         struct drm_info_node *node = (struct drm_info_node *) m->private;
 965         struct drm_device *dev = node->minor->dev;
 966         drm_i915_private_t *dev_priv = dev->dev_private;
 967         u32 delayfreq;
 968         int ret, i;
 969
 970         ret = mutex_lock_interruptible(&dev->struct_mutex);
 971         if (ret)
 972                 return ret;
 973
 974         for (i = 0; i < 16; i++) {
 975                 delayfreq = I915_READ(PXVFREQ_BASE + i * 4);
 976                 seq_printf(m, "P%02dVIDFREQ: 0x%08x (VID: %d)\n", i, delayfreq,
 977                            (delayfreq & PXVFREQ_PX_MASK) >> PXVFREQ_PX_SHIFT);
 978         }
 979
 980         mutex_unlock(&dev->struct_mutex);
 981
 982         return 0;
 983 }
 984
 985 static inline int MAP_TO_MV(int map)
 986 {
 987         return 1250 - (map * 25);
 988 }
 989
 990 static int i915_inttoext_table(struct seq_file *m, void *unused)
 991 {
 992         struct drm_info_node *node = (struct drm_info_node *) m->private;
 993         struct drm_device *dev = node->minor->dev;
 994         drm_i915_private_t *dev_priv = dev->dev_private;
 995         u32 inttoext;
 996         int ret, i;
 997
 998         ret = mutex_lock_interruptible(&dev->struct_mutex);
 999         if (ret)
1000                 return ret;
1001
1002         for (i = 1; i <= 32; i++) {
1003                 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4);
1004                 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext);
1005         }
1006
1007         mutex_unlock(&dev->struct_mutex);
1008
1009         return 0;
1010 }
1011
1012 static int ironlake_drpc_info(struct seq_file *m)
1013 {
1014         struct drm_info_node *node = (struct drm_info_node *) m->private;
1015         struct drm_device *dev = node->minor->dev;
1016         drm_i915_private_t *dev_priv = dev->dev_private;
1017         u32 rgvmodectl, rstdbyctl;
1018         u16 crstandvid;
1019         int ret;
1020
1021         ret = mutex_lock_interruptible(&dev->struct_mutex);
1022         if (ret)
1023                 return ret;
1024
1025         rgvmodectl = I915_READ(MEMMODECTL);
1026         rstdbyctl = I915_READ(RSTDBYCTL);
1027         crstandvid = I915_READ16(CRSTANDVID);
1028
1029         mutex_unlock(&dev->struct_mutex);
1030
1031         seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ?
1032                    "yes" : "no");
1033         seq_printf(m, "Boost freq: %d\n",
1034                    (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >>
1035                    MEMMODE_BOOST_FREQ_SHIFT);
1036         seq_printf(m, "HW control enabled: %s\n",
1037                    rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no");
1038         seq_printf(m, "SW control enabled: %s\n",
1039                    rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no");
1040         seq_printf(m, "Gated voltage change: %s\n",
1041                    rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no");
1042         seq_printf(m, "Starting frequency: P%d\n",
1043                    (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT);
1044         seq_printf(m, "Max P-state: P%d\n",
1045                    (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT);
1046         seq_printf(m, "Min P-state: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK));
1047         seq_printf(m, "RS1 VID: %d\n", (crstandvid & 0x3f));
1048         seq_printf(m, "RS2 VID: %d\n", ((crstandvid >> 8) & 0x3f));
1049         seq_printf(m, "Render standby enabled: %s\n",
1050                    (rstdbyctl & RCX_SW_EXIT) ? "no" : "yes");
1051         seq_printf(m, "Current RS state: ");
1052         switch (rstdbyctl & RSX_STATUS_MASK) {
1053         case RSX_STATUS_ON:
1054                 seq_printf(m, "on\n");
1055                 break;
1056         case RSX_STATUS_RC1:
1057                 seq_printf(m, "RC1\n");
1058                 break;
1059         case RSX_STATUS_RC1E:
1060                 seq_printf(m, "RC1E\n");
1061                 break;
1062         case RSX_STATUS_RS1:
1063                 seq_printf(m, "RS1\n");
1064                 break;
1065         case RSX_STATUS_RS2:
1066                 seq_printf(m, "RS2 (RC6)\n");
1067                 break;
1068         case RSX_STATUS_RS3:
1069                 seq_printf(m, "RC3 (RC6+)\n");
1070                 break;
1071         default:
1072                 seq_printf(m, "unknown\n");
1073                 break;
1074         }
1075
1076         return 0;
1077 }
1078
1079 static int gen6_drpc_info(struct seq_file *m)
1080 {
1081
1082         struct drm_info_node *node = (struct drm_info_node *) m->private;
1083         struct drm_device *dev = node->minor->dev;
1084         struct drm_i915_private *dev_priv = dev->dev_private;
1085         u32 rpmodectl1, gt_core_status, rcctl1;
1086         unsigned forcewake_count;
1087         int count=0, ret;
1088
1089
1090         ret = mutex_lock_interruptible(&dev->struct_mutex);
1091         if (ret)
1092                 return ret;
1093
1094         spin_lock_irq(&dev_priv->gt_lock);
1095         forcewake_count = dev_priv->forcewake_count;
1096         spin_unlock_irq(&dev_priv->gt_lock);
1097
1098         if (forcewake_count) {
1099                 seq_printf(m, "RC information inaccurate because somebody "
1100                               "holds a forcewake reference \n");
1101         } else {
1102                 /* NB: we cannot use forcewake, else we read the wrong values */
1103                 while (count++ < 50 && (I915_READ_NOTRACE(FORCEWAKE_ACK) & 1))
1104                         udelay(10);
1105                 seq_printf(m, "RC information accurate: %s\n", yesno(count < 51));
1106         }
1107
1108         gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
1109         trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4);
1110
1111         rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
1112         rcctl1 = I915_READ(GEN6_RC_CONTROL);
1113         mutex_unlock(&dev->struct_mutex);
1114
1115         seq_printf(m, "Video Turbo Mode: %s\n",
1116                    yesno(rpmodectl1 & GEN6_RP_MEDIA_TURBO));
1117         seq_printf(m, "HW control enabled: %s\n",
1118                    yesno(rpmodectl1 & GEN6_RP_ENABLE));
1119         seq_printf(m, "SW control enabled: %s\n",
1120                    yesno((rpmodectl1 & GEN6_RP_MEDIA_MODE_MASK) ==
1121                           GEN6_RP_MEDIA_SW_MODE));
1122         seq_printf(m, "RC1e Enabled: %s\n",
1123                    yesno(rcctl1 & GEN6_RC_CTL_RC1e_ENABLE));
1124         seq_printf(m, "RC6 Enabled: %s\n",
1125                    yesno(rcctl1 & GEN6_RC_CTL_RC6_ENABLE));
1126         seq_printf(m, "Deep RC6 Enabled: %s\n",
1127                    yesno(rcctl1 & GEN6_RC_CTL_RC6p_ENABLE));
1128         seq_printf(m, "Deepest RC6 Enabled: %s\n",
1129                    yesno(rcctl1 & GEN6_RC_CTL_RC6pp_ENABLE));
1130         seq_printf(m, "Current RC state: ");
1131         switch (gt_core_status & GEN6_RCn_MASK) {
1132         case GEN6_RC0:
1133                 if (gt_core_status & GEN6_CORE_CPD_STATE_MASK)
1134                         seq_printf(m, "Core Power Down\n");
1135                 else
1136                         seq_printf(m, "on\n");
1137                 break;
1138         case GEN6_RC3:
1139                 seq_printf(m, "RC3\n");
1140                 break;
1141         case GEN6_RC6:
1142                 seq_printf(m, "RC6\n");
1143                 break;
1144         case GEN6_RC7:
1145                 seq_printf(m, "RC7\n");
1146                 break;
1147         default:
1148                 seq_printf(m, "Unknown\n");
1149                 break;
1150         }
1151
1152         seq_printf(m, "Core Power Down: %s\n",
1153                    yesno(gt_core_status & GEN6_CORE_CPD_STATE_MASK));
1154
1155         /* Not exactly sure what this is */
1156         seq_printf(m, "RC6 \"Locked to RPn\" residency since boot: %u\n",
1157                    I915_READ(GEN6_GT_GFX_RC6_LOCKED));
1158         seq_printf(m, "RC6 residency since boot: %u\n",
1159                    I915_READ(GEN6_GT_GFX_RC6));
1160         seq_printf(m, "RC6+ residency since boot: %u\n",
1161                    I915_READ(GEN6_GT_GFX_RC6p));
1162         seq_printf(m, "RC6++ residency since boot: %u\n",
1163                    I915_READ(GEN6_GT_GFX_RC6pp));
1164
1165         return 0;
1166 }
1167
1168 static int i915_drpc_info(struct seq_file *m, void *unused)
1169 {
1170         struct drm_info_node *node = (struct drm_info_node *) m->private;
1171         struct drm_device *dev = node->minor->dev;
1172
1173         if (IS_GEN6(dev) || IS_GEN7(dev))
1174                 return gen6_drpc_info(m);
1175         else
1176                 return ironlake_drpc_info(m);
1177 }
1178
1179 static int i915_fbc_status(struct seq_file *m, void *unused)
1180 {
1181         struct drm_info_node *node = (struct drm_info_node *) m->private;
1182         struct drm_device *dev = node->minor->dev;
1183         drm_i915_private_t *dev_priv = dev->dev_private;
1184
1185         if (!I915_HAS_FBC(dev)) {
1186                 seq_printf(m, "FBC unsupported on this chipset\n");
1187                 return 0;
1188         }
1189
1190         if (intel_fbc_enabled(dev)) {
1191                 seq_printf(m, "FBC enabled\n");
1192         } else {
1193                 seq_printf(m, "FBC disabled: ");
1194                 switch (dev_priv->no_fbc_reason) {
1195                 case FBC_NO_OUTPUT:
1196                         seq_printf(m, "no outputs");
1197                         break;
1198                 case FBC_STOLEN_TOO_SMALL:
1199                         seq_printf(m, "not enough stolen memory");
1200                         break;
1201                 case FBC_UNSUPPORTED_MODE:
1202                         seq_printf(m, "mode not supported");
1203                         break;
1204                 case FBC_MODE_TOO_LARGE:
1205                         seq_printf(m, "mode too large");
1206                         break;
1207                 case FBC_BAD_PLANE:
1208                         seq_printf(m, "FBC unsupported on plane");
1209                         break;
1210                 case FBC_NOT_TILED:
1211                         seq_printf(m, "scanout buffer not tiled");
1212                         break;
1213                 case FBC_MULTIPLE_PIPES:
1214                         seq_printf(m, "multiple pipes are enabled");
1215                         break;
1216                 case FBC_MODULE_PARAM:
1217                         seq_printf(m, "disabled per module param (default off)");
1218                         break;
1219                 default:
1220                         seq_printf(m, "unknown reason");
1221                 }
1222                 seq_printf(m, "\n");
1223         }
1224         return 0;
1225 }
1226
1227 static int i915_sr_status(struct seq_file *m, void *unused)
1228 {
1229         struct drm_info_node *node = (struct drm_info_node *) m->private;
1230         struct drm_device *dev = node->minor->dev;
1231         drm_i915_private_t *dev_priv = dev->dev_private;
1232         bool sr_enabled = false;
1233
1234         if (HAS_PCH_SPLIT(dev))
1235                 sr_enabled = I915_READ(WM1_LP_ILK) & WM1_LP_SR_EN;
1236         else if (IS_CRESTLINE(dev) || IS_I945G(dev) || IS_I945GM(dev))
1237                 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN;
1238         else if (IS_I915GM(dev))
1239                 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN;
1240         else if (IS_PINEVIEW(dev))
1241                 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN;
1242
1243         seq_printf(m, "self-refresh: %s\n",
1244                    sr_enabled ? "enabled" : "disabled");
1245
1246         return 0;
1247 }
1248
1249 static int i915_emon_status(struct seq_file *m, void *unused)
1250 {
1251         struct drm_info_node *node = (struct drm_info_node *) m->private;
1252         struct drm_device *dev = node->minor->dev;
1253         drm_i915_private_t *dev_priv = dev->dev_private;
1254         unsigned long temp, chipset, gfx;
1255         int ret;
1256
1257         if (!IS_GEN5(dev))
1258                 return -ENODEV;
1259
1260         ret = mutex_lock_interruptible(&dev->struct_mutex);
1261         if (ret)
1262                 return ret;
1263
1264         temp = i915_mch_val(dev_priv);
1265         chipset = i915_chipset_val(dev_priv);
1266         gfx = i915_gfx_val(dev_priv);
1267         mutex_unlock(&dev->struct_mutex);
1268
1269         seq_printf(m, "GMCH temp: %ld\n", temp);
1270         seq_printf(m, "Chipset power: %ld\n", chipset);
1271         seq_printf(m, "GFX power: %ld\n", gfx);
1272         seq_printf(m, "Total power: %ld\n", chipset + gfx);
1273
1274         return 0;
1275 }
1276
1277 static int i915_ring_freq_table(struct seq_file *m, void *unused)
1278 {
1279         struct drm_info_node *node = (struct drm_info_node *) m->private;
1280         struct drm_device *dev = node->minor->dev;
1281         drm_i915_private_t *dev_priv = dev->dev_private;
1282         int ret;
1283         int gpu_freq, ia_freq;
1284
1285         if (!(IS_GEN6(dev) || IS_GEN7(dev))) {
1286                 seq_printf(m, "unsupported on this chipset\n");
1287                 return 0;
1288         }
1289
1290         ret = mutex_lock_interruptible(&dev->struct_mutex);
1291         if (ret)
1292                 return ret;
1293
1294         seq_printf(m, "GPU freq (MHz)\tEffective CPU freq (MHz)\n");
1295
1296         for (gpu_freq = dev_priv->min_delay; gpu_freq <= dev_priv->max_delay;
1297              gpu_freq++) {
1298                 I915_WRITE(GEN6_PCODE_DATA, gpu_freq);
1299                 I915_WRITE(GEN6_PCODE_MAILBOX, GEN6_PCODE_READY |
1300                            GEN6_PCODE_READ_MIN_FREQ_TABLE);
1301                 if (wait_for((I915_READ(GEN6_PCODE_MAILBOX) &
1302                               GEN6_PCODE_READY) == 0, 10)) {
1303                         DRM_ERROR("pcode read of freq table timed out\n");
1304                         continue;
1305                 }
1306                 ia_freq = I915_READ(GEN6_PCODE_DATA);
1307                 seq_printf(m, "%d\t\t%d\n", gpu_freq * 50, ia_freq * 100);
1308         }
1309
1310         mutex_unlock(&dev->struct_mutex);
1311
1312         return 0;
1313 }
1314
1315 static int i915_gfxec(struct seq_file *m, void *unused)
1316 {
1317         struct drm_info_node *node = (struct drm_info_node *) m->private;
1318         struct drm_device *dev = node->minor->dev;
1319         drm_i915_private_t *dev_priv = dev->dev_private;
1320         int ret;
1321
1322         ret = mutex_lock_interruptible(&dev->struct_mutex);
1323         if (ret)
1324                 return ret;
1325
1326         seq_printf(m, "GFXEC: %ld\n", (unsigned long)I915_READ(0x112f4));
1327
1328         mutex_unlock(&dev->struct_mutex);
1329
1330         return 0;
1331 }
1332
1333 static int i915_opregion(struct seq_file *m, void *unused)
1334 {
1335         struct drm_info_node *node = (struct drm_info_node *) m->private;
1336         struct drm_device *dev = node->minor->dev;
1337         drm_i915_private_t *dev_priv = dev->dev_private;
1338         struct intel_opregion *opregion = &dev_priv->opregion;
1339         void *data = kmalloc(OPREGION_SIZE, GFP_KERNEL);
1340         int ret;
1341
1342         if (data == NULL)
1343                 return -ENOMEM;
1344
1345         ret = mutex_lock_interruptible(&dev->struct_mutex);
1346         if (ret)
1347                 goto out;
1348
1349         if (opregion->header) {
1350                 memcpy_fromio(data, opregion->header, OPREGION_SIZE);
1351                 seq_write(m, data, OPREGION_SIZE);
1352         }
1353
1354         mutex_unlock(&dev->struct_mutex);
1355
1356 out:
1357         kfree(data);
1358         return 0;
1359 }
1360
1361 static int i915_gem_framebuffer_info(struct seq_file *m, void *data)
1362 {
1363         struct drm_info_node *node = (struct drm_info_node *) m->private;
1364         struct drm_device *dev = node->minor->dev;
1365         drm_i915_private_t *dev_priv = dev->dev_private;
1366         struct intel_fbdev *ifbdev;
1367         struct intel_framebuffer *fb;
1368         int ret;
1369
1370         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1371         if (ret)
1372                 return ret;
1373
1374         ifbdev = dev_priv->fbdev;
1375         fb = to_intel_framebuffer(ifbdev->helper.fb);
1376
1377         seq_printf(m, "fbcon size: %d x %d, depth %d, %d bpp, obj ",
1378                    fb->base.width,
1379                    fb->base.height,
1380                    fb->base.depth,
1381                    fb->base.bits_per_pixel);
1382         describe_obj(m, fb->obj);
1383         seq_printf(m, "\n");
1384
1385         list_for_each_entry(fb, &dev->mode_config.fb_list, base.head) {
1386                 if (&fb->base == ifbdev->helper.fb)
1387                         continue;
1388
1389                 seq_printf(m, "user size: %d x %d, depth %d, %d bpp, obj ",
1390                            fb->base.width,
1391                            fb->base.height,
1392                            fb->base.depth,
1393                            fb->base.bits_per_pixel);
1394                 describe_obj(m, fb->obj);
1395                 seq_printf(m, "\n");
1396         }
1397
1398         mutex_unlock(&dev->mode_config.mutex);
1399
1400         return 0;
1401 }
1402
1403 static int i915_context_status(struct seq_file *m, void *unused)
1404 {
1405         struct drm_info_node *node = (struct drm_info_node *) m->private;
1406         struct drm_device *dev = node->minor->dev;
1407         drm_i915_private_t *dev_priv = dev->dev_private;
1408         int ret;
1409
1410         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1411         if (ret)
1412                 return ret;
1413
1414         if (dev_priv->pwrctx) {
1415                 seq_printf(m, "power context ");
1416                 describe_obj(m, dev_priv->pwrctx);
1417                 seq_printf(m, "\n");
1418         }
1419
1420         if (dev_priv->renderctx) {
1421                 seq_printf(m, "render context ");
1422                 describe_obj(m, dev_priv->renderctx);
1423                 seq_printf(m, "\n");
1424         }
1425
1426         mutex_unlock(&dev->mode_config.mutex);
1427
1428         return 0;
1429 }
1430
1431 static int i915_gen6_forcewake_count_info(struct seq_file *m, void *data)
1432 {
1433         struct drm_info_node *node = (struct drm_info_node *) m->private;
1434         struct drm_device *dev = node->minor->dev;
1435         struct drm_i915_private *dev_priv = dev->dev_private;
1436         unsigned forcewake_count;
1437
1438         spin_lock_irq(&dev_priv->gt_lock);
1439         forcewake_count = dev_priv->forcewake_count;
1440         spin_unlock_irq(&dev_priv->gt_lock);
1441
1442         seq_printf(m, "forcewake count = %u\n", forcewake_count);
1443
1444         return 0;
1445 }
1446
1447 static const char *swizzle_string(unsigned swizzle)
1448 {
1449         switch(swizzle) {
1450         case I915_BIT_6_SWIZZLE_NONE:
1451                 return "none";
1452         case I915_BIT_6_SWIZZLE_9:
1453                 return "bit9";
1454         case I915_BIT_6_SWIZZLE_9_10:
1455                 return "bit9/bit10";
1456         case I915_BIT_6_SWIZZLE_9_11:
1457                 return "bit9/bit11";
1458         case I915_BIT_6_SWIZZLE_9_10_11:
1459                 return "bit9/bit10/bit11";
1460         case I915_BIT_6_SWIZZLE_9_17:
1461                 return "bit9/bit17";
1462         case I915_BIT_6_SWIZZLE_9_10_17:
1463                 return "bit9/bit10/bit17";
1464         case I915_BIT_6_SWIZZLE_UNKNOWN:
1465                 return "unkown";
1466         }
1467
1468         return "bug";
1469 }
1470
1471 static int i915_swizzle_info(struct seq_file *m, void *data)
1472 {
1473         struct drm_info_node *node = (struct drm_info_node *) m->private;
1474         struct drm_device *dev = node->minor->dev;
1475         struct drm_i915_private *dev_priv = dev->dev_private;
1476
1477         mutex_lock(&dev->struct_mutex);
1478         seq_printf(m, "bit6 swizzle for X-tiling = %s\n",
1479                    swizzle_string(dev_priv->mm.bit_6_swizzle_x));
1480         seq_printf(m, "bit6 swizzle for Y-tiling = %s\n",
1481                    swizzle_string(dev_priv->mm.bit_6_swizzle_y));
1482
1483         if (IS_GEN3(dev) || IS_GEN4(dev)) {
1484                 seq_printf(m, "DDC = 0x%08x\n",
1485                            I915_READ(DCC));
1486                 seq_printf(m, "C0DRB3 = 0x%04x\n",
1487                            I915_READ16(C0DRB3));
1488                 seq_printf(m, "C1DRB3 = 0x%04x\n",
1489                            I915_READ16(C1DRB3));
1490         } else if (IS_GEN6(dev) || IS_GEN7(dev)) {
1491                 seq_printf(m, "MAD_DIMM_C0 = 0x%08x\n",
1492                            I915_READ(MAD_DIMM_C0));
1493                 seq_printf(m, "MAD_DIMM_C1 = 0x%08x\n",
1494                            I915_READ(MAD_DIMM_C1));
1495                 seq_printf(m, "MAD_DIMM_C2 = 0x%08x\n",
1496                            I915_READ(MAD_DIMM_C2));
1497                 seq_printf(m, "TILECTL = 0x%08x\n",
1498                            I915_READ(TILECTL));
1499                 seq_printf(m, "ARB_MODE = 0x%08x\n",
1500                            I915_READ(ARB_MODE));
1501                 seq_printf(m, "DISP_ARB_CTL = 0x%08x\n",
1502                            I915_READ(DISP_ARB_CTL));
1503         }
1504         mutex_unlock(&dev->struct_mutex);
1505
1506         return 0;
1507 }
1508
1509 static int i915_ppgtt_info(struct seq_file *m, void *data)
1510 {
1511         struct drm_info_node *node = (struct drm_info_node *) m->private;
1512         struct drm_device *dev = node->minor->dev;
1513         struct drm_i915_private *dev_priv = dev->dev_private;
1514         struct intel_ring_buffer *ring;
1515         int i, ret;
1516
1517
1518         ret = mutex_lock_interruptible(&dev->struct_mutex);
1519         if (ret)
1520                 return ret;
1521         if (INTEL_INFO(dev)->gen == 6)
1522                 seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(GFX_MODE));
1523
1524         for (i = 0; i < I915_NUM_RINGS; i++) {
1525                 ring = &dev_priv->ring[i];
1526
1527                 seq_printf(m, "%s\n", ring->name);
1528                 if (INTEL_INFO(dev)->gen == 7)
1529                         seq_printf(m, "GFX_MODE: 0x%08x\n", I915_READ(RING_MODE_GEN7(ring)));
1530                 seq_printf(m, "PP_DIR_BASE: 0x%08x\n", I915_READ(RING_PP_DIR_BASE(ring)));
1531                 seq_printf(m, "PP_DIR_BASE_READ: 0x%08x\n", I915_READ(RING_PP_DIR_BASE_READ(ring)));
1532                 seq_printf(m, "PP_DIR_DCLV: 0x%08x\n", I915_READ(RING_PP_DIR_DCLV(ring)));
1533         }
1534         if (dev_priv->mm.aliasing_ppgtt) {
1535                 struct i915_hw_ppgtt *ppgtt = dev_priv->mm.aliasing_ppgtt;
1536
1537                 seq_printf(m, "aliasing PPGTT:\n");
1538                 seq_printf(m, "pd gtt offset: 0x%08x\n", ppgtt->pd_offset);
1539         }
1540         seq_printf(m, "ECOCHK: 0x%08x\n", I915_READ(GAM_ECOCHK));
1541         mutex_unlock(&dev->struct_mutex);
1542
1543         return 0;
1544 }
1545
1546 static int i915_dpio_info(struct seq_file *m, void *data)
1547 {
1548         struct drm_info_node *node = (struct drm_info_node *) m->private;
1549         struct drm_device *dev = node->minor->dev;
1550         struct drm_i915_private *dev_priv = dev->dev_private;
1551         int ret;
1552
1553
1554         if (!IS_VALLEYVIEW(dev)) {
1555                 seq_printf(m, "unsupported\n");
1556                 return 0;
1557         }
1558
1559         ret = mutex_lock_interruptible(&dev->mode_config.mutex);
1560         if (ret)
1561                 return ret;
1562
1563         seq_printf(m, "DPIO_CTL: 0x%08x\n", I915_READ(DPIO_CTL));
1564
1565         seq_printf(m, "DPIO_DIV_A: 0x%08x\n",
1566                    intel_dpio_read(dev_priv, _DPIO_DIV_A));
1567         seq_printf(m, "DPIO_DIV_B: 0x%08x\n",
1568                    intel_dpio_read(dev_priv, _DPIO_DIV_B));
1569
1570         seq_printf(m, "DPIO_REFSFR_A: 0x%08x\n",
1571                    intel_dpio_read(dev_priv, _DPIO_REFSFR_A));
1572         seq_printf(m, "DPIO_REFSFR_B: 0x%08x\n",
1573                    intel_dpio_read(dev_priv, _DPIO_REFSFR_B));
1574
1575         seq_printf(m, "DPIO_CORE_CLK_A: 0x%08x\n",
1576                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_A));
1577         seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n",
1578                    intel_dpio_read(dev_priv, _DPIO_CORE_CLK_B));
1579
1580         seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n",
1581                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_A));
1582         seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n",
1583                    intel_dpio_read(dev_priv, _DPIO_LFP_COEFF_B));
1584
1585         seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n",
1586                    intel_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE));
1587
1588         mutex_unlock(&dev->mode_config.mutex);
1589
1590         return 0;
1591 }
1592
1593 static ssize_t
1594 i915_wedged_read(struct file *filp,
1595                  char __user *ubuf,
1596                  size_t max,
1597                  loff_t *ppos)
1598 {
1599         struct drm_device *dev = filp->private_data;
1600         drm_i915_private_t *dev_priv = dev->dev_private;
1601         char buf[80];
1602         int len;
1603
1604         len = snprintf(buf, sizeof(buf),
1605                        "wedged :  %d\n",
1606                        atomic_read(&dev_priv->mm.wedged));
1607
1608         if (len > sizeof(buf))
1609                 len = sizeof(buf);
1610
1611         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1612 }
1613
1614 static ssize_t
1615 i915_wedged_write(struct file *filp,
1616                   const char __user *ubuf,
1617                   size_t cnt,
1618                   loff_t *ppos)
1619 {
1620         struct drm_device *dev = filp->private_data;
1621         char buf[20];
1622         int val = 1;
1623
1624         if (cnt > 0) {
1625                 if (cnt > sizeof(buf) - 1)
1626                         return -EINVAL;
1627
1628                 if (copy_from_user(buf, ubuf, cnt))
1629                         return -EFAULT;
1630                 buf[cnt] = 0;
1631
1632                 val = simple_strtoul(buf, NULL, 0);
1633         }
1634
1635         DRM_INFO("Manually setting wedged to %d\n", val);
1636         i915_handle_error(dev, val);
1637
1638         return cnt;
1639 }
1640
1641 static const struct file_operations i915_wedged_fops = {
1642         .owner = THIS_MODULE,
1643         .open = simple_open,
1644         .read = i915_wedged_read,
1645         .write = i915_wedged_write,
1646         .llseek = default_llseek,
1647 };
1648
1649 static ssize_t
1650 i915_ring_stop_read(struct file *filp,
1651                     char __user *ubuf,
1652                     size_t max,
1653                     loff_t *ppos)
1654 {
1655         struct drm_device *dev = filp->private_data;
1656         drm_i915_private_t *dev_priv = dev->dev_private;
1657         char buf[20];
1658         int len;
1659
1660         len = snprintf(buf, sizeof(buf),
1661                        "0x%08x\n", dev_priv->stop_rings);
1662
1663         if (len > sizeof(buf))
1664                 len = sizeof(buf);
1665
1666         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1667 }
1668
1669 static ssize_t
1670 i915_ring_stop_write(struct file *filp,
1671                      const char __user *ubuf,
1672                      size_t cnt,
1673                      loff_t *ppos)
1674 {
1675         struct drm_device *dev = filp->private_data;
1676         struct drm_i915_private *dev_priv = dev->dev_private;
1677         char buf[20];
1678         int val = 0;
1679
1680         if (cnt > 0) {
1681                 if (cnt > sizeof(buf) - 1)
1682                         return -EINVAL;
1683
1684                 if (copy_from_user(buf, ubuf, cnt))
1685                         return -EFAULT;
1686                 buf[cnt] = 0;
1687
1688                 val = simple_strtoul(buf, NULL, 0);
1689         }
1690
1691         DRM_DEBUG_DRIVER("Stopping rings 0x%08x\n", val);
1692
1693         mutex_lock(&dev->struct_mutex);
1694         dev_priv->stop_rings = val;
1695         mutex_unlock(&dev->struct_mutex);
1696
1697         return cnt;
1698 }
1699
1700 static const struct file_operations i915_ring_stop_fops = {
1701         .owner = THIS_MODULE,
1702         .open = simple_open,
1703         .read = i915_ring_stop_read,
1704         .write = i915_ring_stop_write,
1705         .llseek = default_llseek,
1706 };
1707
1708 static ssize_t
1709 i915_max_freq_read(struct file *filp,
1710                    char __user *ubuf,
1711                    size_t max,
1712                    loff_t *ppos)
1713 {
1714         struct drm_device *dev = filp->private_data;
1715         drm_i915_private_t *dev_priv = dev->dev_private;
1716         char buf[80];
1717         int len;
1718
1719         len = snprintf(buf, sizeof(buf),
1720                        "max freq: %d\n", dev_priv->max_delay * 50);
1721
1722         if (len > sizeof(buf))
1723                 len = sizeof(buf);
1724
1725         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1726 }
1727
1728 static ssize_t
1729 i915_max_freq_write(struct file *filp,
1730                   const char __user *ubuf,
1731                   size_t cnt,
1732                   loff_t *ppos)
1733 {
1734         struct drm_device *dev = filp->private_data;
1735         struct drm_i915_private *dev_priv = dev->dev_private;
1736         char buf[20];
1737         int val = 1;
1738
1739         if (cnt > 0) {
1740                 if (cnt > sizeof(buf) - 1)
1741                         return -EINVAL;
1742
1743                 if (copy_from_user(buf, ubuf, cnt))
1744                         return -EFAULT;
1745                 buf[cnt] = 0;
1746
1747                 val = simple_strtoul(buf, NULL, 0);
1748         }
1749
1750         DRM_DEBUG_DRIVER("Manually setting max freq to %d\n", val);
1751
1752         /*
1753          * Turbo will still be enabled, but won't go above the set value.
1754          */
1755         dev_priv->max_delay = val / 50;
1756
1757         gen6_set_rps(dev, val / 50);
1758
1759         return cnt;
1760 }
1761
1762 static const struct file_operations i915_max_freq_fops = {
1763         .owner = THIS_MODULE,
1764         .open = simple_open,
1765         .read = i915_max_freq_read,
1766         .write = i915_max_freq_write,
1767         .llseek = default_llseek,
1768 };
1769
1770 static ssize_t
1771 i915_min_freq_read(struct file *filp, char __user *ubuf, size_t max,
1772                    loff_t *ppos)
1773 {
1774         struct drm_device *dev = filp->private_data;
1775         drm_i915_private_t *dev_priv = dev->dev_private;
1776         char buf[80];
1777         int len;
1778
1779         len = snprintf(buf, sizeof(buf),
1780                        "min freq: %d\n", dev_priv->min_delay * 50);
1781
1782         if (len > sizeof(buf))
1783                 len = sizeof(buf);
1784
1785         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1786 }
1787
1788 static ssize_t
1789 i915_min_freq_write(struct file *filp, const char __user *ubuf, size_t cnt,
1790                     loff_t *ppos)
1791 {
1792         struct drm_device *dev = filp->private_data;
1793         struct drm_i915_private *dev_priv = dev->dev_private;
1794         char buf[20];
1795         int val = 1;
1796
1797         if (cnt > 0) {
1798                 if (cnt > sizeof(buf) - 1)
1799                         return -EINVAL;
1800
1801                 if (copy_from_user(buf, ubuf, cnt))
1802                         return -EFAULT;
1803                 buf[cnt] = 0;
1804
1805                 val = simple_strtoul(buf, NULL, 0);
1806         }
1807
1808         DRM_DEBUG_DRIVER("Manually setting min freq to %d\n", val);
1809
1810         /*
1811          * Turbo will still be enabled, but won't go below the set value.
1812          */
1813         dev_priv->min_delay = val / 50;
1814
1815         gen6_set_rps(dev, val / 50);
1816
1817         return cnt;
1818 }
1819
1820 static const struct file_operations i915_min_freq_fops = {
1821         .owner = THIS_MODULE,
1822         .open = simple_open,
1823         .read = i915_min_freq_read,
1824         .write = i915_min_freq_write,
1825         .llseek = default_llseek,
1826 };
1827
1828 static ssize_t
1829 i915_cache_sharing_read(struct file *filp,
1830                    char __user *ubuf,
1831                    size_t max,
1832                    loff_t *ppos)
1833 {
1834         struct drm_device *dev = filp->private_data;
1835         drm_i915_private_t *dev_priv = dev->dev_private;
1836         char buf[80];
1837         u32 snpcr;
1838         int len;
1839
1840         mutex_lock(&dev_priv->dev->struct_mutex);
1841         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1842         mutex_unlock(&dev_priv->dev->struct_mutex);
1843
1844         len = snprintf(buf, sizeof(buf),
1845                        "%d\n", (snpcr & GEN6_MBC_SNPCR_MASK) >>
1846                        GEN6_MBC_SNPCR_SHIFT);
1847
1848         if (len > sizeof(buf))
1849                 len = sizeof(buf);
1850
1851         return simple_read_from_buffer(ubuf, max, ppos, buf, len);
1852 }
1853
1854 static ssize_t
1855 i915_cache_sharing_write(struct file *filp,
1856                   const char __user *ubuf,
1857                   size_t cnt,
1858                   loff_t *ppos)
1859 {
1860         struct drm_device *dev = filp->private_data;
1861         struct drm_i915_private *dev_priv = dev->dev_private;
1862         char buf[20];
1863         u32 snpcr;
1864         int val = 1;
1865
1866         if (cnt > 0) {
1867                 if (cnt > sizeof(buf) - 1)
1868                         return -EINVAL;
1869
1870                 if (copy_from_user(buf, ubuf, cnt))
1871                         return -EFAULT;
1872                 buf[cnt] = 0;
1873
1874                 val = simple_strtoul(buf, NULL, 0);
1875         }
1876
1877         if (val < 0 || val > 3)
1878                 return -EINVAL;
1879
1880         DRM_DEBUG_DRIVER("Manually setting uncore sharing to %d\n", val);
1881
1882         /* Update the cache sharing policy here as well */
1883         snpcr = I915_READ(GEN6_MBCUNIT_SNPCR);
1884         snpcr &= ~GEN6_MBC_SNPCR_MASK;
1885         snpcr |= (val << GEN6_MBC_SNPCR_SHIFT);
1886         I915_WRITE(GEN6_MBCUNIT_SNPCR, snpcr);
1887
1888         return cnt;
1889 }
1890
1891 static const struct file_operations i915_cache_sharing_fops = {
1892         .owner = THIS_MODULE,
1893         .open = simple_open,
1894         .read = i915_cache_sharing_read,
1895         .write = i915_cache_sharing_write,
1896         .llseek = default_llseek,
1897 };
1898
1899 /* As the drm_debugfs_init() routines are called before dev->dev_private is
1900  * allocated we need to hook into the minor for release. */
1901 static int
1902 drm_add_fake_info_node(struct drm_minor *minor,
1903                        struct dentry *ent,
1904                        const void *key)
1905 {
1906         struct drm_info_node *node;
1907
1908         node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL);
1909         if (node == NULL) {
1910                 debugfs_remove(ent);
1911                 return -ENOMEM;
1912         }
1913
1914         node->minor = minor;
1915         node->dent = ent;
1916         node->info_ent = (void *) key;
1917
1918         mutex_lock(&minor->debugfs_lock);
1919         list_add(&node->list, &minor->debugfs_list);
1920         mutex_unlock(&minor->debugfs_lock);
1921
1922         return 0;
1923 }
1924
1925 static int i915_forcewake_open(struct inode *inode, struct file *file)
1926 {
1927         struct drm_device *dev = inode->i_private;
1928         struct drm_i915_private *dev_priv = dev->dev_private;
1929         int ret;
1930
1931         if (INTEL_INFO(dev)->gen < 6)
1932                 return 0;
1933
1934         ret = mutex_lock_interruptible(&dev->struct_mutex);
1935         if (ret)
1936                 return ret;
1937         gen6_gt_force_wake_get(dev_priv);
1938         mutex_unlock(&dev->struct_mutex);
1939
1940         return 0;
1941 }
1942
1943 static int i915_forcewake_release(struct inode *inode, struct file *file)
1944 {
1945         struct drm_device *dev = inode->i_private;
1946         struct drm_i915_private *dev_priv = dev->dev_private;
1947
1948         if (INTEL_INFO(dev)->gen < 6)
1949                 return 0;
1950
1951         /*
1952          * It's bad that we can potentially hang userspace if struct_mutex gets
1953          * forever stuck.  However, if we cannot acquire this lock it means that
1954          * almost certainly the driver has hung, is not unload-able. Therefore
1955          * hanging here is probably a minor inconvenience not to be seen my
1956          * almost every user.
1957          */
1958         mutex_lock(&dev->struct_mutex);
1959         gen6_gt_force_wake_put(dev_priv);
1960         mutex_unlock(&dev->struct_mutex);
1961
1962         return 0;
1963 }
1964
1965 static const struct file_operations i915_forcewake_fops = {
1966         .owner = THIS_MODULE,
1967         .open = i915_forcewake_open,
1968         .release = i915_forcewake_release,
1969 };
1970
1971 static int i915_forcewake_create(struct dentry *root, struct drm_minor *minor)
1972 {
1973         struct drm_device *dev = minor->dev;
1974         struct dentry *ent;
1975
1976         ent = debugfs_create_file("i915_forcewake_user",
1977                                   S_IRUSR,
1978                                   root, dev,
1979                                   &i915_forcewake_fops);
1980         if (IS_ERR(ent))
1981                 return PTR_ERR(ent);
1982
1983         return drm_add_fake_info_node(minor, ent, &i915_forcewake_fops);
1984 }
1985
1986 static int i915_debugfs_create(struct dentry *root,
1987                                struct drm_minor *minor,
1988                                const char *name,
1989                                const struct file_operations *fops)
1990 {
1991         struct drm_device *dev = minor->dev;
1992         struct dentry *ent;
1993
1994         ent = debugfs_create_file(name,
1995                                   S_IRUGO | S_IWUSR,
1996                                   root, dev,
1997                                   fops);
1998         if (IS_ERR(ent))
1999                 return PTR_ERR(ent);
2000
2001         return drm_add_fake_info_node(minor, ent, fops);
2002 }
2003
2004 static struct drm_info_list i915_debugfs_list[] = {
2005         {"i915_capabilities", i915_capabilities, 0},
2006         {"i915_gem_objects", i915_gem_object_info, 0},
2007         {"i915_gem_gtt", i915_gem_gtt_info, 0},
2008         {"i915_gem_pinned", i915_gem_gtt_info, 0, (void *) PINNED_LIST},
2009         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
2010         {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
2011         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
2012         {"i915_gem_pageflip", i915_gem_pageflip_info, 0},
2013         {"i915_gem_request", i915_gem_request_info, 0},
2014         {"i915_gem_seqno", i915_gem_seqno_info, 0},
2015         {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0},
2016         {"i915_gem_interrupt", i915_interrupt_info, 0},
2017         {"i915_gem_hws", i915_hws_info, 0, (void *)RCS},
2018         {"i915_gem_hws_blt", i915_hws_info, 0, (void *)BCS},
2019         {"i915_gem_hws_bsd", i915_hws_info, 0, (void *)VCS},
2020         {"i915_rstdby_delays", i915_rstdby_delays, 0},
2021         {"i915_cur_delayinfo", i915_cur_delayinfo, 0},
2022         {"i915_delayfreq_table", i915_delayfreq_table, 0},
2023         {"i915_inttoext_table", i915_inttoext_table, 0},
2024         {"i915_drpc_info", i915_drpc_info, 0},
2025         {"i915_emon_status", i915_emon_status, 0},
2026         {"i915_ring_freq_table", i915_ring_freq_table, 0},
2027         {"i915_gfxec", i915_gfxec, 0},
2028         {"i915_fbc_status", i915_fbc_status, 0},
2029         {"i915_sr_status", i915_sr_status, 0},
2030         {"i915_opregion", i915_opregion, 0},
2031         {"i915_gem_framebuffer", i915_gem_framebuffer_info, 0},
2032         {"i915_context_status", i915_context_status, 0},
2033         {"i915_gen6_forcewake_count", i915_gen6_forcewake_count_info, 0},
2034         {"i915_swizzle_info", i915_swizzle_info, 0},
2035         {"i915_ppgtt_info", i915_ppgtt_info, 0},
2036         {"i915_dpio", i915_dpio_info, 0},
2037 };
2038 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list)
2039
2040 int i915_debugfs_init(struct drm_minor *minor)
2041 {
2042         int ret;
2043
2044         ret = i915_debugfs_create(minor->debugfs_root, minor,
2045                                   "i915_wedged",
2046                                   &i915_wedged_fops);
2047         if (ret)
2048                 return ret;
2049
2050         ret = i915_forcewake_create(minor->debugfs_root, minor);
2051         if (ret)
2052                 return ret;
2053
2054         ret = i915_debugfs_create(minor->debugfs_root, minor,
2055                                   "i915_max_freq",
2056                                   &i915_max_freq_fops);
2057         if (ret)
2058                 return ret;
2059
2060         ret = i915_debugfs_create(minor->debugfs_root, minor,
2061                                   "i915_min_freq",
2062                                   &i915_min_freq_fops);
2063         if (ret)
2064                 return ret;
2065
2066         ret = i915_debugfs_create(minor->debugfs_root, minor,
2067                                   "i915_cache_sharing",
2068                                   &i915_cache_sharing_fops);
2069         if (ret)
2070                 return ret;
2071         ret = i915_debugfs_create(minor->debugfs_root, minor,
2072                                   "i915_ring_stop",
2073                                   &i915_ring_stop_fops);
2074         if (ret)
2075                 return ret;
2076
2077         ret = i915_debugfs_create(minor->debugfs_root, minor,
2078                                   "i915_error_state",
2079                                   &i915_error_state_fops);
2080         if (ret)
2081                 return ret;
2082
2083         return drm_debugfs_create_files(i915_debugfs_list,
2084                                         I915_DEBUGFS_ENTRIES,
2085                                         minor->debugfs_root, minor);
2086 }
2087
2088 void i915_debugfs_cleanup(struct drm_minor *minor)
2089 {
2090         drm_debugfs_remove_files(i915_debugfs_list,
2091                                  I915_DEBUGFS_ENTRIES, minor);
2092         drm_debugfs_remove_files((struct drm_info_list *) &i915_forcewake_fops,
2093                                  1, minor);
2094         drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops,
2095                                  1, minor);
2096         drm_debugfs_remove_files((struct drm_info_list *) &i915_max_freq_fops,
2097                                  1, minor);
2098         drm_debugfs_remove_files((struct drm_info_list *) &i915_min_freq_fops,
2099                                  1, minor);
2100         drm_debugfs_remove_files((struct drm_info_list *) &i915_cache_sharing_fops,
2101                                  1, minor);
2102         drm_debugfs_remove_files((struct drm_info_list *) &i915_ring_stop_fops,
2103                                  1, minor);
2104         drm_debugfs_remove_files((struct drm_info_list *) &i915_error_state_fops,
2105                                  1, minor);
2106 }
2107
2108 #endif /* CONFIG_DEBUG_FS */