1 /**************************************************************************
2 * Copyright (c) 2007-2011, Intel Corporation.
4 * Copyright (c) 2008, Tungsten Graphics, Inc. Cedar Park, TX., USA.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms and conditions of the GNU General Public License,
9 * version 2, as published by the Free Software Foundation.
11 * This program is distributed in the hope it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 * You should have received a copy of the GNU General Public License along with
17 * this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20 **************************************************************************/
26 #include "framebuffer.h"
28 #include "psb_intel_reg.h"
29 #include "intel_bios.h"
31 #include <drm/drm_pciids.h>
33 #include <linux/cpu.h>
34 #include <linux/notifier.h>
35 #include <linux/spinlock.h>
36 #include <linux/pm_runtime.h>
37 #include <acpi/video.h>
38 #include <linux/module.h>
40 static int drm_psb_trap_pagefaults;
42 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
44 MODULE_PARM_DESC(trap_pagefaults, "Error and reset on MMU pagefaults");
45 module_param_named(trap_pagefaults, drm_psb_trap_pagefaults, int, 0600);
48 static DEFINE_PCI_DEVICE_TABLE(pciidlist) = {
49 { 0x8086, 0x8108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
50 { 0x8086, 0x8109, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &psb_chip_ops },
51 #if defined(CONFIG_DRM_GMA600)
52 { 0x8086, 0x4100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
53 { 0x8086, 0x4101, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
54 { 0x8086, 0x4102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
55 { 0x8086, 0x4103, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
56 { 0x8086, 0x4104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
57 { 0x8086, 0x4105, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
58 { 0x8086, 0x4106, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
59 { 0x8086, 0x4107, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
61 { 0x8086, 0x4108, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &oaktrail_chip_ops},
63 #if defined(CONFIG_DRM_MEDFIELD)
64 {0x8086, 0x0130, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
65 {0x8086, 0x0131, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
66 {0x8086, 0x0132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
67 {0x8086, 0x0133, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
68 {0x8086, 0x0134, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
69 {0x8086, 0x0135, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
70 {0x8086, 0x0136, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
71 {0x8086, 0x0137, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &mdfld_chip_ops},
73 #if defined(CONFIG_DRM_GMA3600)
74 { 0x8086, 0x0be0, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
75 { 0x8086, 0x0be1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
76 { 0x8086, 0x0be2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
77 { 0x8086, 0x0be3, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
78 { 0x8086, 0x0be4, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
79 { 0x8086, 0x0be5, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
80 { 0x8086, 0x0be6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
81 { 0x8086, 0x0be7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, (long) &cdv_chip_ops},
85 MODULE_DEVICE_TABLE(pci, pciidlist);
91 #define DRM_IOCTL_GMA_ADB \
92 DRM_IOWR(DRM_GMA_ADB + DRM_COMMAND_BASE, uint32_t)
93 #define DRM_IOCTL_GMA_MODE_OPERATION \
94 DRM_IOWR(DRM_GMA_MODE_OPERATION + DRM_COMMAND_BASE, \
95 struct drm_psb_mode_operation_arg)
96 #define DRM_IOCTL_GMA_STOLEN_MEMORY \
97 DRM_IOWR(DRM_GMA_STOLEN_MEMORY + DRM_COMMAND_BASE, \
98 struct drm_psb_stolen_memory_arg)
99 #define DRM_IOCTL_GMA_GAMMA \
100 DRM_IOWR(DRM_GMA_GAMMA + DRM_COMMAND_BASE, \
101 struct drm_psb_dpst_lut_arg)
102 #define DRM_IOCTL_GMA_DPST_BL \
103 DRM_IOWR(DRM_GMA_DPST_BL + DRM_COMMAND_BASE, \
105 #define DRM_IOCTL_GMA_GET_PIPE_FROM_CRTC_ID \
106 DRM_IOWR(DRM_GMA_GET_PIPE_FROM_CRTC_ID + DRM_COMMAND_BASE, \
107 struct drm_psb_get_pipe_from_crtc_id_arg)
108 #define DRM_IOCTL_GMA_GEM_CREATE \
109 DRM_IOWR(DRM_GMA_GEM_CREATE + DRM_COMMAND_BASE, \
110 struct drm_psb_gem_create)
111 #define DRM_IOCTL_GMA_GEM_MMAP \
112 DRM_IOWR(DRM_GMA_GEM_MMAP + DRM_COMMAND_BASE, \
113 struct drm_psb_gem_mmap)
115 static int psb_adb_ioctl(struct drm_device *dev, void *data,
116 struct drm_file *file_priv);
117 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
118 struct drm_file *file_priv);
119 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
120 struct drm_file *file_priv);
121 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
122 struct drm_file *file_priv);
123 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
124 struct drm_file *file_priv);
126 static struct drm_ioctl_desc psb_ioctls[] = {
127 DRM_IOCTL_DEF_DRV(GMA_ADB, psb_adb_ioctl, DRM_AUTH),
128 DRM_IOCTL_DEF_DRV(GMA_MODE_OPERATION, psb_mode_operation_ioctl,
130 DRM_IOCTL_DEF_DRV(GMA_STOLEN_MEMORY, psb_stolen_memory_ioctl,
132 DRM_IOCTL_DEF_DRV(GMA_GAMMA, psb_gamma_ioctl, DRM_AUTH),
133 DRM_IOCTL_DEF_DRV(GMA_DPST_BL, psb_dpst_bl_ioctl, DRM_AUTH),
134 DRM_IOCTL_DEF_DRV(GMA_GET_PIPE_FROM_CRTC_ID,
135 psb_intel_get_pipe_from_crtc_id, 0),
136 DRM_IOCTL_DEF_DRV(GMA_GEM_CREATE, psb_gem_create_ioctl,
137 DRM_UNLOCKED | DRM_AUTH),
138 DRM_IOCTL_DEF_DRV(GMA_GEM_MMAP, psb_gem_mmap_ioctl,
139 DRM_UNLOCKED | DRM_AUTH),
142 static void psb_lastclose(struct drm_device *dev)
147 static void psb_do_takedown(struct drm_device *dev)
151 static int psb_do_init(struct drm_device *dev)
153 struct drm_psb_private *dev_priv = dev->dev_private;
154 struct psb_gtt *pg = &dev_priv->gtt;
160 if (pg->mmu_gatt_start & 0x0FFFFFFF) {
161 dev_err(dev->dev, "Gatt must be 256M aligned. This is a bug.\n");
167 stolen_gtt = (pg->stolen_size >> PAGE_SHIFT) * 4;
168 stolen_gtt = (stolen_gtt + PAGE_SIZE - 1) >> PAGE_SHIFT;
170 (stolen_gtt < pg->gtt_pages) ? stolen_gtt : pg->gtt_pages;
172 dev_priv->gatt_free_offset = pg->mmu_gatt_start +
173 (stolen_gtt << PAGE_SHIFT) * 1024;
175 if (1 || drm_debug) {
176 uint32_t core_id = PSB_RSGX32(PSB_CR_CORE_ID);
177 uint32_t core_rev = PSB_RSGX32(PSB_CR_CORE_REVISION);
178 DRM_INFO("SGX core id = 0x%08x\n", core_id);
179 DRM_INFO("SGX core rev major = 0x%02x, minor = 0x%02x\n",
180 (core_rev & _PSB_CC_REVISION_MAJOR_MASK) >>
181 _PSB_CC_REVISION_MAJOR_SHIFT,
182 (core_rev & _PSB_CC_REVISION_MINOR_MASK) >>
183 _PSB_CC_REVISION_MINOR_SHIFT);
185 ("SGX core rev maintenance = 0x%02x, designer = 0x%02x\n",
186 (core_rev & _PSB_CC_REVISION_MAINTENANCE_MASK) >>
187 _PSB_CC_REVISION_MAINTENANCE_SHIFT,
188 (core_rev & _PSB_CC_REVISION_DESIGNER_MASK) >>
189 _PSB_CC_REVISION_DESIGNER_SHIFT);
193 spin_lock_init(&dev_priv->irqmask_lock);
194 spin_lock_init(&dev_priv->lock_2d);
196 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK0);
197 PSB_WSGX32(0x00000000, PSB_CR_BIF_BANK1);
198 PSB_RSGX32(PSB_CR_BIF_BANK1);
199 PSB_WSGX32(PSB_RSGX32(PSB_CR_BIF_CTRL) | _PSB_MMU_ER_MASK,
204 PSB_WSGX32(pg->gatt_start, PSB_CR_BIF_TWOD_REQ_BASE);
207 psb_do_takedown(dev);
211 static int psb_driver_unload(struct drm_device *dev)
213 struct drm_psb_private *dev_priv = dev->dev_private;
215 /* Kill vblank etc here */
217 gma_backlight_exit(dev);
218 psb_modeset_cleanup(dev);
221 psb_intel_opregion_fini(dev);
222 psb_lid_timer_takedown(dev_priv);
224 if (dev_priv->ops->chip_teardown)
225 dev_priv->ops->chip_teardown(dev);
226 psb_do_takedown(dev);
229 if (dev_priv->pf_pd) {
230 psb_mmu_free_pagedir(dev_priv->pf_pd);
231 dev_priv->pf_pd = NULL;
234 struct psb_gtt *pg = &dev_priv->gtt;
237 psb_mmu_remove_pfn_sequence(
238 psb_mmu_get_default_pd
241 dev_priv->vram_stolen_size >> PAGE_SHIFT);
243 psb_mmu_driver_takedown(dev_priv->mmu);
244 dev_priv->mmu = NULL;
246 psb_gtt_takedown(dev);
247 if (dev_priv->scratch_page) {
248 set_pages_wb(dev_priv->scratch_page, 1);
249 __free_page(dev_priv->scratch_page);
250 dev_priv->scratch_page = NULL;
252 if (dev_priv->vdc_reg) {
253 iounmap(dev_priv->vdc_reg);
254 dev_priv->vdc_reg = NULL;
256 if (dev_priv->sgx_reg) {
257 iounmap(dev_priv->sgx_reg);
258 dev_priv->sgx_reg = NULL;
262 dev->dev_private = NULL;
265 psb_intel_destroy_bios(dev);
268 gma_power_uninit(dev);
274 static int psb_driver_load(struct drm_device *dev, unsigned long chipset)
276 struct drm_psb_private *dev_priv;
277 unsigned long resource_start;
278 unsigned long irqflags;
280 struct drm_connector *connector;
281 struct psb_intel_encoder *psb_intel_encoder;
283 dev_priv = kzalloc(sizeof(*dev_priv), GFP_KERNEL);
284 if (dev_priv == NULL)
287 dev_priv->ops = (struct psb_ops *)chipset;
289 dev->dev_private = (void *) dev_priv;
291 pci_set_master(dev->pdev);
294 if (pci_enable_msi(dev->pdev))
295 dev_warn(dev->dev, "Enabling MSI failed!\n");
298 dev_priv->num_pipe = dev_priv->ops->pipes;
300 resource_start = pci_resource_start(dev->pdev, PSB_MMIO_RESOURCE);
303 ioremap(resource_start + PSB_VDC_OFFSET, PSB_VDC_SIZE);
304 if (!dev_priv->vdc_reg)
307 dev_priv->sgx_reg = ioremap(resource_start + dev_priv->ops->sgx_offset,
309 if (!dev_priv->sgx_reg)
312 psb_intel_opregion_setup(dev);
314 ret = dev_priv->ops->chip_setup(dev);
318 /* Init OSPM support */
323 dev_priv->scratch_page = alloc_page(GFP_DMA32 | __GFP_ZERO);
324 if (!dev_priv->scratch_page)
327 set_pages_uc(dev_priv->scratch_page, 1);
329 ret = psb_gtt_init(dev, 0);
333 dev_priv->mmu = psb_mmu_driver_init((void *)0,
334 drm_psb_trap_pagefaults, 0,
339 dev_priv->pf_pd = psb_mmu_alloc_pd(dev_priv->mmu, 1, 0);
340 if (!dev_priv->pf_pd)
343 psb_mmu_set_pd_context(psb_mmu_get_default_pd(dev_priv->mmu), 0);
344 psb_mmu_set_pd_context(dev_priv->pf_pd, 1);
346 ret = psb_do_init(dev);
350 PSB_WSGX32(0x20000000, PSB_CR_PDS_EXEC_BASE);
351 PSB_WSGX32(0x30000000, PSB_CR_BIF_3D_REQ_BASE);
353 acpi_video_register();
354 if (dev_priv->opregion.lid_state)
355 psb_lid_timer_init(dev_priv);
357 ret = drm_vblank_init(dev, dev_priv->num_pipe);
362 * Install interrupt handlers prior to powering off SGX or else we will
365 dev_priv->vdc_irq_mask = 0;
366 dev_priv->pipestat[0] = 0;
367 dev_priv->pipestat[1] = 0;
368 dev_priv->pipestat[2] = 0;
369 spin_lock_irqsave(&dev_priv->irqmask_lock, irqflags);
370 PSB_WVDC32(0xFFFFFFFF, PSB_HWSTAM);
371 PSB_WVDC32(0x00000000, PSB_INT_ENABLE_R);
372 PSB_WVDC32(0xFFFFFFFF, PSB_INT_MASK_R);
373 spin_unlock_irqrestore(&dev_priv->irqmask_lock, irqflags);
374 if (IS_PSB(dev) && drm_core_check_feature(dev, DRIVER_MODESET))
375 drm_irq_install(dev);
377 dev->vblank_disable_allowed = 1;
379 dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
381 dev->driver->get_vblank_counter = psb_get_vblank_counter;
383 psb_modeset_init(dev);
385 drm_kms_helper_poll_init(dev);
387 /* Only add backlight support if we have LVDS output */
388 list_for_each_entry(connector, &dev->mode_config.connector_list,
390 psb_intel_encoder = psb_intel_attached_encoder(connector);
392 switch (psb_intel_encoder->type) {
393 case INTEL_OUTPUT_LVDS:
394 case INTEL_OUTPUT_MIPI:
395 ret = gma_backlight_init(dev);
403 /*enable runtime pm at last*/
404 pm_runtime_enable(&dev->pdev->dev);
405 pm_runtime_set_active(&dev->pdev->dev);
407 /*Intel drm driver load is done, continue doing pvr load*/
410 psb_driver_unload(dev);
414 static int psb_driver_device_is_agp(struct drm_device *dev)
419 static inline void get_brightness(struct backlight_device *bd)
421 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
423 bd->props.brightness = bd->ops->get_brightness(bd);
424 backlight_update_status(bd);
429 static int psb_dpst_bl_ioctl(struct drm_device *dev, void *data,
430 struct drm_file *file_priv)
432 struct drm_psb_private *dev_priv = psb_priv(dev);
433 uint32_t *arg = data;
435 dev_priv->blc_adj2 = *arg;
436 get_brightness(dev_priv->backlight_device);
440 static int psb_adb_ioctl(struct drm_device *dev, void *data,
441 struct drm_file *file_priv)
443 struct drm_psb_private *dev_priv = psb_priv(dev);
444 uint32_t *arg = data;
446 dev_priv->blc_adj1 = *arg;
447 get_brightness(dev_priv->backlight_device);
451 static int psb_gamma_ioctl(struct drm_device *dev, void *data,
452 struct drm_file *file_priv)
454 struct drm_psb_dpst_lut_arg *lut_arg = data;
455 struct drm_mode_object *obj;
456 struct drm_crtc *crtc;
457 struct drm_connector *connector;
458 struct psb_intel_crtc *psb_intel_crtc;
462 obj_id = lut_arg->output_id;
463 obj = drm_mode_object_find(dev, obj_id, DRM_MODE_OBJECT_CONNECTOR);
465 dev_dbg(dev->dev, "Invalid Connector object.\n");
469 connector = obj_to_connector(obj);
470 crtc = connector->encoder->crtc;
471 psb_intel_crtc = to_psb_intel_crtc(crtc);
473 for (i = 0; i < 256; i++)
474 psb_intel_crtc->lut_adj[i] = lut_arg->lut[i];
476 psb_intel_crtc_load_lut(crtc);
481 static int psb_mode_operation_ioctl(struct drm_device *dev, void *data,
482 struct drm_file *file_priv)
486 struct drm_mode_modeinfo *umode;
487 struct drm_display_mode *mode = NULL;
488 struct drm_psb_mode_operation_arg *arg;
489 struct drm_mode_object *obj;
490 struct drm_connector *connector;
491 struct drm_connector_helper_funcs *connector_funcs;
495 arg = (struct drm_psb_mode_operation_arg *)data;
496 obj_id = arg->obj_id;
500 case PSB_MODE_OPERATION_MODE_VALID:
503 mutex_lock(&dev->mode_config.mutex);
505 obj = drm_mode_object_find(dev, obj_id,
506 DRM_MODE_OBJECT_CONNECTOR);
512 connector = obj_to_connector(obj);
514 mode = drm_mode_create(dev);
520 /* drm_crtc_convert_umode(mode, umode); */
522 mode->clock = umode->clock;
523 mode->hdisplay = umode->hdisplay;
524 mode->hsync_start = umode->hsync_start;
525 mode->hsync_end = umode->hsync_end;
526 mode->htotal = umode->htotal;
527 mode->hskew = umode->hskew;
528 mode->vdisplay = umode->vdisplay;
529 mode->vsync_start = umode->vsync_start;
530 mode->vsync_end = umode->vsync_end;
531 mode->vtotal = umode->vtotal;
532 mode->vscan = umode->vscan;
533 mode->vrefresh = umode->vrefresh;
534 mode->flags = umode->flags;
535 mode->type = umode->type;
536 strncpy(mode->name, umode->name, DRM_DISPLAY_MODE_LEN);
537 mode->name[DRM_DISPLAY_MODE_LEN-1] = 0;
540 connector_funcs = (struct drm_connector_helper_funcs *)
541 connector->helper_private;
543 if (connector_funcs->mode_valid) {
544 resp = connector_funcs->mode_valid(connector, mode);
548 /*do some clean up work*/
550 drm_mode_destroy(dev, mode);
552 mutex_unlock(&dev->mode_config.mutex);
556 dev_dbg(dev->dev, "Unsupported psb mode operation\n");
563 static int psb_stolen_memory_ioctl(struct drm_device *dev, void *data,
564 struct drm_file *file_priv)
566 struct drm_psb_private *dev_priv = psb_priv(dev);
567 struct drm_psb_stolen_memory_arg *arg = data;
569 arg->base = dev_priv->stolen_base;
570 arg->size = dev_priv->vram_stolen_size;
575 static int psb_driver_open(struct drm_device *dev, struct drm_file *priv)
580 static void psb_driver_close(struct drm_device *dev, struct drm_file *priv)
584 static long psb_unlocked_ioctl(struct file *filp, unsigned int cmd,
587 struct drm_file *file_priv = filp->private_data;
588 struct drm_device *dev = file_priv->minor->dev;
589 struct drm_psb_private *dev_priv = dev->dev_private;
590 static unsigned int runtime_allowed;
592 if (runtime_allowed == 1 && dev_priv->is_lvds_on) {
594 pm_runtime_allow(&dev->pdev->dev);
595 dev_priv->rpm_enabled = 1;
597 return drm_ioctl(filp, cmd, arg);
598 /* FIXME: do we need to wrap the other side of this */
602 /* When a client dies:
603 * - Check for and clean up flipped page state
605 static void psb_driver_preclose(struct drm_device *dev, struct drm_file *priv)
609 static void psb_remove(struct pci_dev *pdev)
611 struct drm_device *dev = pci_get_drvdata(pdev);
615 static const struct dev_pm_ops psb_pm_ops = {
616 .resume = gma_power_resume,
617 .suspend = gma_power_suspend,
618 .runtime_suspend = psb_runtime_suspend,
619 .runtime_resume = psb_runtime_resume,
620 .runtime_idle = psb_runtime_idle,
623 static struct vm_operations_struct psb_gem_vm_ops = {
624 .fault = psb_gem_fault,
625 .open = drm_gem_vm_open,
626 .close = drm_gem_vm_close,
629 static const struct file_operations psb_gem_fops = {
630 .owner = THIS_MODULE,
632 .release = drm_release,
633 .unlocked_ioctl = psb_unlocked_ioctl,
634 .mmap = drm_gem_mmap,
636 .fasync = drm_fasync,
640 static struct drm_driver driver = {
641 .driver_features = DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | \
642 DRIVER_IRQ_VBL | DRIVER_MODESET | DRIVER_GEM ,
643 .load = psb_driver_load,
644 .unload = psb_driver_unload,
646 .ioctls = psb_ioctls,
647 .num_ioctls = DRM_ARRAY_SIZE(psb_ioctls),
648 .device_is_agp = psb_driver_device_is_agp,
649 .irq_preinstall = psb_irq_preinstall,
650 .irq_postinstall = psb_irq_postinstall,
651 .irq_uninstall = psb_irq_uninstall,
652 .irq_handler = psb_irq_handler,
653 .enable_vblank = psb_enable_vblank,
654 .disable_vblank = psb_disable_vblank,
655 .get_vblank_counter = psb_get_vblank_counter,
656 .lastclose = psb_lastclose,
657 .open = psb_driver_open,
658 .preclose = psb_driver_preclose,
659 .postclose = psb_driver_close,
660 .reclaim_buffers = drm_core_reclaim_buffers,
662 .gem_init_object = psb_gem_init_object,
663 .gem_free_object = psb_gem_free_object,
664 .gem_vm_ops = &psb_gem_vm_ops,
665 .dumb_create = psb_gem_dumb_create,
666 .dumb_map_offset = psb_gem_dumb_map_gtt,
667 .dumb_destroy = psb_gem_dumb_destroy,
668 .fops = &psb_gem_fops,
671 .date = PSB_DRM_DRIVER_DATE,
672 .major = PSB_DRM_DRIVER_MAJOR,
673 .minor = PSB_DRM_DRIVER_MINOR,
674 .patchlevel = PSB_DRM_DRIVER_PATCHLEVEL
677 static struct pci_driver psb_pci_driver = {
679 .id_table = pciidlist,
681 .remove = psb_remove,
687 static int psb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
689 return drm_get_pci_dev(pdev, ent, &driver);
692 static int __init psb_init(void)
694 return drm_pci_init(&driver, &psb_pci_driver);
697 static void __exit psb_exit(void)
699 drm_pci_exit(&driver, &psb_pci_driver);
702 late_initcall(psb_init);
703 module_exit(psb_exit);
705 MODULE_AUTHOR("Alan Cox <alan@linux.intel.com> and others");
706 MODULE_DESCRIPTION(DRIVER_DESC);
707 MODULE_LICENSE("GPL");