drivers/cpufreq/s3c64xx-cpufreq.c

   1 /*
   2  * Copyright 2009 Wolfson Microelectronics plc
   3  *
   4  * S3C64xx CPUfreq Support
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/types.h>
  13 #include <linux/init.h>
  14 #include <linux/cpufreq.h>
  15 #include <linux/clk.h>
  16 #include <linux/err.h>
  17 #include <linux/regulator/consumer.h>
  18
  19 static struct clk *armclk;
  20 static struct regulator *vddarm;
  21 static unsigned long regulator_latency;
  22
  23 #ifdef CONFIG_CPU_S3C6410
  24 struct s3c64xx_dvfs {
  25         unsigned int vddarm_min;
  26         unsigned int vddarm_max;
  27 };
  28
  29 static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
  30         [0] = { 1000000, 1150000 },
  31         [1] = { 1050000, 1150000 },
  32         [2] = { 1100000, 1150000 },
  33         [3] = { 1200000, 1350000 },
  34         [4] = { 1300000, 1350000 },
  35 };
  36
  37 static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
  38         { 0,  66000 },
  39         { 0, 133000 },
  40         { 1, 222000 },
  41         { 1, 266000 },
  42         { 2, 333000 },
  43         { 2, 400000 },
  44         { 2, 532000 },
  45         { 2, 533000 },
  46         { 3, 667000 },
  47         { 4, 800000 },
  48         { 0, CPUFREQ_TABLE_END },
  49 };
  50 #endif
  51
  52 static int s3c64xx_cpufreq_verify_speed(struct cpufreq_policy *policy)
  53 {
  54         if (policy->cpu != 0)
  55                 return -EINVAL;
  56
  57         return cpufreq_frequency_table_verify(policy, s3c64xx_freq_table);
  58 }
  59
  60 static unsigned int s3c64xx_cpufreq_get_speed(unsigned int cpu)
  61 {
  62         if (cpu != 0)
  63                 return 0;
  64
  65         return clk_get_rate(armclk) / 1000;
  66 }
  67
  68 static int s3c64xx_cpufreq_set_target(struct cpufreq_policy *policy,
  69                                       unsigned int target_freq,
  70                                       unsigned int relation)
  71 {
  72         int ret;
  73         unsigned int i;
  74         struct cpufreq_freqs freqs;
  75         struct s3c64xx_dvfs *dvfs;
  76
  77         ret = cpufreq_frequency_table_target(policy, s3c64xx_freq_table,
  78                                              target_freq, relation, &i);
  79         if (ret != 0)
  80                 return ret;
  81
  82         freqs.cpu = 0;
  83         freqs.old = clk_get_rate(armclk) / 1000;
  84         freqs.new = s3c64xx_freq_table[i].frequency;
  85         freqs.flags = 0;
  86         dvfs = &s3c64xx_dvfs_table[s3c64xx_freq_table[i].index];
  87
  88         if (freqs.old == freqs.new)
  89                 return 0;
  90
  91         pr_debug("cpufreq: Transition %d-%dkHz\n", freqs.old, freqs.new);
  92
  93         cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  94
  95 #ifdef CONFIG_REGULATOR
  96         if (vddarm && freqs.new > freqs.old) {
  97                 ret = regulator_set_voltage(vddarm,
  98                                             dvfs->vddarm_min,
  99                                             dvfs->vddarm_max);
 100                 if (ret != 0) {
 101                         pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n",
 102                                freqs.new, ret);
 103                         goto err;
 104                 }
 105         }
 106 #endif
 107
 108         ret = clk_set_rate(armclk, freqs.new * 1000);
 109         if (ret < 0) {
 110                 pr_err("cpufreq: Failed to set rate %dkHz: %d\n",
 111                        freqs.new, ret);
 112                 goto err;
 113         }
 114
 115         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 116
 117 #ifdef CONFIG_REGULATOR
 118         if (vddarm && freqs.new < freqs.old) {
 119                 ret = regulator_set_voltage(vddarm,
 120                                             dvfs->vddarm_min,
 121                                             dvfs->vddarm_max);
 122                 if (ret != 0) {
 123                         pr_err("cpufreq: Failed to set VDDARM for %dkHz: %d\n",
 124                                freqs.new, ret);
 125                         goto err_clk;
 126                 }
 127         }
 128 #endif
 129
 130         pr_debug("cpufreq: Set actual frequency %lukHz\n",
 131                  clk_get_rate(armclk) / 1000);
 132
 133         return 0;
 134
 135 err_clk:
 136         if (clk_set_rate(armclk, freqs.old * 1000) < 0)
 137                 pr_err("Failed to restore original clock rate\n");
 138 err:
 139         cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
 140
 141         return ret;
 142 }
 143
 144 #ifdef CONFIG_REGULATOR
 145 static void __init s3c64xx_cpufreq_config_regulator(void)
 146 {
 147         int count, v, i, found;
 148         struct cpufreq_frequency_table *freq;
 149         struct s3c64xx_dvfs *dvfs;
 150
 151         count = regulator_count_voltages(vddarm);
 152         if (count < 0) {
 153                 pr_err("cpufreq: Unable to check supported voltages\n");
 154         }
 155
 156         freq = s3c64xx_freq_table;
 157         while (count > 0 && freq->frequency != CPUFREQ_TABLE_END) {
 158                 if (freq->frequency == CPUFREQ_ENTRY_INVALID)
 159                         continue;
 160
 161                 dvfs = &s3c64xx_dvfs_table[freq->index];
 162                 found = 0;
 163
 164                 for (i = 0; i < count; i++) {
 165                         v = regulator_list_voltage(vddarm, i);
 166                         if (v >= dvfs->vddarm_min && v <= dvfs->vddarm_max)
 167                                 found = 1;
 168                 }
 169
 170                 if (!found) {
 171                         pr_debug("cpufreq: %dkHz unsupported by regulator\n",
 172                                  freq->frequency);
 173                         freq->frequency = CPUFREQ_ENTRY_INVALID;
 174                 }
 175
 176                 freq++;
 177         }
 178
 179         /* Guess based on having to do an I2C/SPI write; in future we
 180          * will be able to query the regulator performance here. */
 181         regulator_latency = 1 * 1000 * 1000;
 182 }
 183 #endif
 184
 185 static int s3c64xx_cpufreq_driver_init(struct cpufreq_policy *policy)
 186 {
 187         int ret;
 188         struct cpufreq_frequency_table *freq;
 189
 190         if (policy->cpu != 0)
 191                 return -EINVAL;
 192
 193         if (s3c64xx_freq_table == NULL) {
 194                 pr_err("cpufreq: No frequency information for this CPU\n");
 195                 return -ENODEV;
 196         }
 197
 198         armclk = clk_get(NULL, "armclk");
 199         if (IS_ERR(armclk)) {
 200                 pr_err("cpufreq: Unable to obtain ARMCLK: %ld\n",
 201                        PTR_ERR(armclk));
 202                 return PTR_ERR(armclk);
 203         }
 204
 205 #ifdef CONFIG_REGULATOR
 206         vddarm = regulator_get(NULL, "vddarm");
 207         if (IS_ERR(vddarm)) {
 208                 ret = PTR_ERR(vddarm);
 209                 pr_err("cpufreq: Failed to obtain VDDARM: %d\n", ret);
 210                 pr_err("cpufreq: Only frequency scaling available\n");
 211                 vddarm = NULL;
 212         } else {
 213                 s3c64xx_cpufreq_config_regulator();
 214         }
 215 #endif
 216
 217         freq = s3c64xx_freq_table;
 218         while (freq->frequency != CPUFREQ_TABLE_END) {
 219                 unsigned long r;
 220
 221                 /* Check for frequencies we can generate */
 222                 r = clk_round_rate(armclk, freq->frequency * 1000);
 223                 r /= 1000;
 224                 if (r != freq->frequency) {
 225                         pr_debug("cpufreq: %dkHz unsupported by clock\n",
 226                                  freq->frequency);
 227                         freq->frequency = CPUFREQ_ENTRY_INVALID;
 228                 }
 229
 230                 /* If we have no regulator then assume startup
 231                  * frequency is the maximum we can support. */
 232                 if (!vddarm && freq->frequency > s3c64xx_cpufreq_get_speed(0))
 233                         freq->frequency = CPUFREQ_ENTRY_INVALID;
 234
 235                 freq++;
 236         }
 237
 238         policy->cur = clk_get_rate(armclk) / 1000;
 239
 240         /* Datasheet says PLL stabalisation time (if we were to use
 241          * the PLLs, which we don't currently) is ~300us worst case,
 242          * but add some fudge.
 243          */
 244         policy->cpuinfo.transition_latency = (500 * 1000) + regulator_latency;
 245
 246         ret = cpufreq_frequency_table_cpuinfo(policy, s3c64xx_freq_table);
 247         if (ret != 0) {
 248                 pr_err("cpufreq: Failed to configure frequency table: %d\n",
 249                        ret);
 250                 regulator_put(vddarm);
 251                 clk_put(armclk);
 252         }
 253
 254         return ret;
 255 }
 256
 257 static struct cpufreq_driver s3c64xx_cpufreq_driver = {
 258         .owner          = THIS_MODULE,
 259         .flags          = 0,
 260         .verify         = s3c64xx_cpufreq_verify_speed,
 261         .target         = s3c64xx_cpufreq_set_target,
 262         .get            = s3c64xx_cpufreq_get_speed,
 263         .init           = s3c64xx_cpufreq_driver_init,
 264         .name           = "s3c",
 265 };
 266
 267 static int __init s3c64xx_cpufreq_init(void)
 268 {
 269         return cpufreq_register_driver(&s3c64xx_cpufreq_driver);
 270 }
 271 module_init(s3c64xx_cpufreq_init);