board/toradex/colibri_pxa270/colibri_pxa270.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Toradex Colibri PXA270 Support
   4  *
   5  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
   6  * Copyright (C) 2016 Marcel Ziswiler <marcel.ziswiler@toradex.com>
   7  */
   8
   9 #include <common.h>
  10 #include <cpu_func.h>
  11 #include <dm.h>
  12 #include <net.h>
  13 #include <asm/arch/hardware.h>
  14 #include <asm/arch/pxa.h>
  15 #include <asm/arch/regs-mmc.h>
  16 #include <asm/arch/regs-uart.h>
  17 #include <asm/io.h>
  18 #include <dm/platdata.h>
  19 #include <dm/platform_data/serial_pxa.h>
  20 #include <netdev.h>
  21 #include <serial.h>
  22 #include <usb.h>
  23 #include <asm/mach-types.h>
  24 #include "../common/tdx-common.h"
  25
  26 DECLARE_GLOBAL_DATA_PTR;
  27
  28 int board_init(void)
  29 {
  30         /* We have RAM, disable cache */
  31         dcache_disable();
  32         icache_disable();
  33
  34         /* arch number of Toradex Colibri PXA270 */
  35         gd->bd->bi_arch_number = MACH_TYPE_COLIBRI;
  36
  37         /* adress of boot parameters */
  38         gd->bd->bi_boot_params = 0xa0000100;
  39
  40         return 0;
  41 }
  42
  43 int checkboard(void)
  44 {
  45         puts("Model: Toradex Colibri PXA270\n");
  46
  47         return 0;
  48 }
  49
  50 #if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
  51 int ft_board_setup(void *blob, bd_t *bd)
  52 {
  53         return ft_common_board_setup(blob, bd);
  54 }
  55 #endif
  56
  57 int dram_init(void)
  58 {
  59         pxa2xx_dram_init();
  60         gd->ram_size = PHYS_SDRAM_1_SIZE;
  61         return 0;
  62 }
  63
  64 #ifdef  CONFIG_CMD_USB
  65 int board_usb_init(int index, enum usb_init_type init)
  66 {
  67         writel((readl(UHCHR) | UHCHR_PCPL | UHCHR_PSPL) &
  68                 ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE),
  69                 UHCHR);
  70
  71         writel(readl(UHCHR) | UHCHR_FSBIR, UHCHR);
  72
  73         while (UHCHR & UHCHR_FSBIR)
  74                 ;
  75
  76         writel(readl(UHCHR) & ~UHCHR_SSE, UHCHR);
  77         writel((UHCHIE_UPRIE | UHCHIE_RWIE), UHCHIE);
  78
  79         /* Clear any OTG Pin Hold */
  80         if (readl(PSSR) & PSSR_OTGPH)
  81                 writel(readl(PSSR) | PSSR_OTGPH, PSSR);
  82
  83         writel(readl(UHCRHDA) & ~(0x200), UHCRHDA);
  84         writel(readl(UHCRHDA) | 0x100, UHCRHDA);
  85
  86         /* Set port power control mask bits, only 3 ports. */
  87         writel(readl(UHCRHDB) | (0x7<<17), UHCRHDB);
  88
  89         /* enable port 2 */
  90         writel(readl(UP2OCR) | UP2OCR_HXOE | UP2OCR_HXS |
  91                 UP2OCR_DMPDE | UP2OCR_DPPDE, UP2OCR);
  92
  93         return 0;
  94 }
  95
  96 int board_usb_cleanup(int index, enum usb_init_type init)
  97 {
  98         return 0;
  99 }
 100
 101 void usb_board_stop(void)
 102 {
 103         writel(readl(UHCHR) | UHCHR_FHR, UHCHR);
 104         udelay(11);
 105         writel(readl(UHCHR) & ~UHCHR_FHR, UHCHR);
 106
 107         writel(readl(UHCCOMS) | 1, UHCCOMS);
 108         udelay(10);
 109
 110         writel(readl(CKEN) & ~CKEN10_USBHOST, CKEN);
 111
 112         return;
 113 }
 114 #endif
 115
 116 #ifdef CONFIG_DRIVER_DM9000
 117 int board_eth_init(bd_t *bis)
 118 {
 119         return dm9000_initialize(bis);
 120 }
 121 #endif
 122
 123 #ifdef  CONFIG_CMD_MMC
 124 int board_mmc_init(bd_t *bis)
 125 {
 126         pxa_mmc_register(0);
 127         return 0;
 128 }
 129 #endif
 130
 131 static const struct pxa_serial_platdata serial_platdata = {
 132         .base = (struct pxa_uart_regs *)FFUART_BASE,
 133         .port = FFUART_INDEX,
 134         .baudrate = CONFIG_BAUDRATE,
 135 };
 136
 137 U_BOOT_DEVICE(pxa_serials) = {
 138         .name = "serial_pxa",
 139         .platdata = &serial_platdata,
 140 };