board/ti/ks2_evm/board_k2e.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * K2E EVM : Board initialization
   4  *
   5  * (C) Copyright 2014
   6  *     Texas Instruments Incorporated, <www.ti.com>
   7  */
   8
   9 #include <common.h>
  10 #include <image.h>
  11 #include <asm/arch/ddr3.h>
  12 #include <asm/arch/hardware.h>
  13 #include <asm/ti-common/keystone_net.h>
  14
  15 unsigned int get_external_clk(u32 clk)
  16 {
  17         unsigned int clk_freq;
  18
  19         switch (clk) {
  20         case sys_clk:
  21                 clk_freq = 100000000;
  22                 break;
  23         case alt_core_clk:
  24                 clk_freq = 100000000;
  25                 break;
  26         case pa_clk:
  27                 clk_freq = 100000000;
  28                 break;
  29         case ddr3a_clk:
  30                 clk_freq = 100000000;
  31                 break;
  32         default:
  33                 clk_freq = 0;
  34                 break;
  35         }
  36
  37         return clk_freq;
  38 }
  39
  40 static struct pll_init_data core_pll_config[NUM_SPDS] = {
  41         [SPD800]        = CORE_PLL_800,
  42         [SPD850]        = CORE_PLL_850,
  43         [SPD1000]       = CORE_PLL_1000,
  44         [SPD1250]       = CORE_PLL_1250,
  45         [SPD1350]       = CORE_PLL_1350,
  46         [SPD1400]       = CORE_PLL_1400,
  47         [SPD1500]       = CORE_PLL_1500,
  48 };
  49
  50 /* DEV and ARM speed definitions as specified in DEVSPEED register */
  51 int speeds[DEVSPEED_NUMSPDS] = {
  52         SPD850,
  53         SPD1000,
  54         SPD1250,
  55         SPD1350,
  56         SPD1400,
  57         SPD1500,
  58         SPD1400,
  59         SPD1350,
  60         SPD1250,
  61         SPD1000,
  62         SPD850,
  63         SPD800,
  64 };
  65
  66 s16 divn_val[16] = {
  67         0, 0, 1, 4, 23, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
  68 };
  69
  70 static struct pll_init_data pa_pll_config =
  71         PASS_PLL_1000;
  72
  73 struct pll_init_data *get_pll_init_data(int pll)
  74 {
  75         int speed;
  76         struct pll_init_data *data;
  77
  78         switch (pll) {
  79         case MAIN_PLL:
  80                 speed = get_max_dev_speed(speeds);
  81                 data = &core_pll_config[speed];
  82                 break;
  83         case PASS_PLL:
  84                 data = &pa_pll_config;
  85                 break;
  86         default:
  87                 data = NULL;
  88         }
  89
  90         return data;
  91 }
  92
  93 #if defined(CONFIG_MULTI_DTB_FIT)
  94 int board_fit_config_name_match(const char *name)
  95 {
  96         if (!strcmp(name, "keystone-k2e-evm"))
  97                 return 0;
  98
  99         return -1;
 100 }
 101 #endif
 102
 103 #if defined(CONFIG_BOARD_EARLY_INIT_F)
 104 int board_early_init_f(void)
 105 {
 106         init_plls();
 107
 108         return 0;
 109 }
 110 #endif
 111
 112 #ifdef CONFIG_SPL_BUILD
 113 void spl_init_keystone_plls(void)
 114 {
 115         init_plls();
 116 }
 117 #endif