board/freescale/imx8mp_evk/spl.c

   1 /*
   2  * Copyright 2018-2019 NXP
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <cpu_func.h>
   9 #include <hang.h>
  10 #include <image.h>
  11 #include <spl.h>
  12 #include <asm/io.h>
  13 #include <errno.h>
  14 #include <asm/io.h>
  15 #include <asm/mach-imx/iomux-v3.h>
  16 #include <asm/arch/imx8mp_pins.h>
  17 #include <asm/arch/sys_proto.h>
  18 #include <asm/mach-imx/boot_mode.h>
  19 #include <power/pmic.h>
  20
  21 #include <power/pca9450.h>
  22 #include <asm/arch/clock.h>
  23 #include <asm/mach-imx/gpio.h>
  24 #include <asm/mach-imx/mxc_i2c.h>
  25 #include <fsl_esdhc.h>
  26 #include <mmc.h>
  27 #include <asm/arch/ddr.h>
  28
  29 #include <dm/uclass.h>
  30 #include <dm/device.h>
  31 #include <dm/uclass-internal.h>
  32 #include <dm/device-internal.h>
  33
  34 DECLARE_GLOBAL_DATA_PTR;
  35
  36 int spl_board_boot_device(enum boot_device boot_dev_spl)
  37 {
  38         return BOOT_DEVICE_BOOTROM;
  39 }
  40
  41 void spl_dram_init(void)
  42 {
  43         ddr_init(&dram_timing);
  44 }
  45
  46 void spl_board_init(void)
  47 {
  48         struct udevice *dev;
  49         int ret;
  50
  51         puts("Normal Boot\n");
  52
  53         ret = uclass_get_device_by_name(UCLASS_CLK,
  54                                         "clock-controller@30380000",
  55                                         &dev);
  56         if (ret < 0)
  57                 printf("Failed to find clock node. Check device tree\n");
  58 }
  59
  60 #define I2C_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PE)
  61 #define PC MUX_PAD_CTRL(I2C_PAD_CTRL)
  62 struct i2c_pads_info i2c_pad_info1 = {
  63         .scl = {
  64                 .i2c_mode = MX8MP_PAD_I2C1_SCL__I2C1_SCL | PC,
  65                 .gpio_mode = MX8MP_PAD_I2C1_SCL__GPIO5_IO14 | PC,
  66                 .gp = IMX_GPIO_NR(5, 14),
  67         },
  68         .sda = {
  69                 .i2c_mode = MX8MP_PAD_I2C1_SDA__I2C1_SDA | PC,
  70                 .gpio_mode = MX8MP_PAD_I2C1_SDA__GPIO5_IO15 | PC,
  71                 .gp = IMX_GPIO_NR(5, 15),
  72         },
  73 };
  74
  75 #ifdef CONFIG_POWER
  76 #define I2C_PMIC        0
  77 int power_init_board(void)
  78 {
  79         struct pmic *p;
  80         int ret;
  81
  82         ret = power_pca9450b_init(I2C_PMIC);
  83         if (ret)
  84                 printf("power init failed");
  85         p = pmic_get("PCA9450");
  86         pmic_probe(p);
  87
  88         /* BUCKxOUT_DVS0/1 control BUCK123 output */
  89         pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29);
  90
  91         /*
  92          * increase VDD_SOC to typical value 0.95V before first
  93          * DRAM access, set DVS1 to 0.85v for suspend.
  94          * Enable DVS control through PMIC_STBY_REQ and
  95          * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H)
  96          */
  97         pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C);
  98         pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14);
  99         pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59);
 100
 101         /* set WDOG_B_CFG to cold reset */
 102         pmic_reg_write(p, PCA9450_RESET_CTRL, 0xA1);
 103
 104         return 0;
 105 }
 106 #endif
 107
 108 #ifdef CONFIG_SPL_LOAD_FIT
 109 int board_fit_config_name_match(const char *name)
 110 {
 111         /* Just empty function now - can't decide what to choose */
 112         debug("%s: %s\n", __func__, name);
 113
 114         return 0;
 115 }
 116 #endif
 117
 118 void board_init_f(ulong dummy)
 119 {
 120         int ret;
 121
 122         arch_cpu_init();
 123
 124         init_uart_clk(1);
 125
 126         board_early_init_f();
 127
 128         timer_init();
 129
 130         preloader_console_init();
 131
 132         /* Clear the BSS. */
 133         memset(__bss_start, 0, __bss_end - __bss_start);
 134
 135         ret = spl_init();
 136         if (ret) {
 137                 debug("spl_init() failed: %d\n", ret);
 138                 hang();
 139         }
 140
 141         enable_tzc380();
 142
 143         setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1);
 144
 145         power_init_board();
 146
 147         /* DDR initialization */
 148         spl_dram_init();
 149
 150         board_init_r(NULL, 0);
 151 }