board/armltd/vexpress64/vexpress64.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2013
   4  * David Feng <fenghua@phytium.com.cn>
   5  * Sharma Bhupesh <bhupesh.sharma@freescale.com>
   6  */
   7 #include <common.h>
   8 #include <cpu_func.h>
   9 #include <dm.h>
  10 #include <malloc.h>
  11 #include <errno.h>
  12 #include <net.h>
  13 #include <netdev.h>
  14 #include <asm/io.h>
  15 #include <linux/compiler.h>
  16 #include <dm/platform_data/serial_pl01x.h>
  17 #include "pcie.h"
  18 #include <asm/armv8/mmu.h>
  19
  20 DECLARE_GLOBAL_DATA_PTR;
  21
  22 static const struct pl01x_serial_platdata serial_platdata = {
  23         .base = V2M_UART0,
  24         .type = TYPE_PL011,
  25         .clock = CONFIG_PL011_CLOCK,
  26 };
  27
  28 U_BOOT_DEVICE(vexpress_serials) = {
  29         .name = "serial_pl01x",
  30         .platdata = &serial_platdata,
  31 };
  32
  33 static struct mm_region vexpress64_mem_map[] = {
  34         {
  35                 .virt = 0x0UL,
  36                 .phys = 0x0UL,
  37                 .size = 0x80000000UL,
  38                 .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) |
  39                          PTE_BLOCK_NON_SHARE |
  40                          PTE_BLOCK_PXN | PTE_BLOCK_UXN
  41         }, {
  42                 .virt = 0x80000000UL,
  43                 .phys = 0x80000000UL,
  44                 .size = 0xff80000000UL,
  45                 .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) |
  46                          PTE_BLOCK_INNER_SHARE
  47         }, {
  48                 /* List terminator */
  49                 0,
  50         }
  51 };
  52
  53 struct mm_region *mem_map = vexpress64_mem_map;
  54
  55 /* This function gets replaced by platforms supporting PCIe.
  56  * The replacement function, eg. on Juno, initialises the PCIe bus.
  57  */
  58 __weak void vexpress64_pcie_init(void)
  59 {
  60 }
  61
  62 int board_init(void)
  63 {
  64         vexpress64_pcie_init();
  65         return 0;
  66 }
  67
  68 int dram_init(void)
  69 {
  70         gd->ram_size = PHYS_SDRAM_1_SIZE;
  71         return 0;
  72 }
  73
  74 int dram_init_banksize(void)
  75 {
  76         gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
  77         gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
  78 #ifdef PHYS_SDRAM_2
  79         gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
  80         gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
  81 #endif
  82
  83         return 0;
  84 }
  85
  86 #ifdef CONFIG_OF_BOARD
  87 #define JUNO_FLASH_SEC_SIZE     (256 * 1024)
  88 static phys_addr_t find_dtb_in_nor_flash(const char *partname)
  89 {
  90         phys_addr_t sector = CONFIG_SYS_FLASH_BASE;
  91         int i;
  92
  93         for (i = 0;
  94              i < CONFIG_SYS_MAX_FLASH_SECT;
  95              i++, sector += JUNO_FLASH_SEC_SIZE) {
  96                 int len = strlen(partname) + 1;
  97                 int offs;
  98                 phys_addr_t imginfo;
  99                 u32 reg;
 100
 101                 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x04);
 102                 /* This makes up the string "HSLFTOOF" flash footer */
 103                 if (reg != 0x464F4F54U)
 104                         continue;
 105                 reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x08);
 106                 if (reg != 0x464C5348U)
 107                         continue;
 108
 109                 for (offs = 0; offs < 32; offs += 4, len -= 4) {
 110                         reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x30 + offs);
 111                         if (strncmp(partname + offs, (char *)&reg,
 112                                     len > 4 ? 4 : len))
 113                                 break;
 114
 115                         if (len > 4)
 116                                 continue;
 117
 118                         reg = readl(sector + JUNO_FLASH_SEC_SIZE - 0x10);
 119                         imginfo = sector + JUNO_FLASH_SEC_SIZE - 0x30 - reg;
 120                         reg = readl(imginfo + 0x54);
 121
 122                         return CONFIG_SYS_FLASH_BASE +
 123                                reg * JUNO_FLASH_SEC_SIZE;
 124                 }
 125         }
 126
 127         printf("No DTB found\n");
 128
 129         return ~0;
 130 }
 131
 132 void *board_fdt_blob_setup(void)
 133 {
 134         phys_addr_t fdt_rom_addr = find_dtb_in_nor_flash(CONFIG_JUNO_DTB_PART);
 135
 136         if (fdt_rom_addr == ~0UL)
 137                 return NULL;
 138
 139         return (void *)fdt_rom_addr;
 140 }
 141 #endif
 142
 143 /* Actual reset is done via PSCI. */
 144 void reset_cpu(ulong addr)
 145 {
 146 }
 147
 148 /*
 149  * Board specific ethernet initialization routine.
 150  */
 151 int board_eth_init(bd_t *bis)
 152 {
 153         int rc = 0;
 154 #ifdef CONFIG_SMC91111
 155         rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
 156 #endif
 157 #ifdef CONFIG_SMC911X
 158         rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 159 #endif
 160         return rc;
 161 }