2 * linux/arch/x86-64/kernel/setup.c
4 * Copyright (C) 1995 Linus Torvalds
6 * Nov 2001 Dave Jones <davej@suse.de>
7 * Forked from i386 setup code.
13 * This file handles the architecture-dependent parts of initialization
16 #include <linux/errno.h>
17 #include <linux/sched.h>
18 #include <linux/kernel.h>
20 #include <linux/stddef.h>
21 #include <linux/unistd.h>
22 #include <linux/ptrace.h>
23 #include <linux/slab.h>
24 #include <linux/user.h>
25 #include <linux/a.out.h>
26 #include <linux/tty.h>
27 #include <linux/ioport.h>
28 #include <linux/delay.h>
29 #include <linux/config.h>
30 #include <linux/init.h>
31 #include <linux/initrd.h>
32 #include <linux/highmem.h>
33 #include <linux/bootmem.h>
34 #include <linux/module.h>
35 #include <asm/processor.h>
36 #include <linux/console.h>
37 #include <linux/seq_file.h>
38 #include <linux/crash_dump.h>
39 #include <linux/root_dev.h>
40 #include <linux/pci.h>
41 #include <linux/acpi.h>
42 #include <linux/kallsyms.h>
43 #include <linux/edd.h>
44 #include <linux/mmzone.h>
45 #include <linux/kexec.h>
46 #include <linux/cpufreq.h>
47 #include <linux/dmi.h>
48 #include <linux/dma-mapping.h>
49 #include <linux/ctype.h>
52 #include <asm/uaccess.h>
53 #include <asm/system.h>
58 #include <video/edid.h>
61 #include <asm/mpspec.h>
62 #include <asm/mmu_context.h>
63 #include <asm/bootsetup.h>
64 #include <asm/proto.h>
65 #include <asm/setup.h>
66 #include <asm/mach_apic.h>
68 #include <asm/swiotlb.h>
69 #include <asm/sections.h>
70 #include <asm/gart-mapping.h>
76 struct cpuinfo_x86 boot_cpu_data __read_mostly;
78 unsigned long mmu_cr4_features;
81 EXPORT_SYMBOL(acpi_disabled);
83 extern int __initdata acpi_ht;
84 extern acpi_interrupt_flags acpi_sci_flags;
85 int __initdata acpi_force = 0;
88 int acpi_numa __initdata;
90 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
93 unsigned long saved_video_mode;
98 struct screen_info screen_info;
99 struct sys_desc_table_struct {
100 unsigned short length;
101 unsigned char table[0];
104 struct edid_info edid_info;
107 extern int root_mountflags;
109 char command_line[COMMAND_LINE_SIZE];
111 struct resource standard_io_resources[] = {
112 { .name = "dma1", .start = 0x00, .end = 0x1f,
113 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
114 { .name = "pic1", .start = 0x20, .end = 0x21,
115 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
116 { .name = "timer0", .start = 0x40, .end = 0x43,
117 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
118 { .name = "timer1", .start = 0x50, .end = 0x53,
119 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
120 { .name = "keyboard", .start = 0x60, .end = 0x6f,
121 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
122 { .name = "dma page reg", .start = 0x80, .end = 0x8f,
123 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
124 { .name = "pic2", .start = 0xa0, .end = 0xa1,
125 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
126 { .name = "dma2", .start = 0xc0, .end = 0xdf,
127 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
128 { .name = "fpu", .start = 0xf0, .end = 0xff,
129 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
132 #define STANDARD_IO_RESOURCES \
133 (sizeof standard_io_resources / sizeof standard_io_resources[0])
135 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
137 struct resource data_resource = {
138 .name = "Kernel data",
141 .flags = IORESOURCE_RAM,
143 struct resource code_resource = {
144 .name = "Kernel code",
147 .flags = IORESOURCE_RAM,
150 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
152 static struct resource system_rom_resource = {
153 .name = "System ROM",
156 .flags = IORESOURCE_ROM,
159 static struct resource extension_rom_resource = {
160 .name = "Extension ROM",
163 .flags = IORESOURCE_ROM,
166 static struct resource adapter_rom_resources[] = {
167 { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
168 .flags = IORESOURCE_ROM },
169 { .name = "Adapter ROM", .start = 0, .end = 0,
170 .flags = IORESOURCE_ROM },
171 { .name = "Adapter ROM", .start = 0, .end = 0,
172 .flags = IORESOURCE_ROM },
173 { .name = "Adapter ROM", .start = 0, .end = 0,
174 .flags = IORESOURCE_ROM },
175 { .name = "Adapter ROM", .start = 0, .end = 0,
176 .flags = IORESOURCE_ROM },
177 { .name = "Adapter ROM", .start = 0, .end = 0,
178 .flags = IORESOURCE_ROM }
181 #define ADAPTER_ROM_RESOURCES \
182 (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
184 static struct resource video_rom_resource = {
188 .flags = IORESOURCE_ROM,
191 static struct resource video_ram_resource = {
192 .name = "Video RAM area",
195 .flags = IORESOURCE_RAM,
198 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
200 static int __init romchecksum(unsigned char *rom, unsigned long length)
202 unsigned char *p, sum = 0;
204 for (p = rom; p < rom + length; p++)
209 static void __init probe_roms(void)
211 unsigned long start, length, upper;
216 upper = adapter_rom_resources[0].start;
217 for (start = video_rom_resource.start; start < upper; start += 2048) {
218 rom = isa_bus_to_virt(start);
219 if (!romsignature(rom))
222 video_rom_resource.start = start;
224 /* 0 < length <= 0x7f * 512, historically */
225 length = rom[2] * 512;
227 /* if checksum okay, trust length byte */
228 if (length && romchecksum(rom, length))
229 video_rom_resource.end = start + length - 1;
231 request_resource(&iomem_resource, &video_rom_resource);
235 start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
240 request_resource(&iomem_resource, &system_rom_resource);
241 upper = system_rom_resource.start;
243 /* check for extension rom (ignore length byte!) */
244 rom = isa_bus_to_virt(extension_rom_resource.start);
245 if (romsignature(rom)) {
246 length = extension_rom_resource.end - extension_rom_resource.start + 1;
247 if (romchecksum(rom, length)) {
248 request_resource(&iomem_resource, &extension_rom_resource);
249 upper = extension_rom_resource.start;
253 /* check for adapter roms on 2k boundaries */
254 for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
255 rom = isa_bus_to_virt(start);
256 if (!romsignature(rom))
259 /* 0 < length <= 0x7f * 512, historically */
260 length = rom[2] * 512;
262 /* but accept any length that fits if checksum okay */
263 if (!length || start + length > upper || !romchecksum(rom, length))
266 adapter_rom_resources[i].start = start;
267 adapter_rom_resources[i].end = start + length - 1;
268 request_resource(&iomem_resource, &adapter_rom_resources[i]);
270 start = adapter_rom_resources[i++].end & ~2047UL;
274 /* Check for full argument with no trailing characters */
275 static int fullarg(char *p, char *arg)
278 return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
281 static __init void parse_cmdline_early (char ** cmdline_p)
283 char c = ' ', *to = command_line, *from = COMMAND_LINE;
293 * If the BIOS enumerates physical processors before logical,
294 * maxcpus=N at enumeration-time can be used to disable HT.
296 else if (!memcmp(from, "maxcpus=", 8)) {
297 extern unsigned int maxcpus;
299 maxcpus = simple_strtoul(from + 8, NULL, 0);
303 /* "acpi=off" disables both ACPI table parsing and interpreter init */
304 if (fullarg(from,"acpi=off"))
307 if (fullarg(from, "acpi=force")) {
308 /* add later when we do DMI horrors: */
313 /* acpi=ht just means: do ACPI MADT parsing
314 at bootup, but don't enable the full ACPI interpreter */
315 if (fullarg(from, "acpi=ht")) {
320 else if (fullarg(from, "pci=noacpi"))
322 else if (fullarg(from, "acpi=noirq"))
325 else if (fullarg(from, "acpi_sci=edge"))
326 acpi_sci_flags.trigger = 1;
327 else if (fullarg(from, "acpi_sci=level"))
328 acpi_sci_flags.trigger = 3;
329 else if (fullarg(from, "acpi_sci=high"))
330 acpi_sci_flags.polarity = 1;
331 else if (fullarg(from, "acpi_sci=low"))
332 acpi_sci_flags.polarity = 3;
334 /* acpi=strict disables out-of-spec workarounds */
335 else if (fullarg(from, "acpi=strict")) {
338 #ifdef CONFIG_X86_IO_APIC
339 else if (fullarg(from, "acpi_skip_timer_override"))
340 acpi_skip_timer_override = 1;
344 if (fullarg(from, "disable_timer_pin_1"))
345 disable_timer_pin_1 = 1;
346 if (fullarg(from, "enable_timer_pin_1"))
347 disable_timer_pin_1 = -1;
349 if (fullarg(from, "nolapic") || fullarg(from, "disableapic"))
352 if (fullarg(from, "noapic"))
353 skip_ioapic_setup = 1;
355 if (fullarg(from,"apic")) {
356 skip_ioapic_setup = 0;
360 if (!memcmp(from, "mem=", 4))
361 parse_memopt(from+4, &from);
363 if (!memcmp(from, "memmap=", 7)) {
364 /* exactmap option is for used defined memory */
365 if (!memcmp(from+7, "exactmap", 8)) {
366 #ifdef CONFIG_CRASH_DUMP
367 /* If we are doing a crash dump, we
368 * still need to know the real mem
369 * size before original memory map is
372 saved_max_pfn = e820_end_of_ram();
380 parse_memmapopt(from+7, &from);
386 if (!memcmp(from, "numa=", 5))
390 if (!memcmp(from,"iommu=",6)) {
394 if (fullarg(from,"oops=panic"))
397 if (!memcmp(from, "noexec=", 7))
398 nonx_setup(from + 7);
401 /* crashkernel=size@addr specifies the location to reserve for
402 * a crash kernel. By reserving this memory we guarantee
403 * that linux never set's it up as a DMA target.
404 * Useful for holding code to do something appropriate
405 * after a kernel panic.
407 else if (!memcmp(from, "crashkernel=", 12)) {
408 unsigned long size, base;
409 size = memparse(from+12, &from);
411 base = memparse(from+1, &from);
412 /* FIXME: Do I want a sanity check
413 * to validate the memory range?
415 crashk_res.start = base;
416 crashk_res.end = base + size - 1;
421 #ifdef CONFIG_PROC_VMCORE
422 /* elfcorehdr= specifies the location of elf core header
423 * stored by the crashed kernel. This option will be passed
424 * by kexec loader to the capture kernel.
426 else if(!memcmp(from, "elfcorehdr=", 11))
427 elfcorehdr_addr = memparse(from+11, &from);
430 #ifdef CONFIG_HOTPLUG_CPU
431 else if (!memcmp(from, "additional_cpus=", 16))
432 setup_additional_cpus(from+16);
439 if (COMMAND_LINE_SIZE <= ++len)
444 printk(KERN_INFO "user-defined physical RAM map:\n");
445 e820_print_map("user");
448 *cmdline_p = command_line;
453 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
455 unsigned long bootmap_size, bootmap;
457 bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
458 bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
460 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
461 bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
462 e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
463 reserve_bootmem(bootmap, bootmap_size);
467 /* Use inline assembly to define this because the nops are defined
468 as inline assembly strings in the include files and we cannot
469 get them easily into strings. */
470 asm("\t.data\nk8nops: "
471 K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
474 extern unsigned char k8nops[];
475 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
481 k8nops + 1 + 2 + 3 + 4,
482 k8nops + 1 + 2 + 3 + 4 + 5,
483 k8nops + 1 + 2 + 3 + 4 + 5 + 6,
484 k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
487 extern char __vsyscall_0;
489 /* Replace instructions with better alternatives for this CPU type.
491 This runs before SMP is initialized to avoid SMP problems with
492 self modifying code. This implies that assymetric systems where
493 APs have less capabilities than the boot processor are not handled.
494 In this case boot with "noreplacement". */
495 void apply_alternatives(void *start, void *end)
499 for (a = start; (void *)a < end; a++) {
502 if (!boot_cpu_has(a->cpuid))
505 BUG_ON(a->replacementlen > a->instrlen);
507 /* vsyscall code is not mapped yet. resolve it manually. */
508 if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END)
509 instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
510 __inline_memcpy(instr, a->replacement, a->replacementlen);
511 diff = a->instrlen - a->replacementlen;
513 /* Pad the rest with nops */
514 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
518 __inline_memcpy(instr + i, k8_nops[k], k);
523 static int no_replacement __initdata = 0;
525 void __init alternative_instructions(void)
527 extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
530 apply_alternatives(__alt_instructions, __alt_instructions_end);
533 static int __init noreplacement_setup(char *s)
539 __setup("noreplacement", noreplacement_setup);
541 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
543 #ifdef CONFIG_EDD_MODULE
547 * copy_edd() - Copy the BIOS EDD information
548 * from boot_params into a safe place.
551 static inline void copy_edd(void)
553 memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
554 memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
555 edd.mbr_signature_nr = EDD_MBR_SIG_NR;
556 edd.edd_info_nr = EDD_NR;
559 static inline void copy_edd(void)
564 #define EBDA_ADDR_POINTER 0x40E
565 static void __init reserve_ebda_region(void)
569 * there is a real-mode segmented pointer pointing to the
570 * 4K EBDA area at 0x40E
572 addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
575 reserve_bootmem_generic(addr, PAGE_SIZE);
578 void __init setup_arch(char **cmdline_p)
580 unsigned long kernel_end;
582 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
583 screen_info = SCREEN_INFO;
584 edid_info = EDID_INFO;
585 saved_video_mode = SAVED_VIDEO_MODE;
586 bootloader_type = LOADER_TYPE;
588 #ifdef CONFIG_BLK_DEV_RAM
589 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
590 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
591 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
593 setup_memory_region();
596 if (!MOUNT_ROOT_RDONLY)
597 root_mountflags &= ~MS_RDONLY;
598 init_mm.start_code = (unsigned long) &_text;
599 init_mm.end_code = (unsigned long) &_etext;
600 init_mm.end_data = (unsigned long) &_edata;
601 init_mm.brk = (unsigned long) &_end;
603 code_resource.start = virt_to_phys(&_text);
604 code_resource.end = virt_to_phys(&_etext)-1;
605 data_resource.start = virt_to_phys(&_etext);
606 data_resource.end = virt_to_phys(&_edata)-1;
608 parse_cmdline_early(cmdline_p);
610 early_identify_cpu(&boot_cpu_data);
613 * partially used pages are not usable - thus
614 * we are rounding upwards:
616 end_pfn = e820_end_of_ram();
620 init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
626 * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
627 * Call this early for SRAT node setup.
629 acpi_boot_table_init();
632 #ifdef CONFIG_ACPI_NUMA
634 * Parse SRAT to discover nodes.
640 numa_initmem_init(0, end_pfn);
642 contig_initmem_init(0, end_pfn);
645 /* Reserve direct mapping */
646 reserve_bootmem_generic(table_start << PAGE_SHIFT,
647 (table_end - table_start) << PAGE_SHIFT);
650 kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
651 reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
654 * reserve physical page 0 - it's a special BIOS page on many boxes,
655 * enabling clean reboots, SMP operation, laptop functions.
657 reserve_bootmem_generic(0, PAGE_SIZE);
659 /* reserve ebda region */
660 reserve_ebda_region();
664 * But first pinch a few for the stack/trampoline stuff
665 * FIXME: Don't need the extra page at 4K, but need to fix
666 * trampoline before removing it. (see the GDT stuff)
668 reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
670 /* Reserve SMP trampoline */
671 reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
674 #ifdef CONFIG_ACPI_SLEEP
676 * Reserve low memory region for sleep support.
678 acpi_reserve_bootmem();
680 #ifdef CONFIG_X86_LOCAL_APIC
682 * Find and reserve possible boot-time SMP configuration:
686 #ifdef CONFIG_BLK_DEV_INITRD
687 if (LOADER_TYPE && INITRD_START) {
688 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
689 reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
691 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
692 initrd_end = initrd_start+INITRD_SIZE;
695 printk(KERN_ERR "initrd extends beyond end of memory "
696 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
697 (unsigned long)(INITRD_START + INITRD_SIZE),
698 (unsigned long)(end_pfn << PAGE_SHIFT));
704 if (crashk_res.start != crashk_res.end) {
705 reserve_bootmem(crashk_res.start,
706 crashk_res.end - crashk_res.start + 1);
715 * set this early, so we dont allocate cpu0
716 * if MADT list doesnt list BSP first
717 * mpparse.c/MP_processor_info() allocates logical cpu numbers.
719 cpu_set(0, cpu_present_map);
722 * Read APIC and some other early information from ACPI tables.
729 #ifdef CONFIG_X86_LOCAL_APIC
731 * get boot-time SMP configuration:
733 if (smp_found_config)
735 init_apic_mappings();
739 * Request address space for all standard RAM and ROM resources
740 * and also for regions reported as reserved by the e820.
743 e820_reserve_resources();
745 request_resource(&iomem_resource, &video_ram_resource);
749 /* request I/O space for devices used on all i[345]86 PCs */
750 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
751 request_resource(&ioport_resource, &standard_io_resources[i]);
756 #ifdef CONFIG_GART_IOMMU
761 #if defined(CONFIG_VGA_CONSOLE)
762 conswitchp = &vga_con;
763 #elif defined(CONFIG_DUMMY_CONSOLE)
764 conswitchp = &dummy_con;
769 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
773 if (c->extended_cpuid_level < 0x80000004)
776 v = (unsigned int *) c->x86_model_id;
777 cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
778 cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
779 cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
780 c->x86_model_id[48] = 0;
785 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
787 unsigned int n, dummy, eax, ebx, ecx, edx;
789 n = c->extended_cpuid_level;
791 if (n >= 0x80000005) {
792 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
793 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
794 edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
795 c->x86_cache_size=(ecx>>24)+(edx>>24);
796 /* On K8 L1 TLB is inclusive, so don't count it */
800 if (n >= 0x80000006) {
801 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
802 ecx = cpuid_ecx(0x80000006);
803 c->x86_cache_size = ecx >> 16;
804 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
806 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
807 c->x86_cache_size, ecx & 0xFF);
811 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
812 if (n >= 0x80000008) {
813 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
814 c->x86_virt_bits = (eax >> 8) & 0xff;
815 c->x86_phys_bits = eax & 0xff;
820 static int nearby_node(int apicid)
823 for (i = apicid - 1; i >= 0; i--) {
824 int node = apicid_to_node[i];
825 if (node != NUMA_NO_NODE && node_online(node))
828 for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
829 int node = apicid_to_node[i];
830 if (node != NUMA_NO_NODE && node_online(node))
833 return first_node(node_online_map); /* Shouldn't happen */
838 * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
839 * Assumes number of cores is a power of two.
841 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
844 int cpu = smp_processor_id();
848 unsigned apicid = phys_proc_id[cpu];
852 while ((1 << bits) < c->x86_max_cores)
855 /* Low order bits define the core id (index of core in socket) */
856 cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
857 /* Convert the APIC ID into the socket ID */
858 phys_proc_id[cpu] >>= bits;
861 node = phys_proc_id[cpu];
862 if (apicid_to_node[apicid] != NUMA_NO_NODE)
863 node = apicid_to_node[apicid];
864 if (!node_online(node)) {
865 /* Two possibilities here:
866 - The CPU is missing memory and no node was created.
867 In that case try picking one from a nearby CPU
868 - The APIC IDs differ from the HyperTransport node IDs
869 which the K8 northbridge parsing fills in.
870 Assume they are all increased by a constant offset,
871 but in the same order as the HT nodeids.
872 If that doesn't result in a usable node fall back to the
873 path for the previous case. */
874 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
875 if (ht_nodeid >= 0 &&
876 apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
877 node = apicid_to_node[ht_nodeid];
878 /* Pick a nearby node */
879 if (!node_online(node))
880 node = nearby_node(apicid);
882 numa_set_node(cpu, node);
884 printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
885 cpu, apicid, c->x86_max_cores, node, cpu_core_id[cpu]);
890 static int __init init_amd(struct cpuinfo_x86 *c)
899 * Disable TLB flush filter by setting HWCR.FFDIS on K8
900 * bit 6 of msr C001_0015
902 * Errata 63 for SH-B3 steppings
903 * Errata 122 for all steppings (F+ have it disabled by default)
906 rdmsrl(MSR_K8_HWCR, value);
908 wrmsrl(MSR_K8_HWCR, value);
912 /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
913 3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
914 clear_bit(0*32+31, &c->x86_capability);
916 /* On C+ stepping K8 rep microcode works well for copy/memset */
917 level = cpuid_eax(1);
918 if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
919 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
921 r = get_model_name(c);
925 /* Should distinguish Models here, but this is only
926 a fallback anyways. */
927 strcpy(c->x86_model_id, "Hammer");
931 display_cacheinfo(c);
933 /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
934 if (c->x86_power & (1<<8))
935 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
937 if (c->extended_cpuid_level >= 0x80000008) {
938 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
939 if (c->x86_max_cores & (c->x86_max_cores - 1))
940 c->x86_max_cores = 1;
948 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
951 u32 eax, ebx, ecx, edx;
952 int index_msb, core_bits;
953 int cpu = smp_processor_id();
955 cpuid(1, &eax, &ebx, &ecx, &edx);
957 c->apicid = phys_pkg_id(0);
959 if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
962 smp_num_siblings = (ebx & 0xff0000) >> 16;
964 if (smp_num_siblings == 1) {
965 printk(KERN_INFO "CPU: Hyper-Threading is disabled\n");
966 } else if (smp_num_siblings > 1 ) {
968 if (smp_num_siblings > NR_CPUS) {
969 printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
970 smp_num_siblings = 1;
974 index_msb = get_count_order(smp_num_siblings);
975 phys_proc_id[cpu] = phys_pkg_id(index_msb);
977 printk(KERN_INFO "CPU: Physical Processor ID: %d\n",
980 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
982 index_msb = get_count_order(smp_num_siblings) ;
984 core_bits = get_count_order(c->x86_max_cores);
986 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
987 ((1 << core_bits) - 1);
989 if (c->x86_max_cores > 1)
990 printk(KERN_INFO "CPU: Processor Core ID: %d\n",
997 * find out the number of processor cores on the die
999 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
1003 if (c->cpuid_level < 4)
1012 return ((eax >> 26) + 1);
1017 static void srat_detect_node(void)
1021 int cpu = smp_processor_id();
1023 /* Don't do the funky fallback heuristics the AMD version employs
1025 node = apicid_to_node[hard_smp_processor_id()];
1026 if (node == NUMA_NO_NODE)
1028 numa_set_node(cpu, node);
1031 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1035 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1040 init_intel_cacheinfo(c);
1041 n = c->extended_cpuid_level;
1042 if (n >= 0x80000008) {
1043 unsigned eax = cpuid_eax(0x80000008);
1044 c->x86_virt_bits = (eax >> 8) & 0xff;
1045 c->x86_phys_bits = eax & 0xff;
1046 /* CPUID workaround for Intel 0F34 CPU */
1047 if (c->x86_vendor == X86_VENDOR_INTEL &&
1048 c->x86 == 0xF && c->x86_model == 0x3 &&
1050 c->x86_phys_bits = 36;
1054 c->x86_cache_alignment = c->x86_clflush_size * 2;
1055 if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1056 (c->x86 == 0x6 && c->x86_model >= 0x0e))
1057 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1058 set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1059 c->x86_max_cores = intel_num_cpu_cores(c);
1064 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1066 char *v = c->x86_vendor_id;
1068 if (!strcmp(v, "AuthenticAMD"))
1069 c->x86_vendor = X86_VENDOR_AMD;
1070 else if (!strcmp(v, "GenuineIntel"))
1071 c->x86_vendor = X86_VENDOR_INTEL;
1073 c->x86_vendor = X86_VENDOR_UNKNOWN;
1076 struct cpu_model_info {
1079 char *model_names[16];
1082 /* Do some early cpuid on the boot CPU to get some parameter that are
1083 needed before check_bugs. Everything advanced is in identify_cpu
1085 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1089 c->loops_per_jiffy = loops_per_jiffy;
1090 c->x86_cache_size = -1;
1091 c->x86_vendor = X86_VENDOR_UNKNOWN;
1092 c->x86_model = c->x86_mask = 0; /* So far unknown... */
1093 c->x86_vendor_id[0] = '\0'; /* Unset */
1094 c->x86_model_id[0] = '\0'; /* Unset */
1095 c->x86_clflush_size = 64;
1096 c->x86_cache_alignment = c->x86_clflush_size;
1097 c->x86_max_cores = 1;
1098 c->extended_cpuid_level = 0;
1099 memset(&c->x86_capability, 0, sizeof c->x86_capability);
1101 /* Get vendor name */
1102 cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1103 (unsigned int *)&c->x86_vendor_id[0],
1104 (unsigned int *)&c->x86_vendor_id[8],
1105 (unsigned int *)&c->x86_vendor_id[4]);
1109 /* Initialize the standard set of capabilities */
1110 /* Note that the vendor-specific code below might override */
1112 /* Intel-defined flags: level 0x00000001 */
1113 if (c->cpuid_level >= 0x00000001) {
1115 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1116 &c->x86_capability[0]);
1117 c->x86 = (tfms >> 8) & 0xf;
1118 c->x86_model = (tfms >> 4) & 0xf;
1119 c->x86_mask = tfms & 0xf;
1121 c->x86 += (tfms >> 20) & 0xff;
1123 c->x86_model += ((tfms >> 16) & 0xF) << 4;
1124 if (c->x86_capability[0] & (1<<19))
1125 c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1127 /* Have CPUID level 0 only - unheard of */
1132 phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1137 * This does the hard work of actually picking apart the CPU stuff...
1139 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1144 early_identify_cpu(c);
1146 /* AMD-defined flags: level 0x80000001 */
1147 xlvl = cpuid_eax(0x80000000);
1148 c->extended_cpuid_level = xlvl;
1149 if ((xlvl & 0xffff0000) == 0x80000000) {
1150 if (xlvl >= 0x80000001) {
1151 c->x86_capability[1] = cpuid_edx(0x80000001);
1152 c->x86_capability[6] = cpuid_ecx(0x80000001);
1154 if (xlvl >= 0x80000004)
1155 get_model_name(c); /* Default name */
1158 /* Transmeta-defined flags: level 0x80860001 */
1159 xlvl = cpuid_eax(0x80860000);
1160 if ((xlvl & 0xffff0000) == 0x80860000) {
1161 /* Don't set x86_cpuid_level here for now to not confuse. */
1162 if (xlvl >= 0x80860001)
1163 c->x86_capability[2] = cpuid_edx(0x80860001);
1167 * Vendor-specific initialization. In this section we
1168 * canonicalize the feature flags, meaning if there are
1169 * features a certain CPU supports which CPUID doesn't
1170 * tell us, CPUID claiming incorrect flags, or other bugs,
1171 * we handle them here.
1173 * At the end of this section, c->x86_capability better
1174 * indicate the features this CPU genuinely supports!
1176 switch (c->x86_vendor) {
1177 case X86_VENDOR_AMD:
1181 case X86_VENDOR_INTEL:
1185 case X86_VENDOR_UNKNOWN:
1187 display_cacheinfo(c);
1191 select_idle_routine(c);
1195 * On SMP, boot_cpu_data holds the common feature set between
1196 * all CPUs; so make sure that we indicate which features are
1197 * common between the CPUs. The first time this routine gets
1198 * executed, c == &boot_cpu_data.
1200 if (c != &boot_cpu_data) {
1201 /* AND the already accumulated flags with these */
1202 for (i = 0 ; i < NCAPINTS ; i++)
1203 boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1206 #ifdef CONFIG_X86_MCE
1209 if (c == &boot_cpu_data)
1214 numa_add_cpu(smp_processor_id());
1219 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1221 if (c->x86_model_id[0])
1222 printk("%s", c->x86_model_id);
1224 if (c->x86_mask || c->cpuid_level >= 0)
1225 printk(" stepping %02x\n", c->x86_mask);
1231 * Get CPU information for use by the procfs.
1234 static int show_cpuinfo(struct seq_file *m, void *v)
1236 struct cpuinfo_x86 *c = v;
1239 * These flag bits must match the definitions in <asm/cpufeature.h>.
1240 * NULL means this bit is undefined or reserved; either way it doesn't
1241 * have meaning as far as Linux is concerned. Note that it's important
1242 * to realize there is a difference between this table and CPUID -- if
1243 * applications want to get the raw CPUID data, they should access
1244 * /dev/cpu/<cpu_nr>/cpuid instead.
1246 static char *x86_cap_flags[] = {
1248 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1249 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1250 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1251 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1254 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1255 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1256 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1257 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1259 /* Transmeta-defined */
1260 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1261 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1262 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1263 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1265 /* Other (Linux-defined) */
1266 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1267 "constant_tsc", NULL, NULL,
1268 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1269 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1270 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1272 /* Intel-defined (#2) */
1273 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", NULL, "est",
1274 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1275 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1276 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1278 /* VIA/Cyrix/Centaur-defined */
1279 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1280 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1281 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1282 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1284 /* AMD-defined (#2) */
1285 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1286 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1287 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1288 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1290 static char *x86_power_flags[] = {
1291 "ts", /* temperature sensor */
1292 "fid", /* frequency id control */
1293 "vid", /* voltage id control */
1294 "ttp", /* thermal trip */
1298 /* nothing */ /* constant_tsc - moved to flags */
1303 if (!cpu_online(c-cpu_data))
1307 seq_printf(m,"processor\t: %u\n"
1309 "cpu family\t: %d\n"
1311 "model name\t: %s\n",
1312 (unsigned)(c-cpu_data),
1313 c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1316 c->x86_model_id[0] ? c->x86_model_id : "unknown");
1318 if (c->x86_mask || c->cpuid_level >= 0)
1319 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1321 seq_printf(m, "stepping\t: unknown\n");
1323 if (cpu_has(c,X86_FEATURE_TSC)) {
1324 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1327 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1328 freq / 1000, (freq % 1000));
1332 if (c->x86_cache_size >= 0)
1333 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1336 if (smp_num_siblings * c->x86_max_cores > 1) {
1337 int cpu = c - cpu_data;
1338 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1339 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1340 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1341 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1347 "fpu_exception\t: yes\n"
1348 "cpuid level\t: %d\n"
1355 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1356 if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1357 seq_printf(m, " %s", x86_cap_flags[i]);
1360 seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1361 c->loops_per_jiffy/(500000/HZ),
1362 (c->loops_per_jiffy/(5000/HZ)) % 100);
1364 if (c->x86_tlbsize > 0)
1365 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1366 seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1367 seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1369 seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1370 c->x86_phys_bits, c->x86_virt_bits);
1372 seq_printf(m, "power management:");
1375 for (i = 0; i < 32; i++)
1376 if (c->x86_power & (1 << i)) {
1377 if (i < ARRAY_SIZE(x86_power_flags) &&
1379 seq_printf(m, "%s%s",
1380 x86_power_flags[i][0]?" ":"",
1381 x86_power_flags[i]);
1383 seq_printf(m, " [%d]", i);
1387 seq_printf(m, "\n\n");
1392 static void *c_start(struct seq_file *m, loff_t *pos)
1394 return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1397 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1400 return c_start(m, pos);
1403 static void c_stop(struct seq_file *m, void *v)
1407 struct seq_operations cpuinfo_op = {
1411 .show = show_cpuinfo,
1414 static int __init run_dmi_scan(void)
1419 core_initcall(run_dmi_scan);