2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
25 * The current flushing context - we pass it instead of 5 arguments:
34 unsigned force_split : 1;
38 static unsigned long direct_pages_count[PG_LEVEL_NUM];
40 void update_page_count(int level, unsigned long pages)
44 /* Protect against CPA */
45 spin_lock_irqsave(&pgd_lock, flags);
46 direct_pages_count[level] += pages;
47 spin_unlock_irqrestore(&pgd_lock, flags);
50 static void split_page_count(int level)
52 direct_pages_count[level]--;
53 direct_pages_count[level - 1] += PTRS_PER_PTE;
56 int arch_report_meminfo(char *page)
58 int n = sprintf(page, "DirectMap4k: %8lu kB\n",
59 direct_pages_count[PG_LEVEL_4K] << 2);
60 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
61 n += sprintf(page + n, "DirectMap2M: %8lu kB\n",
62 direct_pages_count[PG_LEVEL_2M] << 11);
64 n += sprintf(page + n, "DirectMap4M: %8lu kB\n",
65 direct_pages_count[PG_LEVEL_2M] << 12);
69 n += sprintf(page + n, "DirectMap1G: %8lu kB\n",
70 direct_pages_count[PG_LEVEL_1G] << 20);
75 static inline void split_page_count(int level) { }
80 static inline unsigned long highmap_start_pfn(void)
82 return __pa(_text) >> PAGE_SHIFT;
85 static inline unsigned long highmap_end_pfn(void)
87 return __pa(round_up((unsigned long)_end, PMD_SIZE)) >> PAGE_SHIFT;
92 #ifdef CONFIG_DEBUG_PAGEALLOC
93 # define debug_pagealloc 1
95 # define debug_pagealloc 0
99 within(unsigned long addr, unsigned long start, unsigned long end)
101 return addr >= start && addr < end;
109 * clflush_cache_range - flush a cache range with clflush
110 * @addr: virtual start address
111 * @size: number of bytes to flush
113 * clflush is an unordered instruction which needs fencing with mfence
114 * to avoid ordering issues.
116 void clflush_cache_range(void *vaddr, unsigned int size)
118 void *vend = vaddr + size - 1;
122 for (; vaddr < vend; vaddr += boot_cpu_data.x86_clflush_size)
125 * Flush any possible final partial cacheline:
132 static void __cpa_flush_all(void *arg)
134 unsigned long cache = (unsigned long)arg;
137 * Flush all to work around Errata in early athlons regarding
138 * large page flushing.
142 if (cache && boot_cpu_data.x86_model >= 4)
146 static void cpa_flush_all(unsigned long cache)
148 BUG_ON(irqs_disabled());
150 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
153 static void __cpa_flush_range(void *arg)
156 * We could optimize that further and do individual per page
157 * tlb invalidates for a low number of pages. Caveat: we must
158 * flush the high aliases on 64bit as well.
163 static void cpa_flush_range(unsigned long start, int numpages, int cache)
165 unsigned int i, level;
168 BUG_ON(irqs_disabled());
169 WARN_ON(PAGE_ALIGN(start) != start);
171 on_each_cpu(__cpa_flush_range, NULL, 1);
177 * We only need to flush on one CPU,
178 * clflush is a MESI-coherent instruction that
179 * will cause all other CPUs to flush the same
182 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
183 pte_t *pte = lookup_address(addr, &level);
186 * Only flush present addresses:
188 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
189 clflush_cache_range((void *) addr, PAGE_SIZE);
194 * Certain areas of memory on x86 require very specific protection flags,
195 * for example the BIOS area or kernel text. Callers don't always get this
196 * right (again, ioremap() on BIOS memory is not uncommon) so this function
197 * checks and fixes these known static required protection bits.
199 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
202 pgprot_t forbidden = __pgprot(0);
205 * The BIOS area between 640k and 1Mb needs to be executable for
206 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
208 if (within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
209 pgprot_val(forbidden) |= _PAGE_NX;
212 * The kernel text needs to be executable for obvious reasons
213 * Does not cover __inittext since that is gone later on. On
214 * 64bit we do not enforce !NX on the low mapping
216 if (within(address, (unsigned long)_text, (unsigned long)_etext))
217 pgprot_val(forbidden) |= _PAGE_NX;
220 * The .rodata section needs to be read-only. Using the pfn
221 * catches all aliases.
223 if (within(pfn, __pa((unsigned long)__start_rodata) >> PAGE_SHIFT,
224 __pa((unsigned long)__end_rodata) >> PAGE_SHIFT))
225 pgprot_val(forbidden) |= _PAGE_RW;
227 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
233 * Lookup the page table entry for a virtual address. Return a pointer
234 * to the entry and the level of the mapping.
236 * Note: We return pud and pmd either when the entry is marked large
237 * or when the present bit is not set. Otherwise we would return a
238 * pointer to a nonexisting mapping.
240 pte_t *lookup_address(unsigned long address, unsigned int *level)
242 pgd_t *pgd = pgd_offset_k(address);
246 *level = PG_LEVEL_NONE;
251 pud = pud_offset(pgd, address);
255 *level = PG_LEVEL_1G;
256 if (pud_large(*pud) || !pud_present(*pud))
259 pmd = pmd_offset(pud, address);
263 *level = PG_LEVEL_2M;
264 if (pmd_large(*pmd) || !pmd_present(*pmd))
267 *level = PG_LEVEL_4K;
269 return pte_offset_kernel(pmd, address);
271 EXPORT_SYMBOL_GPL(lookup_address);
274 * Set the new pmd in all the pgds we know about:
276 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
279 set_pte_atomic(kpte, pte);
281 if (!SHARED_KERNEL_PMD) {
284 list_for_each_entry(page, &pgd_list, lru) {
289 pgd = (pgd_t *)page_address(page) + pgd_index(address);
290 pud = pud_offset(pgd, address);
291 pmd = pmd_offset(pud, address);
292 set_pte_atomic((pte_t *)pmd, pte);
299 try_preserve_large_page(pte_t *kpte, unsigned long address,
300 struct cpa_data *cpa)
302 unsigned long nextpage_addr, numpages, pmask, psize, flags, addr, pfn;
303 pte_t new_pte, old_pte, *tmp;
304 pgprot_t old_prot, new_prot;
308 if (cpa->force_split)
311 spin_lock_irqsave(&pgd_lock, flags);
313 * Check for races, another CPU might have split this page
316 tmp = lookup_address(address, &level);
322 psize = PMD_PAGE_SIZE;
323 pmask = PMD_PAGE_MASK;
327 psize = PUD_PAGE_SIZE;
328 pmask = PUD_PAGE_MASK;
337 * Calculate the number of pages, which fit into this large
338 * page starting at address:
340 nextpage_addr = (address + psize) & pmask;
341 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
342 if (numpages < cpa->numpages)
343 cpa->numpages = numpages;
346 * We are safe now. Check whether the new pgprot is the same:
349 old_prot = new_prot = pte_pgprot(old_pte);
351 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
352 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
355 * old_pte points to the large page base address. So we need
356 * to add the offset of the virtual address:
358 pfn = pte_pfn(old_pte) + ((address & (psize - 1)) >> PAGE_SHIFT);
361 new_prot = static_protections(new_prot, address, pfn);
364 * We need to check the full range, whether
365 * static_protection() requires a different pgprot for one of
366 * the pages in the range we try to preserve:
368 addr = address + PAGE_SIZE;
370 for (i = 1; i < cpa->numpages; i++, addr += PAGE_SIZE, pfn++) {
371 pgprot_t chk_prot = static_protections(new_prot, addr, pfn);
373 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
378 * If there are no changes, return. maxpages has been updated
381 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
387 * We need to change the attributes. Check, whether we can
388 * change the large page in one go. We request a split, when
389 * the address is not aligned and the number of pages is
390 * smaller than the number of pages in the large page. Note
391 * that we limited the number of possible pages already to
392 * the number of pages in the large page.
394 if (address == (nextpage_addr - psize) && cpa->numpages == numpages) {
396 * The address is aligned and the number of pages
397 * covers the full page.
399 new_pte = pfn_pte(pte_pfn(old_pte), canon_pgprot(new_prot));
400 __set_pmd_pte(kpte, address, new_pte);
406 spin_unlock_irqrestore(&pgd_lock, flags);
411 static LIST_HEAD(page_pool);
412 static unsigned long pool_size, pool_pages, pool_low;
413 static unsigned long pool_used, pool_failed;
415 static void cpa_fill_pool(struct page **ret)
417 gfp_t gfp = GFP_KERNEL;
422 * Avoid recursion (on debug-pagealloc) and also signal
423 * our priority to get to these pagetables:
425 if (current->flags & PF_MEMALLOC)
427 current->flags |= PF_MEMALLOC;
430 * Allocate atomically from atomic contexts:
432 if (in_atomic() || irqs_disabled() || debug_pagealloc)
433 gfp = GFP_ATOMIC | __GFP_NORETRY | __GFP_NOWARN;
435 while (pool_pages < pool_size || (ret && !*ret)) {
436 p = alloc_pages(gfp, 0);
442 * If the call site needs a page right now, provide it:
448 spin_lock_irqsave(&pgd_lock, flags);
449 list_add(&p->lru, &page_pool);
451 spin_unlock_irqrestore(&pgd_lock, flags);
454 current->flags &= ~PF_MEMALLOC;
457 #define SHIFT_MB (20 - PAGE_SHIFT)
458 #define ROUND_MB_GB ((1 << 10) - 1)
459 #define SHIFT_MB_GB 10
460 #define POOL_PAGES_PER_GB 16
462 void __init cpa_init(void)
469 * Calculate the number of pool pages:
471 * Convert totalram (nr of pages) to MiB and round to the next
472 * GiB. Shift MiB to Gib and multiply the result by
475 if (debug_pagealloc) {
476 gb = ((si.totalram >> SHIFT_MB) + ROUND_MB_GB) >> SHIFT_MB_GB;
477 pool_size = POOL_PAGES_PER_GB * gb;
481 pool_low = pool_size;
485 "CPA: page pool initialized %lu of %lu pages preallocated\n",
486 pool_pages, pool_size);
489 static int split_large_page(pte_t *kpte, unsigned long address)
491 unsigned long flags, pfn, pfninc = 1;
492 unsigned int i, level;
498 * Get a page from the pool. The pool list is protected by the
499 * pgd_lock, which we have to take anyway for the split
502 spin_lock_irqsave(&pgd_lock, flags);
503 if (list_empty(&page_pool)) {
504 spin_unlock_irqrestore(&pgd_lock, flags);
506 cpa_fill_pool(&base);
509 spin_lock_irqsave(&pgd_lock, flags);
511 base = list_first_entry(&page_pool, struct page, lru);
512 list_del(&base->lru);
515 if (pool_pages < pool_low)
516 pool_low = pool_pages;
520 * Check for races, another CPU might have split this page
523 tmp = lookup_address(address, &level);
527 pbase = (pte_t *)page_address(base);
528 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
529 ref_prot = pte_pgprot(pte_clrhuge(*kpte));
532 if (level == PG_LEVEL_1G) {
533 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
534 pgprot_val(ref_prot) |= _PAGE_PSE;
539 * Get the target pfn from the original entry:
541 pfn = pte_pfn(*kpte);
542 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
543 set_pte(&pbase[i], pfn_pte(pfn, ref_prot));
545 if (address >= (unsigned long)__va(0) &&
546 address < (unsigned long)__va(max_low_pfn_mapped << PAGE_SHIFT))
547 split_page_count(level);
550 if (address >= (unsigned long)__va(1UL<<32) &&
551 address < (unsigned long)__va(max_pfn_mapped << PAGE_SHIFT))
552 split_page_count(level);
556 * Install the new, split up pagetable. Important details here:
558 * On Intel the NX bit of all levels must be cleared to make a
559 * page executable. See section 4.13.2 of Intel 64 and IA-32
560 * Architectures Software Developer's Manual).
562 * Mark the entry present. The current mapping might be
563 * set to not present, which we preserved above.
565 ref_prot = pte_pgprot(pte_mkexec(pte_clrhuge(*kpte)));
566 pgprot_val(ref_prot) |= _PAGE_PRESENT;
567 __set_pmd_pte(kpte, address, mk_pte(base, ref_prot));
572 * If we dropped out via the lookup_address check under
573 * pgd_lock then stick the page back into the pool:
576 list_add(&base->lru, &page_pool);
580 spin_unlock_irqrestore(&pgd_lock, flags);
585 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
589 * Ignore all non primary paths.
595 * Ignore the NULL PTE for kernel identity mapping, as it is expected
597 * Also set numpages to '1' indicating that we processed cpa req for
598 * one virtual address page and its pfn. TBD: numpages can be set based
599 * on the initial value and the level returned by lookup_address().
601 if (within(vaddr, PAGE_OFFSET,
602 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
604 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
607 WARN(1, KERN_WARNING "CPA: called for zero pte. "
608 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
615 static int __change_page_attr(struct cpa_data *cpa, int primary)
617 unsigned long address = cpa->vaddr;
620 pte_t *kpte, old_pte;
623 * If we're called with lazy mmu updates enabled, the
624 * in-memory pte state may be stale. Flush pending updates to
625 * bring them up to date.
627 arch_flush_lazy_mmu_mode();
630 kpte = lookup_address(address, &level);
632 return __cpa_process_fault(cpa, address, primary);
635 if (!pte_val(old_pte))
636 return __cpa_process_fault(cpa, address, primary);
638 if (level == PG_LEVEL_4K) {
640 pgprot_t new_prot = pte_pgprot(old_pte);
641 unsigned long pfn = pte_pfn(old_pte);
643 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
644 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
646 new_prot = static_protections(new_prot, address, pfn);
649 * We need to keep the pfn from the existing PTE,
650 * after all we're only going to change it's attributes
651 * not the memory it points to
653 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
656 * Do we really change anything ?
658 if (pte_val(old_pte) != pte_val(new_pte)) {
659 set_pte_atomic(kpte, new_pte);
667 * Check, whether we can keep the large page intact
668 * and just change the pte:
670 do_split = try_preserve_large_page(kpte, address, cpa);
672 * When the range fits into the existing large page,
673 * return. cp->numpages and cpa->tlbflush have been updated in
680 * We have to split the large page:
682 err = split_large_page(kpte, address);
691 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
693 static int cpa_process_alias(struct cpa_data *cpa)
695 struct cpa_data alias_cpa;
698 if (cpa->pfn >= max_pfn_mapped)
702 if (cpa->pfn >= max_low_pfn_mapped && cpa->pfn < (1UL<<(32-PAGE_SHIFT)))
706 * No need to redo, when the primary call touched the direct
709 if (!(within(cpa->vaddr, PAGE_OFFSET,
710 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
713 alias_cpa.vaddr = (unsigned long) __va(cpa->pfn << PAGE_SHIFT);
715 ret = __change_page_attr_set_clr(&alias_cpa, 0);
722 * No need to redo, when the primary call touched the high
725 if (within(cpa->vaddr, (unsigned long) _text, (unsigned long) _end))
729 * If the physical address is inside the kernel map, we need
730 * to touch the high mapped kernel as well:
732 if (!within(cpa->pfn, highmap_start_pfn(), highmap_end_pfn()))
737 (cpa->pfn << PAGE_SHIFT) + __START_KERNEL_map - phys_base;
740 * The high mapping range is imprecise, so ignore the return value.
742 __change_page_attr_set_clr(&alias_cpa, 0);
747 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
749 int ret, numpages = cpa->numpages;
753 * Store the remaining nr of pages for the large page
754 * preservation check.
756 cpa->numpages = numpages;
758 ret = __change_page_attr(cpa, checkalias);
763 ret = cpa_process_alias(cpa);
769 * Adjust the number of pages with the result of the
770 * CPA operation. Either a large page has been
771 * preserved or a single page update happened.
773 BUG_ON(cpa->numpages > numpages);
774 numpages -= cpa->numpages;
775 cpa->vaddr += cpa->numpages * PAGE_SIZE;
780 static inline int cache_attr(pgprot_t attr)
782 return pgprot_val(attr) &
783 (_PAGE_PAT | _PAGE_PAT_LARGE | _PAGE_PWT | _PAGE_PCD);
786 static int change_page_attr_set_clr(unsigned long addr, int numpages,
787 pgprot_t mask_set, pgprot_t mask_clr,
791 int ret, cache, checkalias;
794 * Check, if we are requested to change a not supported
797 mask_set = canon_pgprot(mask_set);
798 mask_clr = canon_pgprot(mask_clr);
799 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
802 /* Ensure we are PAGE_SIZE aligned */
803 if (addr & ~PAGE_MASK) {
806 * People should not be passing in unaligned addresses:
812 cpa.numpages = numpages;
813 cpa.mask_set = mask_set;
814 cpa.mask_clr = mask_clr;
816 cpa.force_split = force_split;
818 /* No alias checking for _NX bit modifications */
819 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
821 ret = __change_page_attr_set_clr(&cpa, checkalias);
824 * Check whether we really changed something:
830 * No need to flush, when we did not set any of the caching
833 cache = cache_attr(mask_set);
836 * On success we use clflush, when the CPU supports it to
837 * avoid the wbindv. If the CPU does not support it and in the
838 * error case we fall back to cpa_flush_all (which uses
841 if (!ret && cpu_has_clflush)
842 cpa_flush_range(addr, numpages, cache);
844 cpa_flush_all(cache);
847 * If we've been called with lazy mmu updates enabled, then
848 * make sure that everything gets flushed out before we
851 arch_flush_lazy_mmu_mode();
859 static inline int change_page_attr_set(unsigned long addr, int numpages,
862 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0);
865 static inline int change_page_attr_clear(unsigned long addr, int numpages,
868 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0);
871 int _set_memory_uc(unsigned long addr, int numpages)
874 * for now UC MINUS. see comments in ioremap_nocache()
876 return change_page_attr_set(addr, numpages,
877 __pgprot(_PAGE_CACHE_UC_MINUS));
880 int set_memory_uc(unsigned long addr, int numpages)
883 * for now UC MINUS. see comments in ioremap_nocache()
885 if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
886 _PAGE_CACHE_UC_MINUS, NULL))
889 return _set_memory_uc(addr, numpages);
891 EXPORT_SYMBOL(set_memory_uc);
893 int _set_memory_wc(unsigned long addr, int numpages)
895 return change_page_attr_set(addr, numpages,
896 __pgprot(_PAGE_CACHE_WC));
899 int set_memory_wc(unsigned long addr, int numpages)
902 return set_memory_uc(addr, numpages);
904 if (reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
905 _PAGE_CACHE_WC, NULL))
908 return _set_memory_wc(addr, numpages);
910 EXPORT_SYMBOL(set_memory_wc);
912 int _set_memory_wb(unsigned long addr, int numpages)
914 return change_page_attr_clear(addr, numpages,
915 __pgprot(_PAGE_CACHE_MASK));
918 int set_memory_wb(unsigned long addr, int numpages)
920 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
922 return _set_memory_wb(addr, numpages);
924 EXPORT_SYMBOL(set_memory_wb);
926 int set_memory_x(unsigned long addr, int numpages)
928 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_NX));
930 EXPORT_SYMBOL(set_memory_x);
932 int set_memory_nx(unsigned long addr, int numpages)
934 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_NX));
936 EXPORT_SYMBOL(set_memory_nx);
938 int set_memory_ro(unsigned long addr, int numpages)
940 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_RW));
943 int set_memory_rw(unsigned long addr, int numpages)
945 return change_page_attr_set(addr, numpages, __pgprot(_PAGE_RW));
948 int set_memory_np(unsigned long addr, int numpages)
950 return change_page_attr_clear(addr, numpages, __pgprot(_PAGE_PRESENT));
953 int set_memory_4k(unsigned long addr, int numpages)
955 return change_page_attr_set_clr(addr, numpages, __pgprot(0),
959 int set_pages_uc(struct page *page, int numpages)
961 unsigned long addr = (unsigned long)page_address(page);
963 return set_memory_uc(addr, numpages);
965 EXPORT_SYMBOL(set_pages_uc);
967 int set_pages_wb(struct page *page, int numpages)
969 unsigned long addr = (unsigned long)page_address(page);
971 return set_memory_wb(addr, numpages);
973 EXPORT_SYMBOL(set_pages_wb);
975 int set_pages_x(struct page *page, int numpages)
977 unsigned long addr = (unsigned long)page_address(page);
979 return set_memory_x(addr, numpages);
981 EXPORT_SYMBOL(set_pages_x);
983 int set_pages_nx(struct page *page, int numpages)
985 unsigned long addr = (unsigned long)page_address(page);
987 return set_memory_nx(addr, numpages);
989 EXPORT_SYMBOL(set_pages_nx);
991 int set_pages_ro(struct page *page, int numpages)
993 unsigned long addr = (unsigned long)page_address(page);
995 return set_memory_ro(addr, numpages);
998 int set_pages_rw(struct page *page, int numpages)
1000 unsigned long addr = (unsigned long)page_address(page);
1002 return set_memory_rw(addr, numpages);
1005 #ifdef CONFIG_DEBUG_PAGEALLOC
1007 static int __set_pages_p(struct page *page, int numpages)
1009 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
1010 .numpages = numpages,
1011 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1012 .mask_clr = __pgprot(0)};
1014 return __change_page_attr_set_clr(&cpa, 1);
1017 static int __set_pages_np(struct page *page, int numpages)
1019 struct cpa_data cpa = { .vaddr = (unsigned long) page_address(page),
1020 .numpages = numpages,
1021 .mask_set = __pgprot(0),
1022 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW)};
1024 return __change_page_attr_set_clr(&cpa, 1);
1027 void kernel_map_pages(struct page *page, int numpages, int enable)
1029 if (PageHighMem(page))
1032 debug_check_no_locks_freed(page_address(page),
1033 numpages * PAGE_SIZE);
1037 * If page allocator is not up yet then do not call c_p_a():
1039 if (!debug_pagealloc_enabled)
1043 * The return value is ignored as the calls cannot fail.
1044 * Large pages are kept enabled at boot time, and are
1045 * split up quickly with DEBUG_PAGEALLOC. If a splitup
1046 * fails here (due to temporary memory shortage) no damage
1047 * is done because we just keep the largepage intact up
1048 * to the next attempt when it will likely be split up:
1051 __set_pages_p(page, numpages);
1053 __set_pages_np(page, numpages);
1056 * We should perform an IPI and flush all tlbs,
1057 * but that can deadlock->flush only current cpu:
1062 * Try to refill the page pool here. We can do this only after
1065 cpa_fill_pool(NULL);
1068 #ifdef CONFIG_DEBUG_FS
1069 static int dpa_show(struct seq_file *m, void *v)
1071 seq_puts(m, "DEBUG_PAGEALLOC\n");
1072 seq_printf(m, "pool_size : %lu\n", pool_size);
1073 seq_printf(m, "pool_pages : %lu\n", pool_pages);
1074 seq_printf(m, "pool_low : %lu\n", pool_low);
1075 seq_printf(m, "pool_used : %lu\n", pool_used);
1076 seq_printf(m, "pool_failed : %lu\n", pool_failed);
1081 static int dpa_open(struct inode *inode, struct file *filp)
1083 return single_open(filp, dpa_show, NULL);
1086 static const struct file_operations dpa_fops = {
1089 .llseek = seq_lseek,
1090 .release = single_release,
1093 static int __init debug_pagealloc_proc_init(void)
1097 de = debugfs_create_file("debug_pagealloc", 0600, NULL, NULL,
1104 __initcall(debug_pagealloc_proc_init);
1107 #ifdef CONFIG_HIBERNATION
1109 bool kernel_page_present(struct page *page)
1114 if (PageHighMem(page))
1117 pte = lookup_address((unsigned long)page_address(page), &level);
1118 return (pte_val(*pte) & _PAGE_PRESENT);
1121 #endif /* CONFIG_HIBERNATION */
1123 #endif /* CONFIG_DEBUG_PAGEALLOC */
1126 * The testcases use internal knowledge of the implementation that shouldn't
1127 * be exposed to the rest of the kernel. Include these directly here.
1129 #ifdef CONFIG_CPA_DEBUG
1130 #include "pageattr-test.c"