2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
112 { "largepages", VM_STAT(lpages) },
116 unsigned long segment_base(u16 selector)
118 struct descriptor_table gdt;
119 struct desc_struct *d;
120 unsigned long table_base;
126 asm("sgdt %0" : "=m"(gdt));
127 table_base = gdt.base;
129 if (selector & 4) { /* from ldt */
132 asm("sldt %0" : "=g"(ldt_selector));
133 table_base = segment_base(ldt_selector);
135 d = (struct desc_struct *)(table_base + (selector & ~7));
136 v = d->base0 | ((unsigned long)d->base1 << 16) |
137 ((unsigned long)d->base2 << 24);
139 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
140 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
144 EXPORT_SYMBOL_GPL(segment_base);
146 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 if (irqchip_in_kernel(vcpu->kvm))
149 return vcpu->arch.apic_base;
151 return vcpu->arch.apic_base;
153 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 /* TODO: reserve bits check */
158 if (irqchip_in_kernel(vcpu->kvm))
159 kvm_lapic_set_base(vcpu, data);
161 vcpu->arch.apic_base = data;
163 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 WARN_ON(vcpu->arch.exception.pending);
168 vcpu->arch.exception.pending = true;
169 vcpu->arch.exception.has_error_code = false;
170 vcpu->arch.exception.nr = nr;
172 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
177 ++vcpu->stat.pf_guest;
179 if (vcpu->arch.exception.pending) {
180 if (vcpu->arch.exception.nr == PF_VECTOR) {
181 printk(KERN_DEBUG "kvm: inject_page_fault:"
182 " double fault 0x%lx\n", addr);
183 vcpu->arch.exception.nr = DF_VECTOR;
184 vcpu->arch.exception.error_code = 0;
185 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
186 /* triple fault -> shutdown */
187 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
191 vcpu->arch.cr2 = addr;
192 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
195 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 vcpu->arch.nmi_pending = 1;
199 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 WARN_ON(vcpu->arch.exception.pending);
204 vcpu->arch.exception.pending = true;
205 vcpu->arch.exception.has_error_code = true;
206 vcpu->arch.exception.nr = nr;
207 vcpu->arch.exception.error_code = error_code;
209 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211 static void __queue_exception(struct kvm_vcpu *vcpu)
213 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
214 vcpu->arch.exception.has_error_code,
215 vcpu->arch.exception.error_code);
219 * Load the pae pdptrs. Return true is they are all valid.
221 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
223 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
224 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
227 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
229 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
230 offset * sizeof(u64), sizeof(pdpte));
235 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
236 if (is_present_pte(pdpte[i]) &&
237 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
249 EXPORT_SYMBOL_GPL(load_pdptrs);
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
315 kvm_inject_gp(vcpu, 0);
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
324 kvm_mmu_reset_context(vcpu);
327 EXPORT_SYMBOL_GPL(kvm_set_cr0);
329 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
331 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
332 KVMTRACE_1D(LMSW, vcpu,
333 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
336 EXPORT_SYMBOL_GPL(kvm_lmsw);
338 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
340 unsigned long old_cr4 = vcpu->arch.cr4;
341 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
343 if (cr4 & CR4_RESERVED_BITS) {
344 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
345 kvm_inject_gp(vcpu, 0);
349 if (is_long_mode(vcpu)) {
350 if (!(cr4 & X86_CR4_PAE)) {
351 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
353 kvm_inject_gp(vcpu, 0);
356 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
357 && ((cr4 ^ old_cr4) & pdptr_bits)
358 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
359 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
360 kvm_inject_gp(vcpu, 0);
364 if (cr4 & X86_CR4_VMXE) {
365 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
366 kvm_inject_gp(vcpu, 0);
369 kvm_x86_ops->set_cr4(vcpu, cr4);
370 vcpu->arch.cr4 = cr4;
371 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
372 kvm_mmu_reset_context(vcpu);
374 EXPORT_SYMBOL_GPL(kvm_set_cr4);
376 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
378 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
379 kvm_mmu_sync_roots(vcpu);
380 kvm_mmu_flush_tlb(vcpu);
384 if (is_long_mode(vcpu)) {
385 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
386 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
387 kvm_inject_gp(vcpu, 0);
392 if (cr3 & CR3_PAE_RESERVED_BITS) {
394 "set_cr3: #GP, reserved bits\n");
395 kvm_inject_gp(vcpu, 0);
398 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
399 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
401 kvm_inject_gp(vcpu, 0);
406 * We don't check reserved bits in nonpae mode, because
407 * this isn't enforced, and VMware depends on this.
412 * Does the new cr3 value map to physical memory? (Note, we
413 * catch an invalid cr3 even in real-mode, because it would
414 * cause trouble later on when we turn on paging anyway.)
416 * A real CPU would silently accept an invalid cr3 and would
417 * attempt to use it - with largely undefined (and often hard
418 * to debug) behavior on the guest side.
420 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
421 kvm_inject_gp(vcpu, 0);
423 vcpu->arch.cr3 = cr3;
424 vcpu->arch.mmu.new_cr3(vcpu);
427 EXPORT_SYMBOL_GPL(kvm_set_cr3);
429 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
431 if (cr8 & CR8_RESERVED_BITS) {
432 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
433 kvm_inject_gp(vcpu, 0);
436 if (irqchip_in_kernel(vcpu->kvm))
437 kvm_lapic_set_tpr(vcpu, cr8);
439 vcpu->arch.cr8 = cr8;
441 EXPORT_SYMBOL_GPL(kvm_set_cr8);
443 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
445 if (irqchip_in_kernel(vcpu->kvm))
446 return kvm_lapic_get_cr8(vcpu);
448 return vcpu->arch.cr8;
450 EXPORT_SYMBOL_GPL(kvm_get_cr8);
452 static inline u32 bit(int bitno)
454 return 1 << (bitno & 31);
458 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
459 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
461 * This list is modified at module load time to reflect the
462 * capabilities of the host cpu.
464 static u32 msrs_to_save[] = {
465 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
468 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
470 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
471 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
474 static unsigned num_msrs_to_save;
476 static u32 emulated_msrs[] = {
477 MSR_IA32_MISC_ENABLE,
480 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
482 if (efer & efer_reserved_bits) {
483 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
485 kvm_inject_gp(vcpu, 0);
490 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
491 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
492 kvm_inject_gp(vcpu, 0);
496 if (efer & EFER_FFXSR) {
497 struct kvm_cpuid_entry2 *feat;
499 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
500 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
501 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
502 kvm_inject_gp(vcpu, 0);
507 if (efer & EFER_SVME) {
508 struct kvm_cpuid_entry2 *feat;
510 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
511 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
512 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
513 kvm_inject_gp(vcpu, 0);
518 kvm_x86_ops->set_efer(vcpu, efer);
521 efer |= vcpu->arch.shadow_efer & EFER_LMA;
523 vcpu->arch.shadow_efer = efer;
525 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
526 kvm_mmu_reset_context(vcpu);
529 void kvm_enable_efer_bits(u64 mask)
531 efer_reserved_bits &= ~mask;
533 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
537 * Writes msr value into into the appropriate "register".
538 * Returns 0 on success, non-0 otherwise.
539 * Assumes vcpu_load() was already called.
541 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
543 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
547 * Adapt set_msr() to msr_io()'s calling convention
549 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
551 return kvm_set_msr(vcpu, index, *data);
554 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
557 struct pvclock_wall_clock wc;
558 struct timespec now, sys, boot;
565 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
568 * The guest calculates current wall clock time by adding
569 * system time (updated by kvm_write_guest_time below) to the
570 * wall clock specified here. guest system time equals host
571 * system time for us, thus we must fill in host boot time here.
573 now = current_kernel_time();
575 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
577 wc.sec = boot.tv_sec;
578 wc.nsec = boot.tv_nsec;
579 wc.version = version;
581 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
584 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
587 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
589 uint32_t quotient, remainder;
591 /* Don't try to replace with do_div(), this one calculates
592 * "(dividend << 32) / divisor" */
594 : "=a" (quotient), "=d" (remainder)
595 : "0" (0), "1" (dividend), "r" (divisor) );
599 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
601 uint64_t nsecs = 1000000000LL;
606 tps64 = tsc_khz * 1000LL;
607 while (tps64 > nsecs*2) {
612 tps32 = (uint32_t)tps64;
613 while (tps32 <= (uint32_t)nsecs) {
618 hv_clock->tsc_shift = shift;
619 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
621 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
622 __func__, tsc_khz, hv_clock->tsc_shift,
623 hv_clock->tsc_to_system_mul);
626 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
628 static void kvm_write_guest_time(struct kvm_vcpu *v)
632 struct kvm_vcpu_arch *vcpu = &v->arch;
634 unsigned long this_tsc_khz;
636 if ((!vcpu->time_page))
639 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
640 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
641 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
642 vcpu->hv_clock_tsc_khz = this_tsc_khz;
644 put_cpu_var(cpu_tsc_khz);
646 /* Keep irq disabled to prevent changes to the clock */
647 local_irq_save(flags);
648 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
649 &vcpu->hv_clock.tsc_timestamp);
651 local_irq_restore(flags);
653 /* With all the info we got, fill in the values */
655 vcpu->hv_clock.system_time = ts.tv_nsec +
656 (NSEC_PER_SEC * (u64)ts.tv_sec);
658 * The interface expects us to write an even number signaling that the
659 * update is finished. Since the guest won't see the intermediate
660 * state, we just increase by 2 at the end.
662 vcpu->hv_clock.version += 2;
664 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
666 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
667 sizeof(vcpu->hv_clock));
669 kunmap_atomic(shared_kaddr, KM_USER0);
671 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
674 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
676 struct kvm_vcpu_arch *vcpu = &v->arch;
678 if (!vcpu->time_page)
680 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
684 static bool msr_mtrr_valid(unsigned msr)
687 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
688 case MSR_MTRRfix64K_00000:
689 case MSR_MTRRfix16K_80000:
690 case MSR_MTRRfix16K_A0000:
691 case MSR_MTRRfix4K_C0000:
692 case MSR_MTRRfix4K_C8000:
693 case MSR_MTRRfix4K_D0000:
694 case MSR_MTRRfix4K_D8000:
695 case MSR_MTRRfix4K_E0000:
696 case MSR_MTRRfix4K_E8000:
697 case MSR_MTRRfix4K_F0000:
698 case MSR_MTRRfix4K_F8000:
699 case MSR_MTRRdefType:
700 case MSR_IA32_CR_PAT:
708 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
710 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
712 if (!msr_mtrr_valid(msr))
715 if (msr == MSR_MTRRdefType) {
716 vcpu->arch.mtrr_state.def_type = data;
717 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
718 } else if (msr == MSR_MTRRfix64K_00000)
720 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
721 p[1 + msr - MSR_MTRRfix16K_80000] = data;
722 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
723 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
724 else if (msr == MSR_IA32_CR_PAT)
725 vcpu->arch.pat = data;
726 else { /* Variable MTRRs */
727 int idx, is_mtrr_mask;
730 idx = (msr - 0x200) / 2;
731 is_mtrr_mask = msr - 0x200 - 2 * idx;
734 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
737 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
741 kvm_mmu_reset_context(vcpu);
745 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
749 set_efer(vcpu, data);
751 case MSR_IA32_MC0_STATUS:
752 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
755 case MSR_IA32_MCG_STATUS:
756 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
759 case MSR_IA32_MCG_CTL:
760 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
763 case MSR_IA32_DEBUGCTLMSR:
765 /* We support the non-activated case already */
767 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
768 /* Values other than LBR and BTF are vendor-specific,
769 thus reserved and should throw a #GP */
772 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
775 case MSR_IA32_UCODE_REV:
776 case MSR_IA32_UCODE_WRITE:
777 case MSR_VM_HSAVE_PA:
779 case 0x200 ... 0x2ff:
780 return set_msr_mtrr(vcpu, msr, data);
781 case MSR_IA32_APICBASE:
782 kvm_set_apic_base(vcpu, data);
784 case MSR_IA32_MISC_ENABLE:
785 vcpu->arch.ia32_misc_enable_msr = data;
787 case MSR_KVM_WALL_CLOCK:
788 vcpu->kvm->arch.wall_clock = data;
789 kvm_write_wall_clock(vcpu->kvm, data);
791 case MSR_KVM_SYSTEM_TIME: {
792 if (vcpu->arch.time_page) {
793 kvm_release_page_dirty(vcpu->arch.time_page);
794 vcpu->arch.time_page = NULL;
797 vcpu->arch.time = data;
799 /* we verify if the enable bit is set... */
803 /* ...but clean it before doing the actual write */
804 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
806 vcpu->arch.time_page =
807 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
809 if (is_error_page(vcpu->arch.time_page)) {
810 kvm_release_page_clean(vcpu->arch.time_page);
811 vcpu->arch.time_page = NULL;
814 kvm_request_guest_time_update(vcpu);
818 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
823 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
827 * Reads an msr value (of 'msr_index') into 'pdata'.
828 * Returns 0 on success, non-0 otherwise.
829 * Assumes vcpu_load() was already called.
831 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
833 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
836 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
838 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
840 if (!msr_mtrr_valid(msr))
843 if (msr == MSR_MTRRdefType)
844 *pdata = vcpu->arch.mtrr_state.def_type +
845 (vcpu->arch.mtrr_state.enabled << 10);
846 else if (msr == MSR_MTRRfix64K_00000)
848 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
849 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
850 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
851 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
852 else if (msr == MSR_IA32_CR_PAT)
853 *pdata = vcpu->arch.pat;
854 else { /* Variable MTRRs */
855 int idx, is_mtrr_mask;
858 idx = (msr - 0x200) / 2;
859 is_mtrr_mask = msr - 0x200 - 2 * idx;
862 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
865 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
872 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
877 case 0xc0010010: /* SYSCFG */
878 case 0xc0010015: /* HWCR */
879 case MSR_IA32_PLATFORM_ID:
880 case MSR_IA32_P5_MC_ADDR:
881 case MSR_IA32_P5_MC_TYPE:
882 case MSR_IA32_MC0_CTL:
883 case MSR_IA32_MCG_STATUS:
884 case MSR_IA32_MCG_CAP:
885 case MSR_IA32_MCG_CTL:
886 case MSR_IA32_MC0_MISC:
887 case MSR_IA32_MC0_MISC+4:
888 case MSR_IA32_MC0_MISC+8:
889 case MSR_IA32_MC0_MISC+12:
890 case MSR_IA32_MC0_MISC+16:
891 case MSR_IA32_MC0_MISC+20:
892 case MSR_IA32_UCODE_REV:
893 case MSR_IA32_EBL_CR_POWERON:
894 case MSR_IA32_DEBUGCTLMSR:
895 case MSR_IA32_LASTBRANCHFROMIP:
896 case MSR_IA32_LASTBRANCHTOIP:
897 case MSR_IA32_LASTINTFROMIP:
898 case MSR_IA32_LASTINTTOIP:
899 case MSR_VM_HSAVE_PA:
900 case MSR_P6_EVNTSEL0:
901 case MSR_P6_EVNTSEL1:
905 data = 0x500 | KVM_NR_VAR_MTRR;
907 case 0x200 ... 0x2ff:
908 return get_msr_mtrr(vcpu, msr, pdata);
909 case 0xcd: /* fsb frequency */
912 case MSR_IA32_APICBASE:
913 data = kvm_get_apic_base(vcpu);
915 case MSR_IA32_MISC_ENABLE:
916 data = vcpu->arch.ia32_misc_enable_msr;
918 case MSR_IA32_PERF_STATUS:
919 /* TSC increment by tick */
922 data |= (((uint64_t)4ULL) << 40);
925 data = vcpu->arch.shadow_efer;
927 case MSR_KVM_WALL_CLOCK:
928 data = vcpu->kvm->arch.wall_clock;
930 case MSR_KVM_SYSTEM_TIME:
931 data = vcpu->arch.time;
934 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
940 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
943 * Read or write a bunch of msrs. All parameters are kernel addresses.
945 * @return number of msrs set successfully.
947 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
948 struct kvm_msr_entry *entries,
949 int (*do_msr)(struct kvm_vcpu *vcpu,
950 unsigned index, u64 *data))
956 down_read(&vcpu->kvm->slots_lock);
957 for (i = 0; i < msrs->nmsrs; ++i)
958 if (do_msr(vcpu, entries[i].index, &entries[i].data))
960 up_read(&vcpu->kvm->slots_lock);
968 * Read or write a bunch of msrs. Parameters are user addresses.
970 * @return number of msrs set successfully.
972 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
973 int (*do_msr)(struct kvm_vcpu *vcpu,
974 unsigned index, u64 *data),
977 struct kvm_msrs msrs;
978 struct kvm_msr_entry *entries;
983 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
987 if (msrs.nmsrs >= MAX_IO_MSRS)
991 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
992 entries = vmalloc(size);
997 if (copy_from_user(entries, user_msrs->entries, size))
1000 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1005 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1016 int kvm_dev_ioctl_check_extension(long ext)
1021 case KVM_CAP_IRQCHIP:
1023 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1024 case KVM_CAP_SET_TSS_ADDR:
1025 case KVM_CAP_EXT_CPUID:
1026 case KVM_CAP_CLOCKSOURCE:
1028 case KVM_CAP_NOP_IO_DELAY:
1029 case KVM_CAP_MP_STATE:
1030 case KVM_CAP_SYNC_MMU:
1031 case KVM_CAP_REINJECT_CONTROL:
1032 case KVM_CAP_IRQ_INJECT_STATUS:
1033 case KVM_CAP_ASSIGN_DEV_IRQ:
1036 case KVM_CAP_COALESCED_MMIO:
1037 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1040 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1042 case KVM_CAP_NR_VCPUS:
1045 case KVM_CAP_NR_MEMSLOTS:
1046 r = KVM_MEMORY_SLOTS;
1048 case KVM_CAP_PV_MMU:
1062 long kvm_arch_dev_ioctl(struct file *filp,
1063 unsigned int ioctl, unsigned long arg)
1065 void __user *argp = (void __user *)arg;
1069 case KVM_GET_MSR_INDEX_LIST: {
1070 struct kvm_msr_list __user *user_msr_list = argp;
1071 struct kvm_msr_list msr_list;
1075 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1078 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1079 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1082 if (n < num_msrs_to_save)
1085 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1086 num_msrs_to_save * sizeof(u32)))
1088 if (copy_to_user(user_msr_list->indices
1089 + num_msrs_to_save * sizeof(u32),
1091 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1096 case KVM_GET_SUPPORTED_CPUID: {
1097 struct kvm_cpuid2 __user *cpuid_arg = argp;
1098 struct kvm_cpuid2 cpuid;
1101 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1103 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1104 cpuid_arg->entries);
1109 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1121 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1123 kvm_x86_ops->vcpu_load(vcpu, cpu);
1124 kvm_request_guest_time_update(vcpu);
1127 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1129 kvm_x86_ops->vcpu_put(vcpu);
1130 kvm_put_guest_fpu(vcpu);
1133 static int is_efer_nx(void)
1135 unsigned long long efer = 0;
1137 rdmsrl_safe(MSR_EFER, &efer);
1138 return efer & EFER_NX;
1141 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1144 struct kvm_cpuid_entry2 *e, *entry;
1147 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1148 e = &vcpu->arch.cpuid_entries[i];
1149 if (e->function == 0x80000001) {
1154 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1155 entry->edx &= ~(1 << 20);
1156 printk(KERN_INFO "kvm: guest NX capability removed\n");
1160 /* when an old userspace process fills a new kernel module */
1161 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1162 struct kvm_cpuid *cpuid,
1163 struct kvm_cpuid_entry __user *entries)
1166 struct kvm_cpuid_entry *cpuid_entries;
1169 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1172 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1176 if (copy_from_user(cpuid_entries, entries,
1177 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1179 for (i = 0; i < cpuid->nent; i++) {
1180 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1181 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1182 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1183 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1184 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1185 vcpu->arch.cpuid_entries[i].index = 0;
1186 vcpu->arch.cpuid_entries[i].flags = 0;
1187 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1188 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1189 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1191 vcpu->arch.cpuid_nent = cpuid->nent;
1192 cpuid_fix_nx_cap(vcpu);
1196 vfree(cpuid_entries);
1201 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1202 struct kvm_cpuid2 *cpuid,
1203 struct kvm_cpuid_entry2 __user *entries)
1208 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1211 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1212 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1214 vcpu->arch.cpuid_nent = cpuid->nent;
1221 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1222 struct kvm_cpuid2 *cpuid,
1223 struct kvm_cpuid_entry2 __user *entries)
1228 if (cpuid->nent < vcpu->arch.cpuid_nent)
1231 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1232 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1237 cpuid->nent = vcpu->arch.cpuid_nent;
1241 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1244 entry->function = function;
1245 entry->index = index;
1246 cpuid_count(entry->function, entry->index,
1247 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1251 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1252 u32 index, int *nent, int maxnent)
1254 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1255 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1256 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1257 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1258 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1259 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1260 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1261 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1262 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1263 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1264 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1265 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1266 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1267 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1268 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1269 bit(X86_FEATURE_PGE) |
1270 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1271 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1272 bit(X86_FEATURE_SYSCALL) |
1273 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1274 #ifdef CONFIG_X86_64
1275 bit(X86_FEATURE_LM) |
1277 bit(X86_FEATURE_FXSR_OPT) |
1278 bit(X86_FEATURE_MMXEXT) |
1279 bit(X86_FEATURE_3DNOWEXT) |
1280 bit(X86_FEATURE_3DNOW);
1281 const u32 kvm_supported_word3_x86_features =
1282 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1283 const u32 kvm_supported_word6_x86_features =
1284 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1285 bit(X86_FEATURE_SVM);
1287 /* all calls to cpuid_count() should be made on the same cpu */
1289 do_cpuid_1_ent(entry, function, index);
1294 entry->eax = min(entry->eax, (u32)0xb);
1297 entry->edx &= kvm_supported_word0_x86_features;
1298 entry->ecx &= kvm_supported_word3_x86_features;
1300 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1301 * may return different values. This forces us to get_cpu() before
1302 * issuing the first command, and also to emulate this annoying behavior
1303 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1305 int t, times = entry->eax & 0xff;
1307 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1308 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1309 for (t = 1; t < times && *nent < maxnent; ++t) {
1310 do_cpuid_1_ent(&entry[t], function, 0);
1311 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1316 /* function 4 and 0xb have additional index. */
1320 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1321 /* read more entries until cache_type is zero */
1322 for (i = 1; *nent < maxnent; ++i) {
1323 cache_type = entry[i - 1].eax & 0x1f;
1326 do_cpuid_1_ent(&entry[i], function, i);
1328 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1336 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1337 /* read more entries until level_type is zero */
1338 for (i = 1; *nent < maxnent; ++i) {
1339 level_type = entry[i - 1].ecx & 0xff00;
1342 do_cpuid_1_ent(&entry[i], function, i);
1344 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1350 entry->eax = min(entry->eax, 0x8000001a);
1353 entry->edx &= kvm_supported_word1_x86_features;
1354 entry->ecx &= kvm_supported_word6_x86_features;
1360 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1361 struct kvm_cpuid_entry2 __user *entries)
1363 struct kvm_cpuid_entry2 *cpuid_entries;
1364 int limit, nent = 0, r = -E2BIG;
1367 if (cpuid->nent < 1)
1370 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1374 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1375 limit = cpuid_entries[0].eax;
1376 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1377 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1378 &nent, cpuid->nent);
1380 if (nent >= cpuid->nent)
1383 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1384 limit = cpuid_entries[nent - 1].eax;
1385 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1386 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1387 &nent, cpuid->nent);
1389 if (copy_to_user(entries, cpuid_entries,
1390 nent * sizeof(struct kvm_cpuid_entry2)))
1396 vfree(cpuid_entries);
1401 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1402 struct kvm_lapic_state *s)
1405 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1411 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1412 struct kvm_lapic_state *s)
1415 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1416 kvm_apic_post_state_restore(vcpu);
1422 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1423 struct kvm_interrupt *irq)
1425 if (irq->irq < 0 || irq->irq >= 256)
1427 if (irqchip_in_kernel(vcpu->kvm))
1431 set_bit(irq->irq, vcpu->arch.irq_pending);
1432 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1439 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1442 kvm_inject_nmi(vcpu);
1448 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1449 struct kvm_tpr_access_ctl *tac)
1453 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1457 long kvm_arch_vcpu_ioctl(struct file *filp,
1458 unsigned int ioctl, unsigned long arg)
1460 struct kvm_vcpu *vcpu = filp->private_data;
1461 void __user *argp = (void __user *)arg;
1463 struct kvm_lapic_state *lapic = NULL;
1466 case KVM_GET_LAPIC: {
1467 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1472 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1476 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1481 case KVM_SET_LAPIC: {
1482 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1487 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1489 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1495 case KVM_INTERRUPT: {
1496 struct kvm_interrupt irq;
1499 if (copy_from_user(&irq, argp, sizeof irq))
1501 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1508 r = kvm_vcpu_ioctl_nmi(vcpu);
1514 case KVM_SET_CPUID: {
1515 struct kvm_cpuid __user *cpuid_arg = argp;
1516 struct kvm_cpuid cpuid;
1519 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1521 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1526 case KVM_SET_CPUID2: {
1527 struct kvm_cpuid2 __user *cpuid_arg = argp;
1528 struct kvm_cpuid2 cpuid;
1531 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1533 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1534 cpuid_arg->entries);
1539 case KVM_GET_CPUID2: {
1540 struct kvm_cpuid2 __user *cpuid_arg = argp;
1541 struct kvm_cpuid2 cpuid;
1544 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1546 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1547 cpuid_arg->entries);
1551 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1557 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1560 r = msr_io(vcpu, argp, do_set_msr, 0);
1562 case KVM_TPR_ACCESS_REPORTING: {
1563 struct kvm_tpr_access_ctl tac;
1566 if (copy_from_user(&tac, argp, sizeof tac))
1568 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1572 if (copy_to_user(argp, &tac, sizeof tac))
1577 case KVM_SET_VAPIC_ADDR: {
1578 struct kvm_vapic_addr va;
1581 if (!irqchip_in_kernel(vcpu->kvm))
1584 if (copy_from_user(&va, argp, sizeof va))
1587 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1598 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1602 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1604 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1608 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1609 u32 kvm_nr_mmu_pages)
1611 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1614 down_write(&kvm->slots_lock);
1616 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1617 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1619 up_write(&kvm->slots_lock);
1623 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1625 return kvm->arch.n_alloc_mmu_pages;
1628 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1631 struct kvm_mem_alias *alias;
1633 for (i = 0; i < kvm->arch.naliases; ++i) {
1634 alias = &kvm->arch.aliases[i];
1635 if (gfn >= alias->base_gfn
1636 && gfn < alias->base_gfn + alias->npages)
1637 return alias->target_gfn + gfn - alias->base_gfn;
1643 * Set a new alias region. Aliases map a portion of physical memory into
1644 * another portion. This is useful for memory windows, for example the PC
1647 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1648 struct kvm_memory_alias *alias)
1651 struct kvm_mem_alias *p;
1654 /* General sanity checks */
1655 if (alias->memory_size & (PAGE_SIZE - 1))
1657 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1659 if (alias->slot >= KVM_ALIAS_SLOTS)
1661 if (alias->guest_phys_addr + alias->memory_size
1662 < alias->guest_phys_addr)
1664 if (alias->target_phys_addr + alias->memory_size
1665 < alias->target_phys_addr)
1668 down_write(&kvm->slots_lock);
1669 spin_lock(&kvm->mmu_lock);
1671 p = &kvm->arch.aliases[alias->slot];
1672 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1673 p->npages = alias->memory_size >> PAGE_SHIFT;
1674 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1676 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1677 if (kvm->arch.aliases[n - 1].npages)
1679 kvm->arch.naliases = n;
1681 spin_unlock(&kvm->mmu_lock);
1682 kvm_mmu_zap_all(kvm);
1684 up_write(&kvm->slots_lock);
1692 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1697 switch (chip->chip_id) {
1698 case KVM_IRQCHIP_PIC_MASTER:
1699 memcpy(&chip->chip.pic,
1700 &pic_irqchip(kvm)->pics[0],
1701 sizeof(struct kvm_pic_state));
1703 case KVM_IRQCHIP_PIC_SLAVE:
1704 memcpy(&chip->chip.pic,
1705 &pic_irqchip(kvm)->pics[1],
1706 sizeof(struct kvm_pic_state));
1708 case KVM_IRQCHIP_IOAPIC:
1709 memcpy(&chip->chip.ioapic,
1710 ioapic_irqchip(kvm),
1711 sizeof(struct kvm_ioapic_state));
1720 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1725 switch (chip->chip_id) {
1726 case KVM_IRQCHIP_PIC_MASTER:
1727 memcpy(&pic_irqchip(kvm)->pics[0],
1729 sizeof(struct kvm_pic_state));
1731 case KVM_IRQCHIP_PIC_SLAVE:
1732 memcpy(&pic_irqchip(kvm)->pics[1],
1734 sizeof(struct kvm_pic_state));
1736 case KVM_IRQCHIP_IOAPIC:
1737 memcpy(ioapic_irqchip(kvm),
1739 sizeof(struct kvm_ioapic_state));
1745 kvm_pic_update_irq(pic_irqchip(kvm));
1749 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1753 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1757 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1761 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1762 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1766 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1767 struct kvm_reinject_control *control)
1769 if (!kvm->arch.vpit)
1771 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1776 * Get (and clear) the dirty memory log for a memory slot.
1778 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1779 struct kvm_dirty_log *log)
1783 struct kvm_memory_slot *memslot;
1786 down_write(&kvm->slots_lock);
1788 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1792 /* If nothing is dirty, don't bother messing with page tables. */
1794 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1795 kvm_flush_remote_tlbs(kvm);
1796 memslot = &kvm->memslots[log->slot];
1797 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1798 memset(memslot->dirty_bitmap, 0, n);
1802 up_write(&kvm->slots_lock);
1806 long kvm_arch_vm_ioctl(struct file *filp,
1807 unsigned int ioctl, unsigned long arg)
1809 struct kvm *kvm = filp->private_data;
1810 void __user *argp = (void __user *)arg;
1813 * This union makes it completely explicit to gcc-3.x
1814 * that these two variables' stack usage should be
1815 * combined, not added together.
1818 struct kvm_pit_state ps;
1819 struct kvm_memory_alias alias;
1823 case KVM_SET_TSS_ADDR:
1824 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1828 case KVM_SET_MEMORY_REGION: {
1829 struct kvm_memory_region kvm_mem;
1830 struct kvm_userspace_memory_region kvm_userspace_mem;
1833 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1835 kvm_userspace_mem.slot = kvm_mem.slot;
1836 kvm_userspace_mem.flags = kvm_mem.flags;
1837 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1838 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1839 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1844 case KVM_SET_NR_MMU_PAGES:
1845 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1849 case KVM_GET_NR_MMU_PAGES:
1850 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1852 case KVM_SET_MEMORY_ALIAS:
1854 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1856 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1860 case KVM_CREATE_IRQCHIP:
1862 kvm->arch.vpic = kvm_create_pic(kvm);
1863 if (kvm->arch.vpic) {
1864 r = kvm_ioapic_init(kvm);
1866 kfree(kvm->arch.vpic);
1867 kvm->arch.vpic = NULL;
1872 r = kvm_setup_default_irq_routing(kvm);
1874 kfree(kvm->arch.vpic);
1875 kfree(kvm->arch.vioapic);
1879 case KVM_CREATE_PIT:
1880 mutex_lock(&kvm->lock);
1883 goto create_pit_unlock;
1885 kvm->arch.vpit = kvm_create_pit(kvm);
1889 mutex_unlock(&kvm->lock);
1891 case KVM_IRQ_LINE_STATUS:
1892 case KVM_IRQ_LINE: {
1893 struct kvm_irq_level irq_event;
1896 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1898 if (irqchip_in_kernel(kvm)) {
1900 mutex_lock(&kvm->lock);
1901 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1902 irq_event.irq, irq_event.level);
1903 mutex_unlock(&kvm->lock);
1904 if (ioctl == KVM_IRQ_LINE_STATUS) {
1905 irq_event.status = status;
1906 if (copy_to_user(argp, &irq_event,
1914 case KVM_GET_IRQCHIP: {
1915 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1916 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1922 if (copy_from_user(chip, argp, sizeof *chip))
1923 goto get_irqchip_out;
1925 if (!irqchip_in_kernel(kvm))
1926 goto get_irqchip_out;
1927 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1929 goto get_irqchip_out;
1931 if (copy_to_user(argp, chip, sizeof *chip))
1932 goto get_irqchip_out;
1940 case KVM_SET_IRQCHIP: {
1941 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1942 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1948 if (copy_from_user(chip, argp, sizeof *chip))
1949 goto set_irqchip_out;
1951 if (!irqchip_in_kernel(kvm))
1952 goto set_irqchip_out;
1953 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1955 goto set_irqchip_out;
1965 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1968 if (!kvm->arch.vpit)
1970 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1974 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1981 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1984 if (!kvm->arch.vpit)
1986 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1992 case KVM_REINJECT_CONTROL: {
1993 struct kvm_reinject_control control;
1995 if (copy_from_user(&control, argp, sizeof(control)))
1997 r = kvm_vm_ioctl_reinject(kvm, &control);
2010 static void kvm_init_msr_list(void)
2015 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2016 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2019 msrs_to_save[j] = msrs_to_save[i];
2022 num_msrs_to_save = j;
2026 * Only apic need an MMIO device hook, so shortcut now..
2028 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2029 gpa_t addr, int len,
2032 struct kvm_io_device *dev;
2034 if (vcpu->arch.apic) {
2035 dev = &vcpu->arch.apic->dev;
2036 if (dev->in_range(dev, addr, len, is_write))
2043 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2044 gpa_t addr, int len,
2047 struct kvm_io_device *dev;
2049 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2051 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2056 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2057 struct kvm_vcpu *vcpu)
2060 int r = X86EMUL_CONTINUE;
2063 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2064 unsigned offset = addr & (PAGE_SIZE-1);
2065 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2068 if (gpa == UNMAPPED_GVA) {
2069 r = X86EMUL_PROPAGATE_FAULT;
2072 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2074 r = X86EMUL_UNHANDLEABLE;
2086 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2087 struct kvm_vcpu *vcpu)
2090 int r = X86EMUL_CONTINUE;
2093 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2094 unsigned offset = addr & (PAGE_SIZE-1);
2095 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2098 if (gpa == UNMAPPED_GVA) {
2099 r = X86EMUL_PROPAGATE_FAULT;
2102 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2104 r = X86EMUL_UNHANDLEABLE;
2117 static int emulator_read_emulated(unsigned long addr,
2120 struct kvm_vcpu *vcpu)
2122 struct kvm_io_device *mmio_dev;
2125 if (vcpu->mmio_read_completed) {
2126 memcpy(val, vcpu->mmio_data, bytes);
2127 vcpu->mmio_read_completed = 0;
2128 return X86EMUL_CONTINUE;
2131 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2133 /* For APIC access vmexit */
2134 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2137 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2138 == X86EMUL_CONTINUE)
2139 return X86EMUL_CONTINUE;
2140 if (gpa == UNMAPPED_GVA)
2141 return X86EMUL_PROPAGATE_FAULT;
2145 * Is this MMIO handled locally?
2147 mutex_lock(&vcpu->kvm->lock);
2148 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2150 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2151 mutex_unlock(&vcpu->kvm->lock);
2152 return X86EMUL_CONTINUE;
2154 mutex_unlock(&vcpu->kvm->lock);
2156 vcpu->mmio_needed = 1;
2157 vcpu->mmio_phys_addr = gpa;
2158 vcpu->mmio_size = bytes;
2159 vcpu->mmio_is_write = 0;
2161 return X86EMUL_UNHANDLEABLE;
2164 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2165 const void *val, int bytes)
2169 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2172 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2176 static int emulator_write_emulated_onepage(unsigned long addr,
2179 struct kvm_vcpu *vcpu)
2181 struct kvm_io_device *mmio_dev;
2184 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2186 if (gpa == UNMAPPED_GVA) {
2187 kvm_inject_page_fault(vcpu, addr, 2);
2188 return X86EMUL_PROPAGATE_FAULT;
2191 /* For APIC access vmexit */
2192 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2195 if (emulator_write_phys(vcpu, gpa, val, bytes))
2196 return X86EMUL_CONTINUE;
2200 * Is this MMIO handled locally?
2202 mutex_lock(&vcpu->kvm->lock);
2203 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2205 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2206 mutex_unlock(&vcpu->kvm->lock);
2207 return X86EMUL_CONTINUE;
2209 mutex_unlock(&vcpu->kvm->lock);
2211 vcpu->mmio_needed = 1;
2212 vcpu->mmio_phys_addr = gpa;
2213 vcpu->mmio_size = bytes;
2214 vcpu->mmio_is_write = 1;
2215 memcpy(vcpu->mmio_data, val, bytes);
2217 return X86EMUL_CONTINUE;
2220 int emulator_write_emulated(unsigned long addr,
2223 struct kvm_vcpu *vcpu)
2225 /* Crossing a page boundary? */
2226 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2229 now = -addr & ~PAGE_MASK;
2230 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2231 if (rc != X86EMUL_CONTINUE)
2237 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2239 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2241 static int emulator_cmpxchg_emulated(unsigned long addr,
2245 struct kvm_vcpu *vcpu)
2247 static int reported;
2251 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2253 #ifndef CONFIG_X86_64
2254 /* guests cmpxchg8b have to be emulated atomically */
2261 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2263 if (gpa == UNMAPPED_GVA ||
2264 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2267 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2272 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2274 kaddr = kmap_atomic(page, KM_USER0);
2275 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2276 kunmap_atomic(kaddr, KM_USER0);
2277 kvm_release_page_dirty(page);
2282 return emulator_write_emulated(addr, new, bytes, vcpu);
2285 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2287 return kvm_x86_ops->get_segment_base(vcpu, seg);
2290 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2292 kvm_mmu_invlpg(vcpu, address);
2293 return X86EMUL_CONTINUE;
2296 int emulate_clts(struct kvm_vcpu *vcpu)
2298 KVMTRACE_0D(CLTS, vcpu, handler);
2299 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2300 return X86EMUL_CONTINUE;
2303 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2305 struct kvm_vcpu *vcpu = ctxt->vcpu;
2309 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2310 return X86EMUL_CONTINUE;
2312 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2313 return X86EMUL_UNHANDLEABLE;
2317 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2319 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2322 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2324 /* FIXME: better handling */
2325 return X86EMUL_UNHANDLEABLE;
2327 return X86EMUL_CONTINUE;
2330 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2333 unsigned long rip = kvm_rip_read(vcpu);
2334 unsigned long rip_linear;
2336 if (!printk_ratelimit())
2339 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2341 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2343 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2344 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2346 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2348 static struct x86_emulate_ops emulate_ops = {
2349 .read_std = kvm_read_guest_virt,
2350 .read_emulated = emulator_read_emulated,
2351 .write_emulated = emulator_write_emulated,
2352 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2355 static void cache_all_regs(struct kvm_vcpu *vcpu)
2357 kvm_register_read(vcpu, VCPU_REGS_RAX);
2358 kvm_register_read(vcpu, VCPU_REGS_RSP);
2359 kvm_register_read(vcpu, VCPU_REGS_RIP);
2360 vcpu->arch.regs_dirty = ~0;
2363 int emulate_instruction(struct kvm_vcpu *vcpu,
2364 struct kvm_run *run,
2370 struct decode_cache *c;
2372 kvm_clear_exception_queue(vcpu);
2373 vcpu->arch.mmio_fault_cr2 = cr2;
2375 * TODO: fix x86_emulate.c to use guest_read/write_register
2376 * instead of direct ->regs accesses, can save hundred cycles
2377 * on Intel for instructions that don't read/change RSP, for
2380 cache_all_regs(vcpu);
2382 vcpu->mmio_is_write = 0;
2383 vcpu->arch.pio.string = 0;
2385 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2387 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2389 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2390 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2391 vcpu->arch.emulate_ctxt.mode =
2392 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2393 ? X86EMUL_MODE_REAL : cs_l
2394 ? X86EMUL_MODE_PROT64 : cs_db
2395 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2397 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2399 /* Reject the instructions other than VMCALL/VMMCALL when
2400 * try to emulate invalid opcode */
2401 c = &vcpu->arch.emulate_ctxt.decode;
2402 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2403 (!(c->twobyte && c->b == 0x01 &&
2404 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2405 c->modrm_mod == 3 && c->modrm_rm == 1)))
2406 return EMULATE_FAIL;
2408 ++vcpu->stat.insn_emulation;
2410 ++vcpu->stat.insn_emulation_fail;
2411 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2412 return EMULATE_DONE;
2413 return EMULATE_FAIL;
2417 if (emulation_type & EMULTYPE_SKIP) {
2418 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2419 return EMULATE_DONE;
2422 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2424 if (vcpu->arch.pio.string)
2425 return EMULATE_DO_MMIO;
2427 if ((r || vcpu->mmio_is_write) && run) {
2428 run->exit_reason = KVM_EXIT_MMIO;
2429 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2430 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2431 run->mmio.len = vcpu->mmio_size;
2432 run->mmio.is_write = vcpu->mmio_is_write;
2436 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2437 return EMULATE_DONE;
2438 if (!vcpu->mmio_needed) {
2439 kvm_report_emulation_failure(vcpu, "mmio");
2440 return EMULATE_FAIL;
2442 return EMULATE_DO_MMIO;
2445 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2447 if (vcpu->mmio_is_write) {
2448 vcpu->mmio_needed = 0;
2449 return EMULATE_DO_MMIO;
2452 return EMULATE_DONE;
2454 EXPORT_SYMBOL_GPL(emulate_instruction);
2456 static int pio_copy_data(struct kvm_vcpu *vcpu)
2458 void *p = vcpu->arch.pio_data;
2459 gva_t q = vcpu->arch.pio.guest_gva;
2463 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2464 if (vcpu->arch.pio.in)
2465 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2467 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2471 int complete_pio(struct kvm_vcpu *vcpu)
2473 struct kvm_pio_request *io = &vcpu->arch.pio;
2480 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2481 memcpy(&val, vcpu->arch.pio_data, io->size);
2482 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2486 r = pio_copy_data(vcpu);
2493 delta *= io->cur_count;
2495 * The size of the register should really depend on
2496 * current address size.
2498 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2500 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2506 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2508 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2510 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2512 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2516 io->count -= io->cur_count;
2522 static void kernel_pio(struct kvm_io_device *pio_dev,
2523 struct kvm_vcpu *vcpu,
2526 /* TODO: String I/O for in kernel device */
2528 mutex_lock(&vcpu->kvm->lock);
2529 if (vcpu->arch.pio.in)
2530 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2531 vcpu->arch.pio.size,
2534 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2535 vcpu->arch.pio.size,
2537 mutex_unlock(&vcpu->kvm->lock);
2540 static void pio_string_write(struct kvm_io_device *pio_dev,
2541 struct kvm_vcpu *vcpu)
2543 struct kvm_pio_request *io = &vcpu->arch.pio;
2544 void *pd = vcpu->arch.pio_data;
2547 mutex_lock(&vcpu->kvm->lock);
2548 for (i = 0; i < io->cur_count; i++) {
2549 kvm_iodevice_write(pio_dev, io->port,
2554 mutex_unlock(&vcpu->kvm->lock);
2557 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2558 gpa_t addr, int len,
2561 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2564 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2565 int size, unsigned port)
2567 struct kvm_io_device *pio_dev;
2570 vcpu->run->exit_reason = KVM_EXIT_IO;
2571 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2572 vcpu->run->io.size = vcpu->arch.pio.size = size;
2573 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2574 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2575 vcpu->run->io.port = vcpu->arch.pio.port = port;
2576 vcpu->arch.pio.in = in;
2577 vcpu->arch.pio.string = 0;
2578 vcpu->arch.pio.down = 0;
2579 vcpu->arch.pio.rep = 0;
2581 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2582 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2585 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2588 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2589 memcpy(vcpu->arch.pio_data, &val, 4);
2591 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2593 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2599 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2601 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2602 int size, unsigned long count, int down,
2603 gva_t address, int rep, unsigned port)
2605 unsigned now, in_page;
2607 struct kvm_io_device *pio_dev;
2609 vcpu->run->exit_reason = KVM_EXIT_IO;
2610 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2611 vcpu->run->io.size = vcpu->arch.pio.size = size;
2612 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2613 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2614 vcpu->run->io.port = vcpu->arch.pio.port = port;
2615 vcpu->arch.pio.in = in;
2616 vcpu->arch.pio.string = 1;
2617 vcpu->arch.pio.down = down;
2618 vcpu->arch.pio.rep = rep;
2620 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2621 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2624 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2628 kvm_x86_ops->skip_emulated_instruction(vcpu);
2633 in_page = PAGE_SIZE - offset_in_page(address);
2635 in_page = offset_in_page(address) + size;
2636 now = min(count, (unsigned long)in_page / size);
2641 * String I/O in reverse. Yuck. Kill the guest, fix later.
2643 pr_unimpl(vcpu, "guest string pio down\n");
2644 kvm_inject_gp(vcpu, 0);
2647 vcpu->run->io.count = now;
2648 vcpu->arch.pio.cur_count = now;
2650 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2651 kvm_x86_ops->skip_emulated_instruction(vcpu);
2653 vcpu->arch.pio.guest_gva = address;
2655 pio_dev = vcpu_find_pio_dev(vcpu, port,
2656 vcpu->arch.pio.cur_count,
2657 !vcpu->arch.pio.in);
2658 if (!vcpu->arch.pio.in) {
2659 /* string PIO write */
2660 ret = pio_copy_data(vcpu);
2661 if (ret == X86EMUL_PROPAGATE_FAULT) {
2662 kvm_inject_gp(vcpu, 0);
2665 if (ret == 0 && pio_dev) {
2666 pio_string_write(pio_dev, vcpu);
2668 if (vcpu->arch.pio.count == 0)
2672 pr_unimpl(vcpu, "no string pio read support yet, "
2673 "port %x size %d count %ld\n",
2678 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2680 static void bounce_off(void *info)
2685 static unsigned int ref_freq;
2686 static unsigned long tsc_khz_ref;
2688 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2691 struct cpufreq_freqs *freq = data;
2693 struct kvm_vcpu *vcpu;
2694 int i, send_ipi = 0;
2697 ref_freq = freq->old;
2699 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2701 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2703 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2705 spin_lock(&kvm_lock);
2706 list_for_each_entry(kvm, &vm_list, vm_list) {
2707 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2708 vcpu = kvm->vcpus[i];
2711 if (vcpu->cpu != freq->cpu)
2713 if (!kvm_request_guest_time_update(vcpu))
2715 if (vcpu->cpu != smp_processor_id())
2719 spin_unlock(&kvm_lock);
2721 if (freq->old < freq->new && send_ipi) {
2723 * We upscale the frequency. Must make the guest
2724 * doesn't see old kvmclock values while running with
2725 * the new frequency, otherwise we risk the guest sees
2726 * time go backwards.
2728 * In case we update the frequency for another cpu
2729 * (which might be in guest context) send an interrupt
2730 * to kick the cpu out of guest context. Next time
2731 * guest context is entered kvmclock will be updated,
2732 * so the guest will not see stale values.
2734 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2739 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2740 .notifier_call = kvmclock_cpufreq_notifier
2743 int kvm_arch_init(void *opaque)
2746 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2749 printk(KERN_ERR "kvm: already loaded the other module\n");
2754 if (!ops->cpu_has_kvm_support()) {
2755 printk(KERN_ERR "kvm: no hardware support\n");
2759 if (ops->disabled_by_bios()) {
2760 printk(KERN_ERR "kvm: disabled by bios\n");
2765 r = kvm_mmu_module_init();
2769 kvm_init_msr_list();
2772 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2773 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2774 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2775 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2777 for_each_possible_cpu(cpu)
2778 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2779 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2780 tsc_khz_ref = tsc_khz;
2781 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2782 CPUFREQ_TRANSITION_NOTIFIER);
2791 void kvm_arch_exit(void)
2793 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2794 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2795 CPUFREQ_TRANSITION_NOTIFIER);
2797 kvm_mmu_module_exit();
2800 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2802 ++vcpu->stat.halt_exits;
2803 KVMTRACE_0D(HLT, vcpu, handler);
2804 if (irqchip_in_kernel(vcpu->kvm)) {
2805 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2808 vcpu->run->exit_reason = KVM_EXIT_HLT;
2812 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2814 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2817 if (is_long_mode(vcpu))
2820 return a0 | ((gpa_t)a1 << 32);
2823 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2825 unsigned long nr, a0, a1, a2, a3, ret;
2828 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2829 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2830 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2831 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2832 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2834 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2836 if (!is_long_mode(vcpu)) {
2845 case KVM_HC_VAPIC_POLL_IRQ:
2849 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2855 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2856 ++vcpu->stat.hypercalls;
2859 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2861 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2863 char instruction[3];
2865 unsigned long rip = kvm_rip_read(vcpu);
2869 * Blow out the MMU to ensure that no other VCPU has an active mapping
2870 * to ensure that the updated hypercall appears atomically across all
2873 kvm_mmu_zap_all(vcpu->kvm);
2875 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2876 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2877 != X86EMUL_CONTINUE)
2883 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2885 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2888 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2890 struct descriptor_table dt = { limit, base };
2892 kvm_x86_ops->set_gdt(vcpu, &dt);
2895 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2897 struct descriptor_table dt = { limit, base };
2899 kvm_x86_ops->set_idt(vcpu, &dt);
2902 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2903 unsigned long *rflags)
2905 kvm_lmsw(vcpu, msw);
2906 *rflags = kvm_x86_ops->get_rflags(vcpu);
2909 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2911 unsigned long value;
2913 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2916 value = vcpu->arch.cr0;
2919 value = vcpu->arch.cr2;
2922 value = vcpu->arch.cr3;
2925 value = vcpu->arch.cr4;
2928 value = kvm_get_cr8(vcpu);
2931 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2934 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2935 (u32)((u64)value >> 32), handler);
2940 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2941 unsigned long *rflags)
2943 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2944 (u32)((u64)val >> 32), handler);
2948 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2949 *rflags = kvm_x86_ops->get_rflags(vcpu);
2952 vcpu->arch.cr2 = val;
2955 kvm_set_cr3(vcpu, val);
2958 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2961 kvm_set_cr8(vcpu, val & 0xfUL);
2964 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2968 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2970 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2971 int j, nent = vcpu->arch.cpuid_nent;
2973 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2974 /* when no next entry is found, the current entry[i] is reselected */
2975 for (j = i + 1; ; j = (j + 1) % nent) {
2976 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2977 if (ej->function == e->function) {
2978 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2982 return 0; /* silence gcc, even though control never reaches here */
2985 /* find an entry with matching function, matching index (if needed), and that
2986 * should be read next (if it's stateful) */
2987 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2988 u32 function, u32 index)
2990 if (e->function != function)
2992 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2994 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2995 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3000 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3001 u32 function, u32 index)
3004 struct kvm_cpuid_entry2 *best = NULL;
3006 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3007 struct kvm_cpuid_entry2 *e;
3009 e = &vcpu->arch.cpuid_entries[i];
3010 if (is_matching_cpuid_entry(e, function, index)) {
3011 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3012 move_to_next_stateful_cpuid_entry(vcpu, i);
3017 * Both basic or both extended?
3019 if (((e->function ^ function) & 0x80000000) == 0)
3020 if (!best || e->function > best->function)
3026 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3028 struct kvm_cpuid_entry2 *best;
3030 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3032 return best->eax & 0xff;
3036 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3038 u32 function, index;
3039 struct kvm_cpuid_entry2 *best;
3041 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3042 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3043 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3044 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3045 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3046 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3047 best = kvm_find_cpuid_entry(vcpu, function, index);
3049 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3050 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3051 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3052 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3054 kvm_x86_ops->skip_emulated_instruction(vcpu);
3055 KVMTRACE_5D(CPUID, vcpu, function,
3056 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3057 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3058 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3059 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3061 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3064 * Check if userspace requested an interrupt window, and that the
3065 * interrupt window is open.
3067 * No need to exit to userspace if we already have an interrupt queued.
3069 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3070 struct kvm_run *kvm_run)
3072 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3073 kvm_run->request_interrupt_window &&
3074 kvm_arch_interrupt_allowed(vcpu));
3077 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3078 struct kvm_run *kvm_run)
3080 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3081 kvm_run->cr8 = kvm_get_cr8(vcpu);
3082 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3083 if (irqchip_in_kernel(vcpu->kvm))
3084 kvm_run->ready_for_interrupt_injection = 1;
3086 kvm_run->ready_for_interrupt_injection =
3087 (kvm_arch_interrupt_allowed(vcpu) &&
3088 !kvm_cpu_has_interrupt(vcpu));
3091 static void vapic_enter(struct kvm_vcpu *vcpu)
3093 struct kvm_lapic *apic = vcpu->arch.apic;
3096 if (!apic || !apic->vapic_addr)
3099 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3101 vcpu->arch.apic->vapic_page = page;
3104 static void vapic_exit(struct kvm_vcpu *vcpu)
3106 struct kvm_lapic *apic = vcpu->arch.apic;
3108 if (!apic || !apic->vapic_addr)
3111 down_read(&vcpu->kvm->slots_lock);
3112 kvm_release_page_dirty(apic->vapic_page);
3113 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3114 up_read(&vcpu->kvm->slots_lock);
3117 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3121 if (!kvm_x86_ops->update_cr8_intercept)
3124 max_irr = kvm_lapic_find_highest_irr(vcpu);
3129 tpr = kvm_lapic_get_cr8(vcpu);
3131 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3134 static void inject_irq(struct kvm_vcpu *vcpu)
3136 /* try to reinject previous events if any */
3137 if (vcpu->arch.nmi_injected) {
3138 kvm_x86_ops->set_nmi(vcpu);
3142 if (vcpu->arch.interrupt.pending) {
3143 kvm_x86_ops->set_irq(vcpu, vcpu->arch.interrupt.nr);
3147 /* try to inject new event if pending */
3148 if (vcpu->arch.nmi_pending) {
3149 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3150 vcpu->arch.nmi_pending = false;
3151 vcpu->arch.nmi_injected = true;
3152 kvm_x86_ops->set_nmi(vcpu);
3154 } else if (kvm_cpu_has_interrupt(vcpu)) {
3155 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3156 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu));
3157 kvm_x86_ops->set_irq(vcpu, vcpu->arch.interrupt.nr);
3162 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3164 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3165 kvm_run->request_interrupt_window;
3167 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3168 kvm_x86_ops->drop_interrupt_shadow(vcpu);
3172 /* enable NMI/IRQ window open exits if needed */
3173 if (vcpu->arch.nmi_pending)
3174 kvm_x86_ops->enable_nmi_window(vcpu);
3175 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3176 kvm_x86_ops->enable_irq_window(vcpu);
3179 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3184 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3185 kvm_mmu_unload(vcpu);
3187 r = kvm_mmu_reload(vcpu);
3191 if (vcpu->requests) {
3192 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3193 __kvm_migrate_timers(vcpu);
3194 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3195 kvm_write_guest_time(vcpu);
3196 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3197 kvm_mmu_sync_roots(vcpu);
3198 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3199 kvm_x86_ops->tlb_flush(vcpu);
3200 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3202 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3206 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3207 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3215 kvm_x86_ops->prepare_guest_switch(vcpu);
3216 kvm_load_guest_fpu(vcpu);
3218 local_irq_disable();
3220 if (vcpu->requests || need_resched() || signal_pending(current)) {
3227 vcpu->guest_mode = 1;
3229 * Make sure that guest_mode assignment won't happen after
3230 * testing the pending IRQ vector bitmap.
3234 if (vcpu->arch.exception.pending)
3235 __queue_exception(vcpu);
3237 inject_pending_irq(vcpu, kvm_run);
3239 if (kvm_lapic_enabled(vcpu)) {
3240 if (!vcpu->arch.apic->vapic_addr)
3241 update_cr8_intercept(vcpu);
3243 kvm_lapic_sync_to_vapic(vcpu);
3246 up_read(&vcpu->kvm->slots_lock);
3250 get_debugreg(vcpu->arch.host_dr6, 6);
3251 get_debugreg(vcpu->arch.host_dr7, 7);
3252 if (unlikely(vcpu->arch.switch_db_regs)) {
3253 get_debugreg(vcpu->arch.host_db[0], 0);
3254 get_debugreg(vcpu->arch.host_db[1], 1);
3255 get_debugreg(vcpu->arch.host_db[2], 2);
3256 get_debugreg(vcpu->arch.host_db[3], 3);
3259 set_debugreg(vcpu->arch.eff_db[0], 0);
3260 set_debugreg(vcpu->arch.eff_db[1], 1);
3261 set_debugreg(vcpu->arch.eff_db[2], 2);
3262 set_debugreg(vcpu->arch.eff_db[3], 3);
3265 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3266 kvm_x86_ops->run(vcpu, kvm_run);
3268 if (unlikely(vcpu->arch.switch_db_regs)) {
3270 set_debugreg(vcpu->arch.host_db[0], 0);
3271 set_debugreg(vcpu->arch.host_db[1], 1);
3272 set_debugreg(vcpu->arch.host_db[2], 2);
3273 set_debugreg(vcpu->arch.host_db[3], 3);
3275 set_debugreg(vcpu->arch.host_dr6, 6);
3276 set_debugreg(vcpu->arch.host_dr7, 7);
3278 vcpu->guest_mode = 0;
3284 * We must have an instruction between local_irq_enable() and
3285 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3286 * the interrupt shadow. The stat.exits increment will do nicely.
3287 * But we need to prevent reordering, hence this barrier():
3295 down_read(&vcpu->kvm->slots_lock);
3298 * Profile KVM exit RIPs:
3300 if (unlikely(prof_on == KVM_PROFILING)) {
3301 unsigned long rip = kvm_rip_read(vcpu);
3302 profile_hit(KVM_PROFILING, (void *)rip);
3306 kvm_lapic_sync_from_vapic(vcpu);
3308 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3314 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3318 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3319 pr_debug("vcpu %d received sipi with vector # %x\n",
3320 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3321 kvm_lapic_reset(vcpu);
3322 r = kvm_arch_vcpu_reset(vcpu);
3325 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3328 down_read(&vcpu->kvm->slots_lock);
3333 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3334 r = vcpu_enter_guest(vcpu, kvm_run);
3336 up_read(&vcpu->kvm->slots_lock);
3337 kvm_vcpu_block(vcpu);
3338 down_read(&vcpu->kvm->slots_lock);
3339 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3341 switch(vcpu->arch.mp_state) {
3342 case KVM_MP_STATE_HALTED:
3343 vcpu->arch.mp_state =
3344 KVM_MP_STATE_RUNNABLE;
3345 case KVM_MP_STATE_RUNNABLE:
3347 case KVM_MP_STATE_SIPI_RECEIVED:
3358 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3359 if (kvm_cpu_has_pending_timer(vcpu))
3360 kvm_inject_pending_timer_irqs(vcpu);
3362 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3364 kvm_run->exit_reason = KVM_EXIT_INTR;
3365 ++vcpu->stat.request_irq_exits;
3367 if (signal_pending(current)) {
3369 kvm_run->exit_reason = KVM_EXIT_INTR;
3370 ++vcpu->stat.signal_exits;
3372 if (need_resched()) {
3373 up_read(&vcpu->kvm->slots_lock);
3375 down_read(&vcpu->kvm->slots_lock);
3379 up_read(&vcpu->kvm->slots_lock);
3380 post_kvm_run_save(vcpu, kvm_run);
3387 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3394 if (vcpu->sigset_active)
3395 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3397 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3398 kvm_vcpu_block(vcpu);
3399 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3404 /* re-sync apic's tpr */
3405 if (!irqchip_in_kernel(vcpu->kvm))
3406 kvm_set_cr8(vcpu, kvm_run->cr8);
3408 if (vcpu->arch.pio.cur_count) {
3409 r = complete_pio(vcpu);
3413 #if CONFIG_HAS_IOMEM
3414 if (vcpu->mmio_needed) {
3415 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3416 vcpu->mmio_read_completed = 1;
3417 vcpu->mmio_needed = 0;
3419 down_read(&vcpu->kvm->slots_lock);
3420 r = emulate_instruction(vcpu, kvm_run,
3421 vcpu->arch.mmio_fault_cr2, 0,
3422 EMULTYPE_NO_DECODE);
3423 up_read(&vcpu->kvm->slots_lock);
3424 if (r == EMULATE_DO_MMIO) {
3426 * Read-modify-write. Back to userspace.
3433 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3434 kvm_register_write(vcpu, VCPU_REGS_RAX,
3435 kvm_run->hypercall.ret);
3437 r = __vcpu_run(vcpu, kvm_run);
3440 if (vcpu->sigset_active)
3441 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3447 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3451 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3452 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3453 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3454 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3455 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3456 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3457 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3458 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3459 #ifdef CONFIG_X86_64
3460 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3461 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3462 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3463 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3464 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3465 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3466 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3467 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3470 regs->rip = kvm_rip_read(vcpu);
3471 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3474 * Don't leak debug flags in case they were set for guest debugging
3476 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3477 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3484 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3488 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3489 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3490 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3491 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3492 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3493 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3494 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3495 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3496 #ifdef CONFIG_X86_64
3497 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3498 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3499 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3500 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3501 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3502 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3503 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3504 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3508 kvm_rip_write(vcpu, regs->rip);
3509 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3512 vcpu->arch.exception.pending = false;
3519 void kvm_get_segment(struct kvm_vcpu *vcpu,
3520 struct kvm_segment *var, int seg)
3522 kvm_x86_ops->get_segment(vcpu, var, seg);
3525 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3527 struct kvm_segment cs;
3529 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3533 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3535 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3536 struct kvm_sregs *sregs)
3538 struct descriptor_table dt;
3542 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3543 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3544 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3545 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3546 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3547 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3549 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3550 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3552 kvm_x86_ops->get_idt(vcpu, &dt);
3553 sregs->idt.limit = dt.limit;
3554 sregs->idt.base = dt.base;
3555 kvm_x86_ops->get_gdt(vcpu, &dt);
3556 sregs->gdt.limit = dt.limit;
3557 sregs->gdt.base = dt.base;
3559 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3560 sregs->cr0 = vcpu->arch.cr0;
3561 sregs->cr2 = vcpu->arch.cr2;
3562 sregs->cr3 = vcpu->arch.cr3;
3563 sregs->cr4 = vcpu->arch.cr4;
3564 sregs->cr8 = kvm_get_cr8(vcpu);
3565 sregs->efer = vcpu->arch.shadow_efer;
3566 sregs->apic_base = kvm_get_apic_base(vcpu);
3568 if (irqchip_in_kernel(vcpu->kvm))
3569 memset(sregs->interrupt_bitmap, 0,
3570 sizeof sregs->interrupt_bitmap);
3572 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3573 sizeof sregs->interrupt_bitmap);
3575 if (vcpu->arch.interrupt.pending)
3576 set_bit(vcpu->arch.interrupt.nr,
3577 (unsigned long *)sregs->interrupt_bitmap);
3584 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3585 struct kvm_mp_state *mp_state)
3588 mp_state->mp_state = vcpu->arch.mp_state;
3593 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3594 struct kvm_mp_state *mp_state)
3597 vcpu->arch.mp_state = mp_state->mp_state;
3602 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3603 struct kvm_segment *var, int seg)
3605 kvm_x86_ops->set_segment(vcpu, var, seg);
3608 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3609 struct kvm_segment *kvm_desct)
3611 kvm_desct->base = seg_desc->base0;
3612 kvm_desct->base |= seg_desc->base1 << 16;
3613 kvm_desct->base |= seg_desc->base2 << 24;
3614 kvm_desct->limit = seg_desc->limit0;
3615 kvm_desct->limit |= seg_desc->limit << 16;
3617 kvm_desct->limit <<= 12;
3618 kvm_desct->limit |= 0xfff;
3620 kvm_desct->selector = selector;
3621 kvm_desct->type = seg_desc->type;
3622 kvm_desct->present = seg_desc->p;
3623 kvm_desct->dpl = seg_desc->dpl;
3624 kvm_desct->db = seg_desc->d;
3625 kvm_desct->s = seg_desc->s;
3626 kvm_desct->l = seg_desc->l;
3627 kvm_desct->g = seg_desc->g;
3628 kvm_desct->avl = seg_desc->avl;
3630 kvm_desct->unusable = 1;
3632 kvm_desct->unusable = 0;
3633 kvm_desct->padding = 0;
3636 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3638 struct descriptor_table *dtable)
3640 if (selector & 1 << 2) {
3641 struct kvm_segment kvm_seg;
3643 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3645 if (kvm_seg.unusable)
3648 dtable->limit = kvm_seg.limit;
3649 dtable->base = kvm_seg.base;
3652 kvm_x86_ops->get_gdt(vcpu, dtable);
3655 /* allowed just for 8 bytes segments */
3656 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3657 struct desc_struct *seg_desc)
3660 struct descriptor_table dtable;
3661 u16 index = selector >> 3;
3663 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3665 if (dtable.limit < index * 8 + 7) {
3666 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3669 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3671 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3674 /* allowed just for 8 bytes segments */
3675 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3676 struct desc_struct *seg_desc)
3679 struct descriptor_table dtable;
3680 u16 index = selector >> 3;
3682 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3684 if (dtable.limit < index * 8 + 7)
3686 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3688 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3691 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3692 struct desc_struct *seg_desc)
3696 base_addr = seg_desc->base0;
3697 base_addr |= (seg_desc->base1 << 16);
3698 base_addr |= (seg_desc->base2 << 24);
3700 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3703 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3705 struct kvm_segment kvm_seg;
3707 kvm_get_segment(vcpu, &kvm_seg, seg);
3708 return kvm_seg.selector;
3711 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3713 struct kvm_segment *kvm_seg)
3715 struct desc_struct seg_desc;
3717 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3719 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3723 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3725 struct kvm_segment segvar = {
3726 .base = selector << 4,
3728 .selector = selector,
3739 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3743 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3744 int type_bits, int seg)
3746 struct kvm_segment kvm_seg;
3748 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3749 return kvm_load_realmode_segment(vcpu, selector, seg);
3750 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3752 kvm_seg.type |= type_bits;
3754 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3755 seg != VCPU_SREG_LDTR)
3757 kvm_seg.unusable = 1;
3759 kvm_set_segment(vcpu, &kvm_seg, seg);
3763 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3764 struct tss_segment_32 *tss)
3766 tss->cr3 = vcpu->arch.cr3;
3767 tss->eip = kvm_rip_read(vcpu);
3768 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3769 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3770 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3771 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3772 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3773 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3774 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3775 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3776 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3777 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3778 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3779 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3780 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3781 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3782 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3783 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3786 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3787 struct tss_segment_32 *tss)
3789 kvm_set_cr3(vcpu, tss->cr3);
3791 kvm_rip_write(vcpu, tss->eip);
3792 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3794 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3795 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3796 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3797 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3798 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3799 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3800 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3801 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3803 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3806 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3809 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3812 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3815 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3818 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3821 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3826 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3827 struct tss_segment_16 *tss)
3829 tss->ip = kvm_rip_read(vcpu);
3830 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3831 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3832 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3833 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3834 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3835 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3836 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3837 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3838 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3840 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3841 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3842 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3843 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3844 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3845 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3848 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3849 struct tss_segment_16 *tss)
3851 kvm_rip_write(vcpu, tss->ip);
3852 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3853 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3854 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3855 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3856 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3857 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3858 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3859 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3860 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3862 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3865 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3868 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3871 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3874 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3879 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3880 u16 old_tss_sel, u32 old_tss_base,
3881 struct desc_struct *nseg_desc)
3883 struct tss_segment_16 tss_segment_16;
3886 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3887 sizeof tss_segment_16))
3890 save_state_to_tss16(vcpu, &tss_segment_16);
3892 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3893 sizeof tss_segment_16))
3896 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3897 &tss_segment_16, sizeof tss_segment_16))
3900 if (old_tss_sel != 0xffff) {
3901 tss_segment_16.prev_task_link = old_tss_sel;
3903 if (kvm_write_guest(vcpu->kvm,
3904 get_tss_base_addr(vcpu, nseg_desc),
3905 &tss_segment_16.prev_task_link,
3906 sizeof tss_segment_16.prev_task_link))
3910 if (load_state_from_tss16(vcpu, &tss_segment_16))
3918 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3919 u16 old_tss_sel, u32 old_tss_base,
3920 struct desc_struct *nseg_desc)
3922 struct tss_segment_32 tss_segment_32;
3925 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3926 sizeof tss_segment_32))
3929 save_state_to_tss32(vcpu, &tss_segment_32);
3931 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3932 sizeof tss_segment_32))
3935 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3936 &tss_segment_32, sizeof tss_segment_32))
3939 if (old_tss_sel != 0xffff) {
3940 tss_segment_32.prev_task_link = old_tss_sel;
3942 if (kvm_write_guest(vcpu->kvm,
3943 get_tss_base_addr(vcpu, nseg_desc),
3944 &tss_segment_32.prev_task_link,
3945 sizeof tss_segment_32.prev_task_link))
3949 if (load_state_from_tss32(vcpu, &tss_segment_32))
3957 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3959 struct kvm_segment tr_seg;
3960 struct desc_struct cseg_desc;
3961 struct desc_struct nseg_desc;
3963 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3964 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3966 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3968 /* FIXME: Handle errors. Failure to read either TSS or their
3969 * descriptors should generate a pagefault.
3971 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3974 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3977 if (reason != TASK_SWITCH_IRET) {
3980 cpl = kvm_x86_ops->get_cpl(vcpu);
3981 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3982 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3987 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3988 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3992 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3993 cseg_desc.type &= ~(1 << 1); //clear the B flag
3994 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3997 if (reason == TASK_SWITCH_IRET) {
3998 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3999 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4002 /* set back link to prev task only if NT bit is set in eflags
4003 note that old_tss_sel is not used afetr this point */
4004 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4005 old_tss_sel = 0xffff;
4007 /* set back link to prev task only if NT bit is set in eflags
4008 note that old_tss_sel is not used afetr this point */
4009 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4010 old_tss_sel = 0xffff;
4012 if (nseg_desc.type & 8)
4013 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4014 old_tss_base, &nseg_desc);
4016 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4017 old_tss_base, &nseg_desc);
4019 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4020 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4021 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4024 if (reason != TASK_SWITCH_IRET) {
4025 nseg_desc.type |= (1 << 1);
4026 save_guest_segment_descriptor(vcpu, tss_selector,
4030 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4031 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4033 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4037 EXPORT_SYMBOL_GPL(kvm_task_switch);
4039 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4040 struct kvm_sregs *sregs)
4042 int mmu_reset_needed = 0;
4043 int i, pending_vec, max_bits;
4044 struct descriptor_table dt;
4048 dt.limit = sregs->idt.limit;
4049 dt.base = sregs->idt.base;
4050 kvm_x86_ops->set_idt(vcpu, &dt);
4051 dt.limit = sregs->gdt.limit;
4052 dt.base = sregs->gdt.base;
4053 kvm_x86_ops->set_gdt(vcpu, &dt);
4055 vcpu->arch.cr2 = sregs->cr2;
4056 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4058 down_read(&vcpu->kvm->slots_lock);
4059 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4060 vcpu->arch.cr3 = sregs->cr3;
4062 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4063 up_read(&vcpu->kvm->slots_lock);
4065 kvm_set_cr8(vcpu, sregs->cr8);
4067 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4068 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4069 kvm_set_apic_base(vcpu, sregs->apic_base);
4071 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4073 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4074 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4075 vcpu->arch.cr0 = sregs->cr0;
4077 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4078 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4079 if (!is_long_mode(vcpu) && is_pae(vcpu))
4080 load_pdptrs(vcpu, vcpu->arch.cr3);
4082 if (mmu_reset_needed)
4083 kvm_mmu_reset_context(vcpu);
4085 if (!irqchip_in_kernel(vcpu->kvm)) {
4086 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4087 sizeof vcpu->arch.irq_pending);
4088 vcpu->arch.irq_summary = 0;
4089 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4090 if (vcpu->arch.irq_pending[i])
4091 __set_bit(i, &vcpu->arch.irq_summary);
4093 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4094 pending_vec = find_first_bit(
4095 (const unsigned long *)sregs->interrupt_bitmap,
4097 /* Only pending external irq is handled here */
4098 if (pending_vec < max_bits) {
4099 kvm_queue_interrupt(vcpu, pending_vec);
4100 pr_debug("Set back pending irq %d\n", pending_vec);
4102 kvm_pic_clear_isr_ack(vcpu->kvm);
4105 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4106 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4107 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4108 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4109 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4110 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4112 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4113 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4115 /* Older userspace won't unhalt the vcpu on reset. */
4116 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4117 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4118 !(vcpu->arch.cr0 & X86_CR0_PE))
4119 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4126 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4127 struct kvm_guest_debug *dbg)
4133 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4134 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4135 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4136 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4137 vcpu->arch.switch_db_regs =
4138 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4140 for (i = 0; i < KVM_NR_DB_REGS; i++)
4141 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4142 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4145 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4147 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4148 kvm_queue_exception(vcpu, DB_VECTOR);
4149 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4150 kvm_queue_exception(vcpu, BP_VECTOR);
4158 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4159 * we have asm/x86/processor.h
4170 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4171 #ifdef CONFIG_X86_64
4172 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4174 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4179 * Translate a guest virtual address to a guest physical address.
4181 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4182 struct kvm_translation *tr)
4184 unsigned long vaddr = tr->linear_address;
4188 down_read(&vcpu->kvm->slots_lock);
4189 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4190 up_read(&vcpu->kvm->slots_lock);
4191 tr->physical_address = gpa;
4192 tr->valid = gpa != UNMAPPED_GVA;
4200 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4202 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4206 memcpy(fpu->fpr, fxsave->st_space, 128);
4207 fpu->fcw = fxsave->cwd;
4208 fpu->fsw = fxsave->swd;
4209 fpu->ftwx = fxsave->twd;
4210 fpu->last_opcode = fxsave->fop;
4211 fpu->last_ip = fxsave->rip;
4212 fpu->last_dp = fxsave->rdp;
4213 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4220 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4222 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4226 memcpy(fxsave->st_space, fpu->fpr, 128);
4227 fxsave->cwd = fpu->fcw;
4228 fxsave->swd = fpu->fsw;
4229 fxsave->twd = fpu->ftwx;
4230 fxsave->fop = fpu->last_opcode;
4231 fxsave->rip = fpu->last_ip;
4232 fxsave->rdp = fpu->last_dp;
4233 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4240 void fx_init(struct kvm_vcpu *vcpu)
4242 unsigned after_mxcsr_mask;
4245 * Touch the fpu the first time in non atomic context as if
4246 * this is the first fpu instruction the exception handler
4247 * will fire before the instruction returns and it'll have to
4248 * allocate ram with GFP_KERNEL.
4251 kvm_fx_save(&vcpu->arch.host_fx_image);
4253 /* Initialize guest FPU by resetting ours and saving into guest's */
4255 kvm_fx_save(&vcpu->arch.host_fx_image);
4257 kvm_fx_save(&vcpu->arch.guest_fx_image);
4258 kvm_fx_restore(&vcpu->arch.host_fx_image);
4261 vcpu->arch.cr0 |= X86_CR0_ET;
4262 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4263 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4264 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4265 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4267 EXPORT_SYMBOL_GPL(fx_init);
4269 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4271 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4274 vcpu->guest_fpu_loaded = 1;
4275 kvm_fx_save(&vcpu->arch.host_fx_image);
4276 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4278 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4280 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4282 if (!vcpu->guest_fpu_loaded)
4285 vcpu->guest_fpu_loaded = 0;
4286 kvm_fx_save(&vcpu->arch.guest_fx_image);
4287 kvm_fx_restore(&vcpu->arch.host_fx_image);
4288 ++vcpu->stat.fpu_reload;
4290 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4292 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4294 if (vcpu->arch.time_page) {
4295 kvm_release_page_dirty(vcpu->arch.time_page);
4296 vcpu->arch.time_page = NULL;
4299 kvm_x86_ops->vcpu_free(vcpu);
4302 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4305 return kvm_x86_ops->vcpu_create(kvm, id);
4308 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4312 /* We do fxsave: this must be aligned. */
4313 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4315 vcpu->arch.mtrr_state.have_fixed = 1;
4317 r = kvm_arch_vcpu_reset(vcpu);
4319 r = kvm_mmu_setup(vcpu);
4326 kvm_x86_ops->vcpu_free(vcpu);
4330 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4333 kvm_mmu_unload(vcpu);
4336 kvm_x86_ops->vcpu_free(vcpu);
4339 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4341 vcpu->arch.nmi_pending = false;
4342 vcpu->arch.nmi_injected = false;
4344 vcpu->arch.switch_db_regs = 0;
4345 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4346 vcpu->arch.dr6 = DR6_FIXED_1;
4347 vcpu->arch.dr7 = DR7_FIXED_1;
4349 return kvm_x86_ops->vcpu_reset(vcpu);
4352 void kvm_arch_hardware_enable(void *garbage)
4354 kvm_x86_ops->hardware_enable(garbage);
4357 void kvm_arch_hardware_disable(void *garbage)
4359 kvm_x86_ops->hardware_disable(garbage);
4362 int kvm_arch_hardware_setup(void)
4364 return kvm_x86_ops->hardware_setup();
4367 void kvm_arch_hardware_unsetup(void)
4369 kvm_x86_ops->hardware_unsetup();
4372 void kvm_arch_check_processor_compat(void *rtn)
4374 kvm_x86_ops->check_processor_compatibility(rtn);
4377 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4383 BUG_ON(vcpu->kvm == NULL);
4386 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4387 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4388 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4390 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4392 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4397 vcpu->arch.pio_data = page_address(page);
4399 r = kvm_mmu_create(vcpu);
4401 goto fail_free_pio_data;
4403 if (irqchip_in_kernel(kvm)) {
4404 r = kvm_create_lapic(vcpu);
4406 goto fail_mmu_destroy;
4412 kvm_mmu_destroy(vcpu);
4414 free_page((unsigned long)vcpu->arch.pio_data);
4419 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4421 kvm_free_lapic(vcpu);
4422 down_read(&vcpu->kvm->slots_lock);
4423 kvm_mmu_destroy(vcpu);
4424 up_read(&vcpu->kvm->slots_lock);
4425 free_page((unsigned long)vcpu->arch.pio_data);
4428 struct kvm *kvm_arch_create_vm(void)
4430 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4433 return ERR_PTR(-ENOMEM);
4435 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4436 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4438 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4439 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4441 rdtscll(kvm->arch.vm_init_tsc);
4446 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4449 kvm_mmu_unload(vcpu);
4453 static void kvm_free_vcpus(struct kvm *kvm)
4458 * Unpin any mmu pages first.
4460 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4462 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4463 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4464 if (kvm->vcpus[i]) {
4465 kvm_arch_vcpu_free(kvm->vcpus[i]);
4466 kvm->vcpus[i] = NULL;
4472 void kvm_arch_sync_events(struct kvm *kvm)
4474 kvm_free_all_assigned_devices(kvm);
4477 void kvm_arch_destroy_vm(struct kvm *kvm)
4479 kvm_iommu_unmap_guest(kvm);
4481 kfree(kvm->arch.vpic);
4482 kfree(kvm->arch.vioapic);
4483 kvm_free_vcpus(kvm);
4484 kvm_free_physmem(kvm);
4485 if (kvm->arch.apic_access_page)
4486 put_page(kvm->arch.apic_access_page);
4487 if (kvm->arch.ept_identity_pagetable)
4488 put_page(kvm->arch.ept_identity_pagetable);
4492 int kvm_arch_set_memory_region(struct kvm *kvm,
4493 struct kvm_userspace_memory_region *mem,
4494 struct kvm_memory_slot old,
4497 int npages = mem->memory_size >> PAGE_SHIFT;
4498 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4500 /*To keep backward compatibility with older userspace,
4501 *x86 needs to hanlde !user_alloc case.
4504 if (npages && !old.rmap) {
4505 unsigned long userspace_addr;
4507 down_write(¤t->mm->mmap_sem);
4508 userspace_addr = do_mmap(NULL, 0,
4510 PROT_READ | PROT_WRITE,
4511 MAP_PRIVATE | MAP_ANONYMOUS,
4513 up_write(¤t->mm->mmap_sem);
4515 if (IS_ERR((void *)userspace_addr))
4516 return PTR_ERR((void *)userspace_addr);
4518 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4519 spin_lock(&kvm->mmu_lock);
4520 memslot->userspace_addr = userspace_addr;
4521 spin_unlock(&kvm->mmu_lock);
4523 if (!old.user_alloc && old.rmap) {
4526 down_write(¤t->mm->mmap_sem);
4527 ret = do_munmap(current->mm, old.userspace_addr,
4528 old.npages * PAGE_SIZE);
4529 up_write(¤t->mm->mmap_sem);
4532 "kvm_vm_ioctl_set_memory_region: "
4533 "failed to munmap memory\n");
4538 if (!kvm->arch.n_requested_mmu_pages) {
4539 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4540 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4543 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4544 kvm_flush_remote_tlbs(kvm);
4549 void kvm_arch_flush_shadow(struct kvm *kvm)
4551 kvm_mmu_zap_all(kvm);
4554 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4556 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4557 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4558 || vcpu->arch.nmi_pending;
4561 static void vcpu_kick_intr(void *info)
4564 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4565 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4569 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4571 int ipi_pcpu = vcpu->cpu;
4574 if (waitqueue_active(&vcpu->wq)) {
4575 wake_up_interruptible(&vcpu->wq);
4576 ++vcpu->stat.halt_wakeup;
4579 * We may be called synchronously with irqs disabled in guest mode,
4580 * So need not to call smp_call_function_single() in that case.
4583 if (vcpu->guest_mode && vcpu->cpu != cpu)
4584 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4588 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4590 return kvm_x86_ops->interrupt_allowed(vcpu);