arch/x86/kernel/numaq_32.c

   1 /*
   2  * Written by: Patricia Gaughen, IBM Corporation
   3  *
   4  * Copyright (C) 2002, IBM Corp.
   5  *
   6  * All rights reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful, but
  14  * WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  16  * NON INFRINGEMENT.  See the GNU General Public License for more
  17  * details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22  *
  23  * Send feedback to <gone@us.ibm.com>
  24  */
  25 #include <linux/nodemask.h>
  26 #include <linux/bootmem.h>
  27 #include <linux/threads.h>
  28 #include <linux/cpumask.h>
  29 #include <linux/kernel.h>
  30 #include <linux/mmzone.h>
  31 #include <linux/module.h>
  32 #include <linux/string.h>
  33 #include <linux/init.h>
  34 #include <linux/numa.h>
  35 #include <linux/smp.h>
  36 #include <linux/mm.h>
  37
  38 #include <asm/processor.h>
  39 #include <asm/topology.h>
  40 #include <asm/fixmap.h>
  41 #include <asm/mpspec.h>
  42 #include <asm/numaq.h>
  43 #include <asm/setup.h>
  44 #include <asm/apic.h>
  45 #include <asm/e820.h>
  46 #include <asm/ipi.h>
  47 #include <asm/io.h>
  48
  49 #define MB_TO_PAGES(addr)               ((addr) << (20 - PAGE_SHIFT))
  50
  51 static inline void numaq_register_node(int node, struct sys_cfg_data *scd)
  52 {
  53         struct eachquadmem *eq = scd->eq + node;
  54
  55         node_set_online(node);
  56
  57         /* Convert to pages */
  58         node_start_pfn[node] =
  59                  MB_TO_PAGES(eq->hi_shrd_mem_start - eq->priv_mem_size);
  60
  61         node_end_pfn[node] =
  62                  MB_TO_PAGES(eq->hi_shrd_mem_start + eq->hi_shrd_mem_size);
  63
  64         e820_register_active_regions(node, node_start_pfn[node],
  65                                                 node_end_pfn[node]);
  66
  67         memory_present(node, node_start_pfn[node], node_end_pfn[node]);
  68
  69         node_remap_size[node] = node_memmap_size_bytes(node,
  70                                         node_start_pfn[node],
  71                                         node_end_pfn[node]);
  72 }
  73
  74 /*
  75  * Function: smp_dump_qct()
  76  *
  77  * Description: gets memory layout from the quad config table.  This
  78  * function also updates node_online_map with the nodes (quads) present.
  79  */
  80 static void __init smp_dump_qct(void)
  81 {
  82         struct sys_cfg_data *scd;
  83         int node;
  84
  85         scd = (void *)__va(SYS_CFG_DATA_PRIV_ADDR);
  86
  87         nodes_clear(node_online_map);
  88         for_each_node(node) {
  89                 if (scd->quads_present31_0 & (1 << node))
  90                         numaq_register_node(node, scd);
  91         }
  92 }
  93
  94 void __cpuinit numaq_tsc_disable(void)
  95 {
  96         if (!found_numaq)
  97                 return;
  98
  99         if (num_online_nodes() > 1) {
 100                 printk(KERN_DEBUG "NUMAQ: disabling TSC\n");
 101                 setup_clear_cpu_cap(X86_FEATURE_TSC);
 102         }
 103 }
 104
 105 static int __init numaq_pre_time_init(void)
 106 {
 107         numaq_tsc_disable();
 108         return 0;
 109 }
 110
 111 int found_numaq;
 112
 113 /*
 114  * Have to match translation table entries to main table entries by counter
 115  * hence the mpc_record variable .... can't see a less disgusting way of
 116  * doing this ....
 117  */
 118 struct mpc_trans {
 119         unsigned char                   mpc_type;
 120         unsigned char                   trans_len;
 121         unsigned char                   trans_type;
 122         unsigned char                   trans_quad;
 123         unsigned char                   trans_global;
 124         unsigned char                   trans_local;
 125         unsigned short                  trans_reserved;
 126 };
 127
 128 /* x86_quirks member */
 129 static int                              mpc_record;
 130
 131 static __cpuinitdata struct mpc_trans   *translation_table[MAX_MPC_ENTRY];
 132
 133 static inline int generate_logical_apicid(int quad, int phys_apicid)
 134 {
 135         return (quad << 4) + (phys_apicid ? phys_apicid << 1 : 1);
 136 }
 137
 138 /* x86_quirks member */
 139 static int mpc_apic_id(struct mpc_cpu *m)
 140 {
 141         int quad = translation_table[mpc_record]->trans_quad;
 142         int logical_apicid = generate_logical_apicid(quad, m->apicid);
 143
 144         printk(KERN_DEBUG
 145                 "Processor #%d %u:%u APIC version %d (quad %d, apic %d)\n",
 146                  m->apicid, (m->cpufeature & CPU_FAMILY_MASK) >> 8,
 147                 (m->cpufeature & CPU_MODEL_MASK) >> 4,
 148                  m->apicver, quad, logical_apicid);
 149
 150         return logical_apicid;
 151 }
 152
 153 int mp_bus_id_to_node[MAX_MP_BUSSES];
 154
 155 int mp_bus_id_to_local[MAX_MP_BUSSES];
 156
 157 /* x86_quirks member */
 158 static void mpc_oem_bus_info(struct mpc_bus *m, char *name)
 159 {
 160         int quad = translation_table[mpc_record]->trans_quad;
 161         int local = translation_table[mpc_record]->trans_local;
 162
 163         mp_bus_id_to_node[m->busid] = quad;
 164         mp_bus_id_to_local[m->busid] = local;
 165
 166         printk(KERN_INFO "Bus #%d is %s (node %d)\n", m->busid, name, quad);
 167 }
 168
 169 int quad_local_to_mp_bus_id[NR_CPUS/4][4];
 170
 171 /* x86_quirks member */
 172 static void mpc_oem_pci_bus(struct mpc_bus *m)
 173 {
 174         int quad = translation_table[mpc_record]->trans_quad;
 175         int local = translation_table[mpc_record]->trans_local;
 176
 177         quad_local_to_mp_bus_id[quad][local] = m->busid;
 178 }
 179
 180 static void __init MP_translation_info(struct mpc_trans *m)
 181 {
 182         printk(KERN_INFO
 183                "Translation: record %d, type %d, quad %d, global %d, local %d\n",
 184                mpc_record, m->trans_type, m->trans_quad, m->trans_global,
 185                m->trans_local);
 186
 187         if (mpc_record >= MAX_MPC_ENTRY)
 188                 printk(KERN_ERR "MAX_MPC_ENTRY exceeded!\n");
 189         else
 190                 translation_table[mpc_record] = m; /* stash this for later */
 191
 192         if (m->trans_quad < MAX_NUMNODES && !node_online(m->trans_quad))
 193                 node_set_online(m->trans_quad);
 194 }
 195
 196 static int __init mpf_checksum(unsigned char *mp, int len)
 197 {
 198         int sum = 0;
 199
 200         while (len--)
 201                 sum += *mp++;
 202
 203         return sum & 0xFF;
 204 }
 205
 206 /*
 207  * Read/parse the MPC oem tables
 208  */
 209 static void __init
 210  smp_read_mpc_oem(struct mpc_oemtable *oemtable, unsigned short oemsize)
 211 {
 212         int count = sizeof(*oemtable);  /* the header size */
 213         unsigned char *oemptr = ((unsigned char *)oemtable) + count;
 214
 215         mpc_record = 0;
 216         printk(KERN_INFO
 217                 "Found an OEM MPC table at %8p - parsing it ... \n", oemtable);
 218
 219         if (memcmp(oemtable->signature, MPC_OEM_SIGNATURE, 4)) {
 220                 printk(KERN_WARNING
 221                        "SMP mpc oemtable: bad signature [%c%c%c%c]!\n",
 222                        oemtable->signature[0], oemtable->signature[1],
 223                        oemtable->signature[2], oemtable->signature[3]);
 224                 return;
 225         }
 226
 227         if (mpf_checksum((unsigned char *)oemtable, oemtable->length)) {
 228                 printk(KERN_WARNING "SMP oem mptable: checksum error!\n");
 229                 return;
 230         }
 231
 232         while (count < oemtable->length) {
 233                 switch (*oemptr) {
 234                 case MP_TRANSLATION:
 235                         {
 236                                 struct mpc_trans *m = (void *)oemptr;
 237
 238                                 MP_translation_info(m);
 239                                 oemptr += sizeof(*m);
 240                                 count += sizeof(*m);
 241                                 ++mpc_record;
 242                                 break;
 243                         }
 244                 default:
 245                         printk(KERN_WARNING
 246                                "Unrecognised OEM table entry type! - %d\n",
 247                                (int)*oemptr);
 248                         return;
 249                 }
 250         }
 251 }
 252
 253 static int __init numaq_setup_ioapic_ids(void)
 254 {
 255         /* so can skip it */
 256         return 1;
 257 }
 258
 259 static int __init numaq_update_genapic(void)
 260 {
 261         apic->wakeup_cpu = wakeup_secondary_cpu_via_nmi;
 262
 263         return 0;
 264 }
 265
 266 static struct x86_quirks numaq_x86_quirks __initdata = {
 267         .arch_pre_time_init             = numaq_pre_time_init,
 268         .arch_time_init                 = NULL,
 269         .arch_pre_intr_init             = NULL,
 270         .arch_memory_setup              = NULL,
 271         .arch_intr_init                 = NULL,
 272         .arch_trap_init                 = NULL,
 273         .mach_get_smp_config            = NULL,
 274         .mach_find_smp_config           = NULL,
 275         .mpc_record                     = &mpc_record,
 276         .mpc_apic_id                    = mpc_apic_id,
 277         .mpc_oem_bus_info               = mpc_oem_bus_info,
 278         .mpc_oem_pci_bus                = mpc_oem_pci_bus,
 279         .smp_read_mpc_oem               = smp_read_mpc_oem,
 280         .setup_ioapic_ids               = numaq_setup_ioapic_ids,
 281         .update_genapic                 = numaq_update_genapic,
 282 };
 283
 284 void numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 285 {
 286         if (strncmp(oem, "IBM NUMA", 8))
 287                 printk("Warning!  Not a NUMA-Q system!\n");
 288         else
 289                 found_numaq = 1;
 290 }
 291
 292 static __init void early_check_numaq(void)
 293 {
 294         /*
 295          * Find possible boot-time SMP configuration:
 296          */
 297         early_find_smp_config();
 298
 299         /*
 300          * get boot-time SMP configuration:
 301          */
 302         if (smp_found_config)
 303                 early_get_smp_config();
 304
 305         if (found_numaq)
 306                 x86_quirks = &numaq_x86_quirks;
 307 }
 308
 309 int __init get_memcfg_numaq(void)
 310 {
 311         early_check_numaq();
 312         if (!found_numaq)
 313                 return 0;
 314         smp_dump_qct();
 315
 316         return 1;
 317 }
 318
 319 #define NUMAQ_APIC_DFR_VALUE    (APIC_DFR_CLUSTER)
 320
 321 static inline unsigned int numaq_get_apic_id(unsigned long x)
 322 {
 323         return (x >> 24) & 0x0F;
 324 }
 325
 326 static inline void numaq_send_IPI_mask(const struct cpumask *mask, int vector)
 327 {
 328         default_send_IPI_mask_sequence_logical(mask, vector);
 329 }
 330
 331 static inline void numaq_send_IPI_allbutself(int vector)
 332 {
 333         default_send_IPI_mask_allbutself_logical(cpu_online_mask, vector);
 334 }
 335
 336 static inline void numaq_send_IPI_all(int vector)
 337 {
 338         numaq_send_IPI_mask(cpu_online_mask, vector);
 339 }
 340
 341 extern void numaq_mps_oem_check(struct mpc_table *, char *, char *);
 342
 343 #define NUMAQ_TRAMPOLINE_PHYS_LOW       (0x8)
 344 #define NUMAQ_TRAMPOLINE_PHYS_HIGH      (0xa)
 345
 346 /*
 347  * Because we use NMIs rather than the INIT-STARTUP sequence to
 348  * bootstrap the CPUs, the APIC may be in a weird state. Kick it:
 349  */
 350 static inline void numaq_smp_callin_clear_local_apic(void)
 351 {
 352         clear_local_APIC();
 353 }
 354
 355 static inline void
 356 numaq_store_NMI_vector(unsigned short *high, unsigned short *low)
 357 {
 358         printk("Storing NMI vector\n");
 359         *high =
 360           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_HIGH));
 361         *low =
 362           *((volatile unsigned short *)phys_to_virt(NUMAQ_TRAMPOLINE_PHYS_LOW));
 363 }
 364
 365 static inline const cpumask_t *numaq_target_cpus(void)
 366 {
 367         return &CPU_MASK_ALL;
 368 }
 369
 370 static inline unsigned long
 371 numaq_check_apicid_used(physid_mask_t bitmap, int apicid)
 372 {
 373         return physid_isset(apicid, bitmap);
 374 }
 375
 376 static inline unsigned long numaq_check_apicid_present(int bit)
 377 {
 378         return physid_isset(bit, phys_cpu_present_map);
 379 }
 380
 381 static inline int numaq_apic_id_registered(void)
 382 {
 383         return 1;
 384 }
 385
 386 static inline void numaq_init_apic_ldr(void)
 387 {
 388         /* Already done in NUMA-Q firmware */
 389 }
 390
 391 static inline void numaq_setup_apic_routing(void)
 392 {
 393         printk("Enabling APIC mode:  %s.  Using %d I/O APICs\n",
 394                 "NUMA-Q", nr_ioapics);
 395 }
 396
 397 /*
 398  * Skip adding the timer int on secondary nodes, which causes
 399  * a small but painful rift in the time-space continuum.
 400  */
 401 static inline int numaq_multi_timer_check(int apic, int irq)
 402 {
 403         return apic != 0 && irq == 0;
 404 }
 405
 406 static inline physid_mask_t numaq_ioapic_phys_id_map(physid_mask_t phys_map)
 407 {
 408         /* We don't have a good way to do this yet - hack */
 409         return physids_promote(0xFUL);
 410 }
 411
 412 static inline int numaq_cpu_to_logical_apicid(int cpu)
 413 {
 414         if (cpu >= nr_cpu_ids)
 415                 return BAD_APICID;
 416         return cpu_2_logical_apicid[cpu];
 417 }
 418
 419 /*
 420  * Supporting over 60 cpus on NUMA-Q requires a locality-dependent
 421  * cpu to APIC ID relation to properly interact with the intelligent
 422  * mode of the cluster controller.
 423  */
 424 static inline int numaq_cpu_present_to_apicid(int mps_cpu)
 425 {
 426         if (mps_cpu < 60)
 427                 return ((mps_cpu >> 2) << 4) | (1 << (mps_cpu & 0x3));
 428         else
 429                 return BAD_APICID;
 430 }
 431
 432 static inline int numaq_apicid_to_node(int logical_apicid)
 433 {
 434         return logical_apicid >> 4;
 435 }
 436
 437 static inline physid_mask_t numaq_apicid_to_cpu_present(int logical_apicid)
 438 {
 439         int node = numaq_apicid_to_node(logical_apicid);
 440         int cpu = __ffs(logical_apicid & 0xf);
 441
 442         return physid_mask_of_physid(cpu + 4*node);
 443 }
 444
 445 /* Where the IO area was mapped on multiquad, always 0 otherwise */
 446 void *xquad_portio;
 447
 448 static inline int numaq_check_phys_apicid_present(int boot_cpu_physical_apicid)
 449 {
 450         return 1;
 451 }
 452
 453 /*
 454  * We use physical apicids here, not logical, so just return the default
 455  * physical broadcast to stop people from breaking us
 456  */
 457 static inline unsigned int numaq_cpu_mask_to_apicid(const cpumask_t *cpumask)
 458 {
 459         return 0x0F;
 460 }
 461
 462 static inline unsigned int
 463 numaq_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
 464                              const struct cpumask *andmask)
 465 {
 466         return 0x0F;
 467 }
 468
 469 /* No NUMA-Q box has a HT CPU, but it can't hurt to use the default code. */
 470 static inline int numaq_phys_pkg_id(int cpuid_apic, int index_msb)
 471 {
 472         return cpuid_apic >> index_msb;
 473 }
 474
 475 static int
 476 __numaq_mps_oem_check(struct mpc_table *mpc, char *oem, char *productid)
 477 {
 478         numaq_mps_oem_check(mpc, oem, productid);
 479         return found_numaq;
 480 }
 481
 482 static int probe_numaq(void)
 483 {
 484         /* already know from get_memcfg_numaq() */
 485         return found_numaq;
 486 }
 487
 488 static void numaq_vector_allocation_domain(int cpu, cpumask_t *retmask)
 489 {
 490         /* Careful. Some cpus do not strictly honor the set of cpus
 491          * specified in the interrupt destination when using lowest
 492          * priority interrupt delivery mode.
 493          *
 494          * In particular there was a hyperthreading cpu observed to
 495          * deliver interrupts to the wrong hyperthread when only one
 496          * hyperthread was specified in the interrupt desitination.
 497          */
 498         *retmask = (cpumask_t){ { [0] = APIC_ALL_CPUS, } };
 499 }
 500
 501 static void numaq_setup_portio_remap(void)
 502 {
 503         int num_quads = num_online_nodes();
 504
 505         if (num_quads <= 1)
 506                 return;
 507
 508         printk("Remapping cross-quad port I/O for %d quads\n", num_quads);
 509         xquad_portio = ioremap(XQUAD_PORTIO_BASE, num_quads*XQUAD_PORTIO_QUAD);
 510         printk("xquad_portio vaddr 0x%08lx, len %08lx\n",
 511                 (u_long) xquad_portio, (u_long) num_quads*XQUAD_PORTIO_QUAD);
 512 }
 513
 514 struct genapic apic_numaq = {
 515
 516         .name                           = "NUMAQ",
 517         .probe                          = probe_numaq,
 518         .acpi_madt_oem_check            = NULL,
 519         .apic_id_registered             = numaq_apic_id_registered,
 520
 521         .irq_delivery_mode              = dest_LowestPrio,
 522         /* physical delivery on LOCAL quad: */
 523         .irq_dest_mode                  = 0,
 524
 525         .target_cpus                    = numaq_target_cpus,
 526         .disable_esr                    = 1,
 527         .dest_logical                   = APIC_DEST_LOGICAL,
 528         .check_apicid_used              = numaq_check_apicid_used,
 529         .check_apicid_present           = numaq_check_apicid_present,
 530
 531         .vector_allocation_domain       = numaq_vector_allocation_domain,
 532         .init_apic_ldr                  = numaq_init_apic_ldr,
 533
 534         .ioapic_phys_id_map             = numaq_ioapic_phys_id_map,
 535         .setup_apic_routing             = numaq_setup_apic_routing,
 536         .multi_timer_check              = numaq_multi_timer_check,
 537         .apicid_to_node                 = numaq_apicid_to_node,
 538         .cpu_to_logical_apicid          = numaq_cpu_to_logical_apicid,
 539         .cpu_present_to_apicid          = numaq_cpu_present_to_apicid,
 540         .apicid_to_cpu_present          = numaq_apicid_to_cpu_present,
 541         .setup_portio_remap             = numaq_setup_portio_remap,
 542         .check_phys_apicid_present      = numaq_check_phys_apicid_present,
 543         .enable_apic_mode               = NULL,
 544         .phys_pkg_id                    = numaq_phys_pkg_id,
 545         .mps_oem_check                  = __numaq_mps_oem_check,
 546
 547         .get_apic_id                    = numaq_get_apic_id,
 548         .set_apic_id                    = NULL,
 549         .apic_id_mask                   = 0x0F << 24,
 550
 551         .cpu_mask_to_apicid             = numaq_cpu_mask_to_apicid,
 552         .cpu_mask_to_apicid_and         = numaq_cpu_mask_to_apicid_and,
 553
 554         .send_IPI_mask                  = numaq_send_IPI_mask,
 555         .send_IPI_mask_allbutself       = NULL,
 556         .send_IPI_allbutself            = numaq_send_IPI_allbutself,
 557         .send_IPI_all                   = numaq_send_IPI_all,
 558         .send_IPI_self                  = default_send_IPI_self,
 559
 560         .wakeup_cpu                     = NULL,
 561         .trampoline_phys_low            = NUMAQ_TRAMPOLINE_PHYS_LOW,
 562         .trampoline_phys_high           = NUMAQ_TRAMPOLINE_PHYS_HIGH,
 563
 564         /* We don't do anything here because we use NMI's to boot instead */
 565         .wait_for_init_deassert         = NULL,
 566
 567         .smp_callin_clear_local_apic    = numaq_smp_callin_clear_local_apic,
 568         .store_NMI_vector               = numaq_store_NMI_vector,
 569         .inquire_remote_apic            = NULL,
 570
 571         .read                           = native_apic_mem_read,
 572         .write                          = native_apic_mem_write,
 573         .icr_read                       = native_apic_icr_read,
 574         .icr_write                      = native_apic_icr_write,
 575         .wait_icr_idle                  = native_apic_wait_icr_idle,
 576         .safe_wait_icr_idle             = native_safe_apic_wait_icr_idle,
 577 };