2 * Procedures for creating, accessing and interpreting the device tree.
4 * Paul Mackerras August 1996.
5 * Copyright (C) 1996-2005 Paul Mackerras.
7 * Adapted for 64bit PowerPC by Dave Engebretsen and Peter Bergner.
8 * {engebret|bergner}@us.ibm.com
10 * Adapted for sparc64 by David S. Miller davem@davemloft.net
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
18 #include <linux/kernel.h>
19 #include <linux/types.h>
20 #include <linux/string.h>
22 #include <linux/bootmem.h>
23 #include <linux/module.h>
26 #include <asm/of_device.h>
27 #include <asm/oplib.h>
33 static struct device_node *allnodes;
35 /* use when traversing tree through the allnext, child, sibling,
36 * or parent members of struct device_node.
38 static DEFINE_RWLOCK(devtree_lock);
40 struct device_node *of_get_parent(const struct device_node *node)
42 struct device_node *np;
51 EXPORT_SYMBOL(of_get_parent);
53 struct device_node *of_get_next_child(const struct device_node *node,
54 struct device_node *prev)
56 struct device_node *next;
58 next = prev ? prev->sibling : node->child;
59 for (; next != 0; next = next->sibling) {
65 EXPORT_SYMBOL(of_get_next_child);
67 struct device_node *of_find_node_by_path(const char *path)
69 struct device_node *np = allnodes;
71 for (; np != 0; np = np->allnext) {
72 if (np->full_name != 0 && strcmp(np->full_name, path) == 0)
78 EXPORT_SYMBOL(of_find_node_by_path);
80 struct device_node *of_find_node_by_phandle(phandle handle)
82 struct device_node *np;
84 for (np = allnodes; np != 0; np = np->allnext)
85 if (np->node == handle)
90 EXPORT_SYMBOL(of_find_node_by_phandle);
92 struct device_node *of_find_node_by_name(struct device_node *from,
95 struct device_node *np;
97 np = from ? from->allnext : allnodes;
98 for (; np != NULL; np = np->allnext)
99 if (np->name != NULL && strcmp(np->name, name) == 0)
104 EXPORT_SYMBOL(of_find_node_by_name);
106 struct device_node *of_find_node_by_type(struct device_node *from,
109 struct device_node *np;
111 np = from ? from->allnext : allnodes;
112 for (; np != 0; np = np->allnext)
113 if (np->type != 0 && strcmp(np->type, type) == 0)
118 EXPORT_SYMBOL(of_find_node_by_type);
120 struct device_node *of_find_compatible_node(struct device_node *from,
121 const char *type, const char *compatible)
123 struct device_node *np;
125 np = from ? from->allnext : allnodes;
126 for (; np != 0; np = np->allnext) {
128 && !(np->type != 0 && strcmp(np->type, type) == 0))
130 if (of_device_is_compatible(np, compatible))
136 EXPORT_SYMBOL(of_find_compatible_node);
138 struct property *of_find_property(const struct device_node *np,
144 for (pp = np->properties; pp != 0; pp = pp->next) {
145 if (strcasecmp(pp->name, name) == 0) {
153 EXPORT_SYMBOL(of_find_property);
155 int of_getintprop_default(struct device_node *np, const char *name, int def)
157 struct property *prop;
160 prop = of_find_property(np, name, &len);
161 if (!prop || len != 4)
164 return *(int *) prop->value;
166 EXPORT_SYMBOL(of_getintprop_default);
168 int of_set_property(struct device_node *dp, const char *name, void *val, int len)
170 struct property **prevp;
174 new_val = kmalloc(len, GFP_KERNEL);
178 memcpy(new_val, val, len);
182 write_lock(&devtree_lock);
183 prevp = &dp->properties;
185 struct property *prop = *prevp;
187 if (!strcasecmp(prop->name, name)) {
188 void *old_val = prop->value;
191 ret = prom_setprop(dp->node, name, val, len);
194 prop->value = new_val;
197 if (OF_IS_DYNAMIC(prop))
200 OF_MARK_DYNAMIC(prop);
206 prevp = &(*prevp)->next;
208 write_unlock(&devtree_lock);
210 /* XXX Upate procfs if necessary... */
214 EXPORT_SYMBOL(of_set_property);
216 static unsigned int prom_early_allocated;
218 static void * __init prom_early_alloc(unsigned long size)
222 ret = __alloc_bootmem(size, SMP_CACHE_BYTES, 0UL);
224 memset(ret, 0, size);
226 prom_early_allocated += size;
232 /* PSYCHO interrupt mapping support. */
233 #define PSYCHO_IMAP_A_SLOT0 0x0c00UL
234 #define PSYCHO_IMAP_B_SLOT0 0x0c20UL
235 static unsigned long psycho_pcislot_imap_offset(unsigned long ino)
237 unsigned int bus = (ino & 0x10) >> 4;
238 unsigned int slot = (ino & 0x0c) >> 2;
241 return PSYCHO_IMAP_A_SLOT0 + (slot * 8);
243 return PSYCHO_IMAP_B_SLOT0 + (slot * 8);
246 #define PSYCHO_IMAP_SCSI 0x1000UL
247 #define PSYCHO_IMAP_ETH 0x1008UL
248 #define PSYCHO_IMAP_BPP 0x1010UL
249 #define PSYCHO_IMAP_AU_REC 0x1018UL
250 #define PSYCHO_IMAP_AU_PLAY 0x1020UL
251 #define PSYCHO_IMAP_PFAIL 0x1028UL
252 #define PSYCHO_IMAP_KMS 0x1030UL
253 #define PSYCHO_IMAP_FLPY 0x1038UL
254 #define PSYCHO_IMAP_SHW 0x1040UL
255 #define PSYCHO_IMAP_KBD 0x1048UL
256 #define PSYCHO_IMAP_MS 0x1050UL
257 #define PSYCHO_IMAP_SER 0x1058UL
258 #define PSYCHO_IMAP_TIM0 0x1060UL
259 #define PSYCHO_IMAP_TIM1 0x1068UL
260 #define PSYCHO_IMAP_UE 0x1070UL
261 #define PSYCHO_IMAP_CE 0x1078UL
262 #define PSYCHO_IMAP_A_ERR 0x1080UL
263 #define PSYCHO_IMAP_B_ERR 0x1088UL
264 #define PSYCHO_IMAP_PMGMT 0x1090UL
265 #define PSYCHO_IMAP_GFX 0x1098UL
266 #define PSYCHO_IMAP_EUPA 0x10a0UL
268 static unsigned long __psycho_onboard_imap_off[] = {
269 /*0x20*/ PSYCHO_IMAP_SCSI,
270 /*0x21*/ PSYCHO_IMAP_ETH,
271 /*0x22*/ PSYCHO_IMAP_BPP,
272 /*0x23*/ PSYCHO_IMAP_AU_REC,
273 /*0x24*/ PSYCHO_IMAP_AU_PLAY,
274 /*0x25*/ PSYCHO_IMAP_PFAIL,
275 /*0x26*/ PSYCHO_IMAP_KMS,
276 /*0x27*/ PSYCHO_IMAP_FLPY,
277 /*0x28*/ PSYCHO_IMAP_SHW,
278 /*0x29*/ PSYCHO_IMAP_KBD,
279 /*0x2a*/ PSYCHO_IMAP_MS,
280 /*0x2b*/ PSYCHO_IMAP_SER,
281 /*0x2c*/ PSYCHO_IMAP_TIM0,
282 /*0x2d*/ PSYCHO_IMAP_TIM1,
283 /*0x2e*/ PSYCHO_IMAP_UE,
284 /*0x2f*/ PSYCHO_IMAP_CE,
285 /*0x30*/ PSYCHO_IMAP_A_ERR,
286 /*0x31*/ PSYCHO_IMAP_B_ERR,
287 /*0x32*/ PSYCHO_IMAP_PMGMT,
288 /*0x33*/ PSYCHO_IMAP_GFX,
289 /*0x34*/ PSYCHO_IMAP_EUPA,
291 #define PSYCHO_ONBOARD_IRQ_BASE 0x20
292 #define PSYCHO_ONBOARD_IRQ_LAST 0x34
293 #define psycho_onboard_imap_offset(__ino) \
294 __psycho_onboard_imap_off[(__ino) - PSYCHO_ONBOARD_IRQ_BASE]
296 #define PSYCHO_ICLR_A_SLOT0 0x1400UL
297 #define PSYCHO_ICLR_SCSI 0x1800UL
299 #define psycho_iclr_offset(ino) \
300 ((ino & 0x20) ? (PSYCHO_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
301 (PSYCHO_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
303 static unsigned int psycho_irq_build(struct device_node *dp,
307 unsigned long controller_regs = (unsigned long) _data;
308 unsigned long imap, iclr;
309 unsigned long imap_off, iclr_off;
313 if (ino < PSYCHO_ONBOARD_IRQ_BASE) {
315 imap_off = psycho_pcislot_imap_offset(ino);
318 if (ino > PSYCHO_ONBOARD_IRQ_LAST) {
319 prom_printf("psycho_irq_build: Wacky INO [%x]\n", ino);
322 imap_off = psycho_onboard_imap_offset(ino);
325 /* Now build the IRQ bucket. */
326 imap = controller_regs + imap_off;
328 iclr_off = psycho_iclr_offset(ino);
329 iclr = controller_regs + iclr_off;
331 if ((ino & 0x20) == 0)
332 inofixup = ino & 0x03;
334 return build_irq(inofixup, iclr, imap);
337 static void __init psycho_irq_trans_init(struct device_node *dp)
339 const struct linux_prom64_registers *regs;
341 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
342 dp->irq_trans->irq_build = psycho_irq_build;
344 regs = of_get_property(dp, "reg", NULL);
345 dp->irq_trans->data = (void *) regs[2].phys_addr;
348 #define sabre_read(__reg) \
350 __asm__ __volatile__("ldxa [%1] %2, %0" \
352 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
357 struct sabre_irq_data {
358 unsigned long controller_regs;
359 unsigned int pci_first_busno;
361 #define SABRE_CONFIGSPACE 0x001000000UL
362 #define SABRE_WRSYNC 0x1c20UL
364 #define SABRE_CONFIG_BASE(CONFIG_SPACE) \
365 (CONFIG_SPACE | (1UL << 24))
366 #define SABRE_CONFIG_ENCODE(BUS, DEVFN, REG) \
367 (((unsigned long)(BUS) << 16) | \
368 ((unsigned long)(DEVFN) << 8) | \
369 ((unsigned long)(REG)))
371 /* When a device lives behind a bridge deeper in the PCI bus topology
372 * than APB, a special sequence must run to make sure all pending DMA
373 * transfers at the time of IRQ delivery are visible in the coherency
374 * domain by the cpu. This sequence is to perform a read on the far
375 * side of the non-APB bridge, then perform a read of Sabre's DMA
376 * write-sync register.
378 static void sabre_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
380 unsigned int phys_hi = (unsigned int) (unsigned long) _arg1;
381 struct sabre_irq_data *irq_data = _arg2;
382 unsigned long controller_regs = irq_data->controller_regs;
383 unsigned long sync_reg = controller_regs + SABRE_WRSYNC;
384 unsigned long config_space = controller_regs + SABRE_CONFIGSPACE;
385 unsigned int bus, devfn;
388 config_space = SABRE_CONFIG_BASE(config_space);
390 bus = (phys_hi >> 16) & 0xff;
391 devfn = (phys_hi >> 8) & 0xff;
393 config_space |= SABRE_CONFIG_ENCODE(bus, devfn, 0x00);
395 __asm__ __volatile__("membar #Sync\n\t"
396 "lduha [%1] %2, %0\n\t"
399 : "r" ((u16 *) config_space),
400 "i" (ASI_PHYS_BYPASS_EC_E_L)
403 sabre_read(sync_reg);
406 #define SABRE_IMAP_A_SLOT0 0x0c00UL
407 #define SABRE_IMAP_B_SLOT0 0x0c20UL
408 #define SABRE_IMAP_SCSI 0x1000UL
409 #define SABRE_IMAP_ETH 0x1008UL
410 #define SABRE_IMAP_BPP 0x1010UL
411 #define SABRE_IMAP_AU_REC 0x1018UL
412 #define SABRE_IMAP_AU_PLAY 0x1020UL
413 #define SABRE_IMAP_PFAIL 0x1028UL
414 #define SABRE_IMAP_KMS 0x1030UL
415 #define SABRE_IMAP_FLPY 0x1038UL
416 #define SABRE_IMAP_SHW 0x1040UL
417 #define SABRE_IMAP_KBD 0x1048UL
418 #define SABRE_IMAP_MS 0x1050UL
419 #define SABRE_IMAP_SER 0x1058UL
420 #define SABRE_IMAP_UE 0x1070UL
421 #define SABRE_IMAP_CE 0x1078UL
422 #define SABRE_IMAP_PCIERR 0x1080UL
423 #define SABRE_IMAP_GFX 0x1098UL
424 #define SABRE_IMAP_EUPA 0x10a0UL
425 #define SABRE_ICLR_A_SLOT0 0x1400UL
426 #define SABRE_ICLR_B_SLOT0 0x1480UL
427 #define SABRE_ICLR_SCSI 0x1800UL
428 #define SABRE_ICLR_ETH 0x1808UL
429 #define SABRE_ICLR_BPP 0x1810UL
430 #define SABRE_ICLR_AU_REC 0x1818UL
431 #define SABRE_ICLR_AU_PLAY 0x1820UL
432 #define SABRE_ICLR_PFAIL 0x1828UL
433 #define SABRE_ICLR_KMS 0x1830UL
434 #define SABRE_ICLR_FLPY 0x1838UL
435 #define SABRE_ICLR_SHW 0x1840UL
436 #define SABRE_ICLR_KBD 0x1848UL
437 #define SABRE_ICLR_MS 0x1850UL
438 #define SABRE_ICLR_SER 0x1858UL
439 #define SABRE_ICLR_UE 0x1870UL
440 #define SABRE_ICLR_CE 0x1878UL
441 #define SABRE_ICLR_PCIERR 0x1880UL
443 static unsigned long sabre_pcislot_imap_offset(unsigned long ino)
445 unsigned int bus = (ino & 0x10) >> 4;
446 unsigned int slot = (ino & 0x0c) >> 2;
449 return SABRE_IMAP_A_SLOT0 + (slot * 8);
451 return SABRE_IMAP_B_SLOT0 + (slot * 8);
454 static unsigned long __sabre_onboard_imap_off[] = {
455 /*0x20*/ SABRE_IMAP_SCSI,
456 /*0x21*/ SABRE_IMAP_ETH,
457 /*0x22*/ SABRE_IMAP_BPP,
458 /*0x23*/ SABRE_IMAP_AU_REC,
459 /*0x24*/ SABRE_IMAP_AU_PLAY,
460 /*0x25*/ SABRE_IMAP_PFAIL,
461 /*0x26*/ SABRE_IMAP_KMS,
462 /*0x27*/ SABRE_IMAP_FLPY,
463 /*0x28*/ SABRE_IMAP_SHW,
464 /*0x29*/ SABRE_IMAP_KBD,
465 /*0x2a*/ SABRE_IMAP_MS,
466 /*0x2b*/ SABRE_IMAP_SER,
467 /*0x2c*/ 0 /* reserved */,
468 /*0x2d*/ 0 /* reserved */,
469 /*0x2e*/ SABRE_IMAP_UE,
470 /*0x2f*/ SABRE_IMAP_CE,
471 /*0x30*/ SABRE_IMAP_PCIERR,
472 /*0x31*/ 0 /* reserved */,
473 /*0x32*/ 0 /* reserved */,
474 /*0x33*/ SABRE_IMAP_GFX,
475 /*0x34*/ SABRE_IMAP_EUPA,
477 #define SABRE_ONBOARD_IRQ_BASE 0x20
478 #define SABRE_ONBOARD_IRQ_LAST 0x30
479 #define sabre_onboard_imap_offset(__ino) \
480 __sabre_onboard_imap_off[(__ino) - SABRE_ONBOARD_IRQ_BASE]
482 #define sabre_iclr_offset(ino) \
483 ((ino & 0x20) ? (SABRE_ICLR_SCSI + (((ino) & 0x1f) << 3)) : \
484 (SABRE_ICLR_A_SLOT0 + (((ino) & 0x1f)<<3)))
486 static int sabre_device_needs_wsync(struct device_node *dp)
488 struct device_node *parent = dp->parent;
489 const char *parent_model, *parent_compat;
491 /* This traversal up towards the root is meant to
494 * 1) non-PCI bus sitting under PCI, such as 'ebus'
495 * 2) the PCI controller interrupts themselves, which
496 * will use the sabre_irq_build but do not need
497 * the DMA synchronization handling
500 if (!strcmp(parent->type, "pci"))
502 parent = parent->parent;
508 parent_model = of_get_property(parent,
511 (!strcmp(parent_model, "SUNW,sabre") ||
512 !strcmp(parent_model, "SUNW,simba")))
515 parent_compat = of_get_property(parent,
518 (!strcmp(parent_compat, "pci108e,a000") ||
519 !strcmp(parent_compat, "pci108e,a001")))
525 static unsigned int sabre_irq_build(struct device_node *dp,
529 struct sabre_irq_data *irq_data = _data;
530 unsigned long controller_regs = irq_data->controller_regs;
531 const struct linux_prom_pci_registers *regs;
532 unsigned long imap, iclr;
533 unsigned long imap_off, iclr_off;
538 if (ino < SABRE_ONBOARD_IRQ_BASE) {
540 imap_off = sabre_pcislot_imap_offset(ino);
543 if (ino > SABRE_ONBOARD_IRQ_LAST) {
544 prom_printf("sabre_irq_build: Wacky INO [%x]\n", ino);
547 imap_off = sabre_onboard_imap_offset(ino);
550 /* Now build the IRQ bucket. */
551 imap = controller_regs + imap_off;
553 iclr_off = sabre_iclr_offset(ino);
554 iclr = controller_regs + iclr_off;
556 if ((ino & 0x20) == 0)
557 inofixup = ino & 0x03;
559 virt_irq = build_irq(inofixup, iclr, imap);
561 /* If the parent device is a PCI<->PCI bridge other than
562 * APB, we have to install a pre-handler to ensure that
563 * all pending DMA is drained before the interrupt handler
566 regs = of_get_property(dp, "reg", NULL);
567 if (regs && sabre_device_needs_wsync(dp)) {
568 irq_install_pre_handler(virt_irq,
570 (void *) (long) regs->phys_hi,
577 static void __init sabre_irq_trans_init(struct device_node *dp)
579 const struct linux_prom64_registers *regs;
580 struct sabre_irq_data *irq_data;
583 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
584 dp->irq_trans->irq_build = sabre_irq_build;
586 irq_data = prom_early_alloc(sizeof(struct sabre_irq_data));
588 regs = of_get_property(dp, "reg", NULL);
589 irq_data->controller_regs = regs[0].phys_addr;
591 busrange = of_get_property(dp, "bus-range", NULL);
592 irq_data->pci_first_busno = busrange[0];
594 dp->irq_trans->data = irq_data;
597 /* SCHIZO interrupt mapping support. Unlike Psycho, for this controller the
598 * imap/iclr registers are per-PBM.
600 #define SCHIZO_IMAP_BASE 0x1000UL
601 #define SCHIZO_ICLR_BASE 0x1400UL
603 static unsigned long schizo_imap_offset(unsigned long ino)
605 return SCHIZO_IMAP_BASE + (ino * 8UL);
608 static unsigned long schizo_iclr_offset(unsigned long ino)
610 return SCHIZO_ICLR_BASE + (ino * 8UL);
613 static unsigned long schizo_ino_to_iclr(unsigned long pbm_regs,
617 return pbm_regs + schizo_iclr_offset(ino);
620 static unsigned long schizo_ino_to_imap(unsigned long pbm_regs,
623 return pbm_regs + schizo_imap_offset(ino);
626 #define schizo_read(__reg) \
628 __asm__ __volatile__("ldxa [%1] %2, %0" \
630 : "r" (__reg), "i" (ASI_PHYS_BYPASS_EC_E) \
634 #define schizo_write(__reg, __val) \
635 __asm__ __volatile__("stxa %0, [%1] %2" \
637 : "r" (__val), "r" (__reg), \
638 "i" (ASI_PHYS_BYPASS_EC_E) \
641 static void tomatillo_wsync_handler(unsigned int ino, void *_arg1, void *_arg2)
643 unsigned long sync_reg = (unsigned long) _arg2;
644 u64 mask = 1UL << (ino & IMAP_INO);
648 schizo_write(sync_reg, mask);
653 val = schizo_read(sync_reg);
658 printk("tomatillo_wsync_handler: DMA won't sync [%lx:%lx]\n",
663 static unsigned char cacheline[64]
664 __attribute__ ((aligned (64)));
666 __asm__ __volatile__("rd %%fprs, %0\n\t"
668 "wr %1, 0x0, %%fprs\n\t"
669 "stda %%f0, [%5] %6\n\t"
670 "wr %0, 0x0, %%fprs\n\t"
672 : "=&r" (mask), "=&r" (val)
673 : "0" (mask), "1" (val),
674 "i" (FPRS_FEF), "r" (&cacheline[0]),
675 "i" (ASI_BLK_COMMIT_P));
679 struct schizo_irq_data {
680 unsigned long pbm_regs;
681 unsigned long sync_reg;
686 static unsigned int schizo_irq_build(struct device_node *dp,
690 struct schizo_irq_data *irq_data = _data;
691 unsigned long pbm_regs = irq_data->pbm_regs;
692 unsigned long imap, iclr;
699 /* Now build the IRQ bucket. */
700 imap = schizo_ino_to_imap(pbm_regs, ino);
701 iclr = schizo_ino_to_iclr(pbm_regs, ino);
703 /* On Schizo, no inofixup occurs. This is because each
704 * INO has it's own IMAP register. On Psycho and Sabre
705 * there is only one IMAP register for each PCI slot even
706 * though four different INOs can be generated by each
709 * But, for JBUS variants (essentially, Tomatillo), we have
710 * to fixup the lowest bit of the interrupt group number.
714 is_tomatillo = (irq_data->sync_reg != 0UL);
717 if (irq_data->portid & 1)
718 ign_fixup = (1 << 6);
721 virt_irq = build_irq(ign_fixup, iclr, imap);
724 irq_install_pre_handler(virt_irq,
725 tomatillo_wsync_handler,
726 ((irq_data->chip_version <= 4) ?
727 (void *) 1 : (void *) 0),
728 (void *) irq_data->sync_reg);
734 static void __init __schizo_irq_trans_init(struct device_node *dp,
737 const struct linux_prom64_registers *regs;
738 struct schizo_irq_data *irq_data;
740 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
741 dp->irq_trans->irq_build = schizo_irq_build;
743 irq_data = prom_early_alloc(sizeof(struct schizo_irq_data));
745 regs = of_get_property(dp, "reg", NULL);
746 dp->irq_trans->data = irq_data;
748 irq_data->pbm_regs = regs[0].phys_addr;
750 irq_data->sync_reg = regs[3].phys_addr + 0x1a18UL;
752 irq_data->sync_reg = 0UL;
753 irq_data->portid = of_getintprop_default(dp, "portid", 0);
754 irq_data->chip_version = of_getintprop_default(dp, "version#", 0);
757 static void __init schizo_irq_trans_init(struct device_node *dp)
759 __schizo_irq_trans_init(dp, 0);
762 static void __init tomatillo_irq_trans_init(struct device_node *dp)
764 __schizo_irq_trans_init(dp, 1);
767 static unsigned int pci_sun4v_irq_build(struct device_node *dp,
771 u32 devhandle = (u32) (unsigned long) _data;
773 return sun4v_build_irq(devhandle, devino);
776 static void __init pci_sun4v_irq_trans_init(struct device_node *dp)
778 const struct linux_prom64_registers *regs;
780 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
781 dp->irq_trans->irq_build = pci_sun4v_irq_build;
783 regs = of_get_property(dp, "reg", NULL);
784 dp->irq_trans->data = (void *) (unsigned long)
785 ((regs->phys_addr >> 32UL) & 0x0fffffff);
788 struct fire_irq_data {
789 unsigned long pbm_regs;
793 #define FIRE_IMAP_BASE 0x001000
794 #define FIRE_ICLR_BASE 0x001400
796 static unsigned long fire_imap_offset(unsigned long ino)
798 return FIRE_IMAP_BASE + (ino * 8UL);
801 static unsigned long fire_iclr_offset(unsigned long ino)
803 return FIRE_ICLR_BASE + (ino * 8UL);
806 static unsigned long fire_ino_to_iclr(unsigned long pbm_regs,
809 return pbm_regs + fire_iclr_offset(ino);
812 static unsigned long fire_ino_to_imap(unsigned long pbm_regs,
815 return pbm_regs + fire_imap_offset(ino);
818 static unsigned int fire_irq_build(struct device_node *dp,
822 struct fire_irq_data *irq_data = _data;
823 unsigned long pbm_regs = irq_data->pbm_regs;
824 unsigned long imap, iclr;
825 unsigned long int_ctrlr;
829 /* Now build the IRQ bucket. */
830 imap = fire_ino_to_imap(pbm_regs, ino);
831 iclr = fire_ino_to_iclr(pbm_regs, ino);
833 /* Set the interrupt controller number. */
835 upa_writeq(int_ctrlr, imap);
837 /* The interrupt map registers do not have an INO field
838 * like other chips do. They return zero in the INO
839 * field, and the interrupt controller number is controlled
840 * in bits 6 to 9. So in order for build_irq() to get
841 * the INO right we pass it in as part of the fixup
842 * which will get added to the map register zero value
843 * read by build_irq().
845 ino |= (irq_data->portid << 6);
847 return build_irq(ino, iclr, imap);
850 static void __init fire_irq_trans_init(struct device_node *dp)
852 const struct linux_prom64_registers *regs;
853 struct fire_irq_data *irq_data;
855 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
856 dp->irq_trans->irq_build = fire_irq_build;
858 irq_data = prom_early_alloc(sizeof(struct fire_irq_data));
860 regs = of_get_property(dp, "reg", NULL);
861 dp->irq_trans->data = irq_data;
863 irq_data->pbm_regs = regs[0].phys_addr;
864 irq_data->portid = of_getintprop_default(dp, "portid", 0);
866 #endif /* CONFIG_PCI */
869 /* INO number to IMAP register offset for SYSIO external IRQ's.
870 * This should conform to both Sunfire/Wildfire server and Fusion
873 #define SYSIO_IMAP_SLOT0 0x2c00UL
874 #define SYSIO_IMAP_SLOT1 0x2c08UL
875 #define SYSIO_IMAP_SLOT2 0x2c10UL
876 #define SYSIO_IMAP_SLOT3 0x2c18UL
877 #define SYSIO_IMAP_SCSI 0x3000UL
878 #define SYSIO_IMAP_ETH 0x3008UL
879 #define SYSIO_IMAP_BPP 0x3010UL
880 #define SYSIO_IMAP_AUDIO 0x3018UL
881 #define SYSIO_IMAP_PFAIL 0x3020UL
882 #define SYSIO_IMAP_KMS 0x3028UL
883 #define SYSIO_IMAP_FLPY 0x3030UL
884 #define SYSIO_IMAP_SHW 0x3038UL
885 #define SYSIO_IMAP_KBD 0x3040UL
886 #define SYSIO_IMAP_MS 0x3048UL
887 #define SYSIO_IMAP_SER 0x3050UL
888 #define SYSIO_IMAP_TIM0 0x3060UL
889 #define SYSIO_IMAP_TIM1 0x3068UL
890 #define SYSIO_IMAP_UE 0x3070UL
891 #define SYSIO_IMAP_CE 0x3078UL
892 #define SYSIO_IMAP_SBERR 0x3080UL
893 #define SYSIO_IMAP_PMGMT 0x3088UL
894 #define SYSIO_IMAP_GFX 0x3090UL
895 #define SYSIO_IMAP_EUPA 0x3098UL
897 #define bogon ((unsigned long) -1)
898 static unsigned long sysio_irq_offsets[] = {
899 /* SBUS Slot 0 --> 3, level 1 --> 7 */
900 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
901 SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0, SYSIO_IMAP_SLOT0,
902 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
903 SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1, SYSIO_IMAP_SLOT1,
904 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
905 SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2, SYSIO_IMAP_SLOT2,
906 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
907 SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3, SYSIO_IMAP_SLOT3,
909 /* Onboard devices (not relevant/used on SunFire). */
940 #define NUM_SYSIO_OFFSETS ARRAY_SIZE(sysio_irq_offsets)
942 /* Convert Interrupt Mapping register pointer to associated
943 * Interrupt Clear register pointer, SYSIO specific version.
945 #define SYSIO_ICLR_UNUSED0 0x3400UL
946 #define SYSIO_ICLR_SLOT0 0x3408UL
947 #define SYSIO_ICLR_SLOT1 0x3448UL
948 #define SYSIO_ICLR_SLOT2 0x3488UL
949 #define SYSIO_ICLR_SLOT3 0x34c8UL
950 static unsigned long sysio_imap_to_iclr(unsigned long imap)
952 unsigned long diff = SYSIO_ICLR_UNUSED0 - SYSIO_IMAP_SLOT0;
956 static unsigned int sbus_of_build_irq(struct device_node *dp,
960 unsigned long reg_base = (unsigned long) _data;
961 const struct linux_prom_registers *regs;
962 unsigned long imap, iclr;
968 regs = of_get_property(dp, "reg", NULL);
970 sbus_slot = regs->which_io;
973 ino += (sbus_slot * 8);
975 imap = sysio_irq_offsets[ino];
976 if (imap == ((unsigned long)-1)) {
977 prom_printf("get_irq_translations: Bad SYSIO INO[%x]\n",
983 /* SYSIO inconsistency. For external SLOTS, we have to select
984 * the right ICLR register based upon the lower SBUS irq level
988 iclr = sysio_imap_to_iclr(imap);
990 sbus_level = ino & 0x7;
994 iclr = reg_base + SYSIO_ICLR_SLOT0;
997 iclr = reg_base + SYSIO_ICLR_SLOT1;
1000 iclr = reg_base + SYSIO_ICLR_SLOT2;
1004 iclr = reg_base + SYSIO_ICLR_SLOT3;
1008 iclr += ((unsigned long)sbus_level - 1UL) * 8UL;
1010 return build_irq(sbus_level, iclr, imap);
1013 static void __init sbus_irq_trans_init(struct device_node *dp)
1015 const struct linux_prom64_registers *regs;
1017 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1018 dp->irq_trans->irq_build = sbus_of_build_irq;
1020 regs = of_get_property(dp, "reg", NULL);
1021 dp->irq_trans->data = (void *) (unsigned long) regs->phys_addr;
1023 #endif /* CONFIG_SBUS */
1026 static unsigned int central_build_irq(struct device_node *dp,
1030 struct device_node *central_dp = _data;
1031 struct of_device *central_op = of_find_device_by_node(central_dp);
1032 struct resource *res;
1033 unsigned long imap, iclr;
1036 if (!strcmp(dp->name, "eeprom")) {
1037 res = ¢ral_op->resource[5];
1038 } else if (!strcmp(dp->name, "zs")) {
1039 res = ¢ral_op->resource[4];
1040 } else if (!strcmp(dp->name, "clock-board")) {
1041 res = ¢ral_op->resource[3];
1046 imap = res->start + 0x00UL;
1047 iclr = res->start + 0x10UL;
1049 /* Set the INO state to idle, and disable. */
1050 upa_writel(0, iclr);
1053 tmp = upa_readl(imap);
1055 upa_writel(tmp, imap);
1057 return build_irq(0, iclr, imap);
1060 static void __init central_irq_trans_init(struct device_node *dp)
1062 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1063 dp->irq_trans->irq_build = central_build_irq;
1065 dp->irq_trans->data = dp;
1070 void (*init)(struct device_node *);
1074 static struct irq_trans __initdata pci_irq_trans_table[] = {
1075 { "SUNW,sabre", sabre_irq_trans_init },
1076 { "pci108e,a000", sabre_irq_trans_init },
1077 { "pci108e,a001", sabre_irq_trans_init },
1078 { "SUNW,psycho", psycho_irq_trans_init },
1079 { "pci108e,8000", psycho_irq_trans_init },
1080 { "SUNW,schizo", schizo_irq_trans_init },
1081 { "pci108e,8001", schizo_irq_trans_init },
1082 { "SUNW,schizo+", schizo_irq_trans_init },
1083 { "pci108e,8002", schizo_irq_trans_init },
1084 { "SUNW,tomatillo", tomatillo_irq_trans_init },
1085 { "pci108e,a801", tomatillo_irq_trans_init },
1086 { "SUNW,sun4v-pci", pci_sun4v_irq_trans_init },
1087 { "pciex108e,80f0", fire_irq_trans_init },
1091 static unsigned int sun4v_vdev_irq_build(struct device_node *dp,
1092 unsigned int devino,
1095 u32 devhandle = (u32) (unsigned long) _data;
1097 return sun4v_build_irq(devhandle, devino);
1100 static void __init sun4v_vdev_irq_trans_init(struct device_node *dp)
1102 const struct linux_prom64_registers *regs;
1104 dp->irq_trans = prom_early_alloc(sizeof(struct of_irq_controller));
1105 dp->irq_trans->irq_build = sun4v_vdev_irq_build;
1107 regs = of_get_property(dp, "reg", NULL);
1108 dp->irq_trans->data = (void *) (unsigned long)
1109 ((regs->phys_addr >> 32UL) & 0x0fffffff);
1112 static void __init irq_trans_init(struct device_node *dp)
1120 model = of_get_property(dp, "model", NULL);
1122 model = of_get_property(dp, "compatible", NULL);
1124 for (i = 0; i < ARRAY_SIZE(pci_irq_trans_table); i++) {
1125 struct irq_trans *t = &pci_irq_trans_table[i];
1127 if (!strcmp(model, t->name))
1133 if (!strcmp(dp->name, "sbus") ||
1134 !strcmp(dp->name, "sbi"))
1135 return sbus_irq_trans_init(dp);
1137 if (!strcmp(dp->name, "fhc") &&
1138 !strcmp(dp->parent->name, "central"))
1139 return central_irq_trans_init(dp);
1140 if (!strcmp(dp->name, "virtual-devices"))
1141 return sun4v_vdev_irq_trans_init(dp);
1144 static int is_root_node(const struct device_node *dp)
1149 return (dp->parent == NULL);
1152 /* The following routines deal with the black magic of fully naming a
1155 * Certain well known named nodes are just the simple name string.
1157 * Actual devices have an address specifier appended to the base name
1158 * string, like this "foo@addr". The "addr" can be in any number of
1159 * formats, and the platform plus the type of the node determine the
1160 * format and how it is constructed.
1162 * For children of the ROOT node, the naming convention is fixed and
1163 * determined by whether this is a sun4u or sun4v system.
1165 * For children of other nodes, it is bus type specific. So
1166 * we walk up the tree until we discover a "device_type" property
1167 * we recognize and we go from there.
1169 * As an example, the boot device on my workstation has a full path:
1171 * /pci@1e,600000/ide@d/disk@0,0:c
1173 static void __init sun4v_path_component(struct device_node *dp, char *tmp_buf)
1175 struct linux_prom64_registers *regs;
1176 struct property *rprop;
1177 u32 high_bits, low_bits, type;
1179 rprop = of_find_property(dp, "reg", NULL);
1183 regs = rprop->value;
1184 if (!is_root_node(dp->parent)) {
1185 sprintf(tmp_buf, "%s@%x,%x",
1187 (unsigned int) (regs->phys_addr >> 32UL),
1188 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1192 type = regs->phys_addr >> 60UL;
1193 high_bits = (regs->phys_addr >> 32UL) & 0x0fffffffUL;
1194 low_bits = (regs->phys_addr & 0xffffffffUL);
1196 if (type == 0 || type == 8) {
1197 const char *prefix = (type == 0) ? "m" : "i";
1200 sprintf(tmp_buf, "%s@%s%x,%x",
1202 high_bits, low_bits);
1204 sprintf(tmp_buf, "%s@%s%x",
1208 } else if (type == 12) {
1209 sprintf(tmp_buf, "%s@%x",
1210 dp->name, high_bits);
1214 static void __init sun4u_path_component(struct device_node *dp, char *tmp_buf)
1216 struct linux_prom64_registers *regs;
1217 struct property *prop;
1219 prop = of_find_property(dp, "reg", NULL);
1224 if (!is_root_node(dp->parent)) {
1225 sprintf(tmp_buf, "%s@%x,%x",
1227 (unsigned int) (regs->phys_addr >> 32UL),
1228 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1232 prop = of_find_property(dp, "upa-portid", NULL);
1234 prop = of_find_property(dp, "portid", NULL);
1236 unsigned long mask = 0xffffffffUL;
1238 if (tlb_type >= cheetah)
1241 sprintf(tmp_buf, "%s@%x,%x",
1243 *(u32 *)prop->value,
1244 (unsigned int) (regs->phys_addr & mask));
1248 /* "name@slot,offset" */
1249 static void __init sbus_path_component(struct device_node *dp, char *tmp_buf)
1251 struct linux_prom_registers *regs;
1252 struct property *prop;
1254 prop = of_find_property(dp, "reg", NULL);
1259 sprintf(tmp_buf, "%s@%x,%x",
1265 /* "name@devnum[,func]" */
1266 static void __init pci_path_component(struct device_node *dp, char *tmp_buf)
1268 struct linux_prom_pci_registers *regs;
1269 struct property *prop;
1272 prop = of_find_property(dp, "reg", NULL);
1277 devfn = (regs->phys_hi >> 8) & 0xff;
1279 sprintf(tmp_buf, "%s@%x,%x",
1284 sprintf(tmp_buf, "%s@%x",
1290 /* "name@UPA_PORTID,offset" */
1291 static void __init upa_path_component(struct device_node *dp, char *tmp_buf)
1293 struct linux_prom64_registers *regs;
1294 struct property *prop;
1296 prop = of_find_property(dp, "reg", NULL);
1302 prop = of_find_property(dp, "upa-portid", NULL);
1306 sprintf(tmp_buf, "%s@%x,%x",
1308 *(u32 *) prop->value,
1309 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1313 static void __init vdev_path_component(struct device_node *dp, char *tmp_buf)
1315 struct property *prop;
1318 prop = of_find_property(dp, "reg", NULL);
1324 sprintf(tmp_buf, "%s@%x", dp->name, *regs);
1327 /* "name@addrhi,addrlo" */
1328 static void __init ebus_path_component(struct device_node *dp, char *tmp_buf)
1330 struct linux_prom64_registers *regs;
1331 struct property *prop;
1333 prop = of_find_property(dp, "reg", NULL);
1339 sprintf(tmp_buf, "%s@%x,%x",
1341 (unsigned int) (regs->phys_addr >> 32UL),
1342 (unsigned int) (regs->phys_addr & 0xffffffffUL));
1345 /* "name@bus,addr" */
1346 static void __init i2c_path_component(struct device_node *dp, char *tmp_buf)
1348 struct property *prop;
1351 prop = of_find_property(dp, "reg", NULL);
1357 /* This actually isn't right... should look at the #address-cells
1358 * property of the i2c bus node etc. etc.
1360 sprintf(tmp_buf, "%s@%x,%x",
1361 dp->name, regs[0], regs[1]);
1364 /* "name@reg0[,reg1]" */
1365 static void __init usb_path_component(struct device_node *dp, char *tmp_buf)
1367 struct property *prop;
1370 prop = of_find_property(dp, "reg", NULL);
1376 if (prop->length == sizeof(u32) || regs[1] == 1) {
1377 sprintf(tmp_buf, "%s@%x",
1380 sprintf(tmp_buf, "%s@%x,%x",
1381 dp->name, regs[0], regs[1]);
1385 /* "name@reg0reg1[,reg2reg3]" */
1386 static void __init ieee1394_path_component(struct device_node *dp, char *tmp_buf)
1388 struct property *prop;
1391 prop = of_find_property(dp, "reg", NULL);
1397 if (regs[2] || regs[3]) {
1398 sprintf(tmp_buf, "%s@%08x%08x,%04x%08x",
1399 dp->name, regs[0], regs[1], regs[2], regs[3]);
1401 sprintf(tmp_buf, "%s@%08x%08x",
1402 dp->name, regs[0], regs[1]);
1406 static void __init __build_path_component(struct device_node *dp, char *tmp_buf)
1408 struct device_node *parent = dp->parent;
1410 if (parent != NULL) {
1411 if (!strcmp(parent->type, "pci") ||
1412 !strcmp(parent->type, "pciex"))
1413 return pci_path_component(dp, tmp_buf);
1414 if (!strcmp(parent->type, "sbus"))
1415 return sbus_path_component(dp, tmp_buf);
1416 if (!strcmp(parent->type, "upa"))
1417 return upa_path_component(dp, tmp_buf);
1418 if (!strcmp(parent->type, "ebus"))
1419 return ebus_path_component(dp, tmp_buf);
1420 if (!strcmp(parent->name, "usb") ||
1421 !strcmp(parent->name, "hub"))
1422 return usb_path_component(dp, tmp_buf);
1423 if (!strcmp(parent->type, "i2c"))
1424 return i2c_path_component(dp, tmp_buf);
1425 if (!strcmp(parent->type, "firewire"))
1426 return ieee1394_path_component(dp, tmp_buf);
1427 if (!strcmp(parent->type, "virtual-devices"))
1428 return vdev_path_component(dp, tmp_buf);
1430 /* "isa" is handled with platform naming */
1433 /* Use platform naming convention. */
1434 if (tlb_type == hypervisor)
1435 return sun4v_path_component(dp, tmp_buf);
1437 return sun4u_path_component(dp, tmp_buf);
1440 static char * __init build_path_component(struct device_node *dp)
1442 char tmp_buf[64], *n;
1445 __build_path_component(dp, tmp_buf);
1446 if (tmp_buf[0] == '\0')
1447 strcpy(tmp_buf, dp->name);
1449 n = prom_early_alloc(strlen(tmp_buf) + 1);
1455 static char * __init build_full_name(struct device_node *dp)
1457 int len, ourlen, plen;
1460 plen = strlen(dp->parent->full_name);
1461 ourlen = strlen(dp->path_component_name);
1462 len = ourlen + plen + 2;
1464 n = prom_early_alloc(len);
1465 strcpy(n, dp->parent->full_name);
1466 if (!is_root_node(dp->parent)) {
1467 strcpy(n + plen, "/");
1470 strcpy(n + plen, dp->path_component_name);
1475 static unsigned int unique_id;
1477 static struct property * __init build_one_prop(phandle node, char *prev, char *special_name, void *special_val, int special_len)
1479 static struct property *tmp = NULL;
1484 memset(p, 0, sizeof(*p) + 32);
1487 p = prom_early_alloc(sizeof(struct property) + 32);
1488 p->unique_id = unique_id++;
1491 p->name = (char *) (p + 1);
1493 strcpy(p->name, special_name);
1494 p->length = special_len;
1495 p->value = prom_early_alloc(special_len);
1496 memcpy(p->value, special_val, special_len);
1499 prom_firstprop(node, p->name);
1501 prom_nextprop(node, prev, p->name);
1503 if (strlen(p->name) == 0) {
1507 p->length = prom_getproplen(node, p->name);
1508 if (p->length <= 0) {
1511 p->value = prom_early_alloc(p->length + 1);
1512 prom_getproperty(node, p->name, p->value, p->length);
1513 ((unsigned char *)p->value)[p->length] = '\0';
1519 static struct property * __init build_prop_list(phandle node)
1521 struct property *head, *tail;
1523 head = tail = build_one_prop(node, NULL,
1524 ".node", &node, sizeof(node));
1526 tail->next = build_one_prop(node, NULL, NULL, NULL, 0);
1529 tail->next = build_one_prop(node, tail->name,
1537 static char * __init get_one_property(phandle node, const char *name)
1539 char *buf = "<NULL>";
1542 len = prom_getproplen(node, name);
1544 buf = prom_early_alloc(len);
1545 prom_getproperty(node, name, buf, len);
1551 static struct device_node * __init create_node(phandle node, struct device_node *parent)
1553 struct device_node *dp;
1558 dp = prom_early_alloc(sizeof(*dp));
1559 dp->unique_id = unique_id++;
1560 dp->parent = parent;
1562 kref_init(&dp->kref);
1564 dp->name = get_one_property(node, "name");
1565 dp->type = get_one_property(node, "device_type");
1568 dp->properties = build_prop_list(node);
1575 static struct device_node * __init build_tree(struct device_node *parent, phandle node, struct device_node ***nextp)
1577 struct device_node *ret = NULL, *prev_sibling = NULL;
1578 struct device_node *dp;
1581 dp = create_node(node, parent);
1586 prev_sibling->sibling = dp;
1593 *nextp = &dp->allnext;
1595 dp->path_component_name = build_path_component(dp);
1596 dp->full_name = build_full_name(dp);
1598 dp->child = build_tree(dp, prom_getchild(node), nextp);
1600 node = prom_getsibling(node);
1606 static const char *get_mid_prop(void)
1608 return (tlb_type == spitfire ? "upa-portid" : "portid");
1611 struct device_node *of_find_node_by_cpuid(int cpuid)
1613 struct device_node *dp;
1614 const char *mid_prop = get_mid_prop();
1616 for_each_node_by_type(dp, "cpu") {
1617 int id = of_getintprop_default(dp, mid_prop, -1);
1618 const char *this_mid_prop = mid_prop;
1621 this_mid_prop = "cpuid";
1622 id = of_getintprop_default(dp, this_mid_prop, -1);
1626 prom_printf("OF: Serious problem, cpu lacks "
1627 "%s property", this_mid_prop);
1636 static void __init of_fill_in_cpu_data(void)
1638 struct device_node *dp;
1639 const char *mid_prop = get_mid_prop();
1642 for_each_node_by_type(dp, "cpu") {
1643 int cpuid = of_getintprop_default(dp, mid_prop, -1);
1644 const char *this_mid_prop = mid_prop;
1645 struct device_node *portid_parent;
1648 portid_parent = NULL;
1650 this_mid_prop = "cpuid";
1651 cpuid = of_getintprop_default(dp, this_mid_prop, -1);
1657 portid_parent = portid_parent->parent;
1660 portid = of_getintprop_default(portid_parent,
1669 prom_printf("OF: Serious problem, cpu lacks "
1670 "%s property", this_mid_prop);
1677 if (cpuid >= NR_CPUS)
1680 /* On uniprocessor we only want the values for the
1681 * real physical cpu the kernel booted onto, however
1682 * cpu_data() only has one entry at index 0.
1684 if (cpuid != real_hard_smp_processor_id())
1689 cpu_data(cpuid).clock_tick =
1690 of_getintprop_default(dp, "clock-frequency", 0);
1692 if (portid_parent) {
1693 cpu_data(cpuid).dcache_size =
1694 of_getintprop_default(dp, "l1-dcache-size",
1696 cpu_data(cpuid).dcache_line_size =
1697 of_getintprop_default(dp, "l1-dcache-line-size",
1699 cpu_data(cpuid).icache_size =
1700 of_getintprop_default(dp, "l1-icache-size",
1702 cpu_data(cpuid).icache_line_size =
1703 of_getintprop_default(dp, "l1-icache-line-size",
1705 cpu_data(cpuid).ecache_size =
1706 of_getintprop_default(dp, "l2-cache-size", 0);
1707 cpu_data(cpuid).ecache_line_size =
1708 of_getintprop_default(dp, "l2-cache-line-size", 0);
1709 if (!cpu_data(cpuid).ecache_size ||
1710 !cpu_data(cpuid).ecache_line_size) {
1711 cpu_data(cpuid).ecache_size =
1712 of_getintprop_default(portid_parent,
1715 cpu_data(cpuid).ecache_line_size =
1716 of_getintprop_default(portid_parent,
1717 "l2-cache-line-size", 64);
1720 cpu_data(cpuid).core_id = portid + 1;
1721 cpu_data(cpuid).proc_id = portid;
1723 sparc64_multi_core = 1;
1726 cpu_data(cpuid).dcache_size =
1727 of_getintprop_default(dp, "dcache-size", 16 * 1024);
1728 cpu_data(cpuid).dcache_line_size =
1729 of_getintprop_default(dp, "dcache-line-size", 32);
1731 cpu_data(cpuid).icache_size =
1732 of_getintprop_default(dp, "icache-size", 16 * 1024);
1733 cpu_data(cpuid).icache_line_size =
1734 of_getintprop_default(dp, "icache-line-size", 32);
1736 cpu_data(cpuid).ecache_size =
1737 of_getintprop_default(dp, "ecache-size",
1739 cpu_data(cpuid).ecache_line_size =
1740 of_getintprop_default(dp, "ecache-line-size", 64);
1742 cpu_data(cpuid).core_id = 0;
1743 cpu_data(cpuid).proc_id = -1;
1747 cpu_set(cpuid, cpu_present_map);
1748 cpu_set(cpuid, cpu_possible_map);
1752 smp_fill_in_sib_core_maps();
1755 void __init prom_build_devicetree(void)
1757 struct device_node **nextp;
1759 allnodes = create_node(prom_root_node, NULL);
1760 allnodes->path_component_name = "";
1761 allnodes->full_name = "/";
1763 nextp = &allnodes->allnext;
1764 allnodes->child = build_tree(allnodes,
1765 prom_getchild(allnodes->node),
1767 printk("PROM: Built device tree with %u bytes of memory.\n",
1768 prom_early_allocated);
1770 if (tlb_type != hypervisor)
1771 of_fill_in_cpu_data();