1 menu "Processor selection"
24 config CPU_SUBTYPE_ST40
27 select CPU_HAS_INTC2_IRQ
33 comment "SH-2 Processor Support"
35 config CPU_SUBTYPE_SH7604
36 bool "Support SH7604 processor"
39 comment "SH-3 Processor Support"
41 config CPU_SUBTYPE_SH7300
42 bool "Support SH7300 processor"
45 config CPU_SUBTYPE_SH7705
46 bool "Support SH7705 processor"
48 select CPU_HAS_PINT_IRQ
50 config CPU_SUBTYPE_SH7707
51 bool "Support SH7707 processor"
53 select CPU_HAS_PINT_IRQ
55 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
57 config CPU_SUBTYPE_SH7708
58 bool "Support SH7708 processor"
61 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
62 if you have a 100 Mhz SH-3 HD6417708R CPU.
64 config CPU_SUBTYPE_SH7709
65 bool "Support SH7709 processor"
67 select CPU_HAS_PINT_IRQ
69 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
71 comment "SH-4 Processor Support"
73 config CPU_SUBTYPE_SH7750
74 bool "Support SH7750 processor"
77 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
79 config CPU_SUBTYPE_SH7091
80 bool "Support SH7091 processor"
82 select CPU_SUBTYPE_SH7750
84 Select SH7091 if you have an SH-4 based Sega device (such as
85 the Dreamcast, Naomi, and Naomi 2).
87 config CPU_SUBTYPE_SH7750R
88 bool "Support SH7750R processor"
90 select CPU_SUBTYPE_SH7750
92 config CPU_SUBTYPE_SH7750S
93 bool "Support SH7750S processor"
95 select CPU_SUBTYPE_SH7750
97 config CPU_SUBTYPE_SH7751
98 bool "Support SH7751 processor"
101 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
102 or if you have a HD6417751R CPU.
104 config CPU_SUBTYPE_SH7751R
105 bool "Support SH7751R processor"
107 select CPU_SUBTYPE_SH7751
109 config CPU_SUBTYPE_SH7760
110 bool "Support SH7760 processor"
112 select CPU_HAS_INTC2_IRQ
114 config CPU_SUBTYPE_SH4_202
115 bool "Support SH4-202 processor"
118 comment "ST40 Processor Support"
120 config CPU_SUBTYPE_ST40STB1
121 bool "Support ST40STB1/ST40RA processors"
122 select CPU_SUBTYPE_ST40
124 Select ST40STB1 if you have a ST40RA CPU.
125 This was previously called the ST40STB1, hence the option name.
127 config CPU_SUBTYPE_ST40GX1
128 bool "Support ST40GX1 processor"
129 select CPU_SUBTYPE_ST40
131 Select ST40GX1 if you have a ST40GX1 CPU.
133 comment "SH-4A Processor Support"
135 config CPU_SUBTYPE_SH73180
136 bool "Support SH73180 processor"
139 config CPU_SUBTYPE_SH7770
140 bool "Support SH7770 processor"
143 config CPU_SUBTYPE_SH7780
144 bool "Support SH7780 processor"
146 select CPU_HAS_INTC2_IRQ
150 menu "Memory management options"
153 bool "Support for memory management hardware"
157 Some SH processors (such as SH-2/SH-2A) lack an MMU. In order to
158 boot on these systems, this option must not be set.
160 On other systems (such as the SH-3 and 4) where an MMU exists,
161 turning this off will boot the kernel on these machines with the
162 MMU implicitly switched off.
165 bool "Support 32-bit physical addressing through PMB"
169 If you say Y here, physical addressing will be extended to
170 32-bits through the SH-4A PMB. If this is not set, legacy
171 29-bit physical addressing will be used.
174 prompt "HugeTLB page size"
175 depends on HUGETLB_PAGE && CPU_SH4 && MMU
176 default HUGETLB_PAGE_SIZE_64K
178 config HUGETLB_PAGE_SIZE_64K
181 config HUGETLB_PAGE_SIZE_1MB
190 menu "Cache configuration"
192 config SH7705_CACHE_32KB
193 bool "Enable 32KB cache size for SH7705"
194 depends on CPU_SUBTYPE_SH7705
197 config SH_DIRECT_MAPPED
198 bool "Use direct-mapped caching"
201 Selecting this option will configure the caches to be direct-mapped,
202 even if the cache supports a 2 or 4-way mode. This is useful primarily
203 for debugging on platforms with 2 and 4-way caches (SH7750R/SH7751R,
204 SH4-202, SH4-501, etc.)
206 Turn this option off for platforms that do not have a direct-mapped
207 cache, and you have no need to run the caches in such a configuration.
209 config SH_WRITETHROUGH
210 bool "Use write-through caching"
213 Selecting this option will configure the caches in write-through
214 mode, as opposed to the default write-back configuration.
216 Since there's sill some aliasing issues on SH-4, this option will
217 unfortunately still require the majority of flushing functions to
218 be implemented to deal with aliasing.
223 bool "Operand Cache RAM (OCRAM) support"
225 Selecting this option will automatically tear down the number of
226 sets in the dcache by half, which in turn exposes a memory range.
228 The addresses for the OC RAM base will vary according to the
229 processor version. Consult vendor documentation for specifics.