1 /* $Id: head.S,v 1.7 2003/09/01 17:58:19 lethal Exp $
3 * arch/sh/kernel/head.S
5 * Copyright (C) 1999, 2000 Niibe Yutaka & Kaz Kojima
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
11 * Head.S contains the SH exception handlers and startup code.
13 #include <linux/linkage.h>
14 #include <asm/thread_info.h>
17 #ifdef CONFIG_CPU_SH4A
20 #define PREFI(label, reg) \
25 #define PREFI(label, reg)
28 .section .empty_zero_page, "aw"
29 ENTRY(empty_zero_page)
30 .long 1 /* MOUNT_ROOT_RDONLY */
31 .long 0 /* RAMDISK_FLAGS */
32 .long 0x0200 /* ORIG_ROOT_DEV */
33 .long 1 /* LOADER_TYPE */
34 .long 0x00360000 /* INITRD_START */
35 .long 0x000a0000 /* INITRD_SIZE */
41 * Condition at the entry of _stext:
43 * BSC has already been initialized.
44 * INTC may or may not be initialized.
45 * VBR may or may not be initialized.
46 * MMU may or may not be initialized.
47 * Cache may or may not be initialized.
48 * Hardware (including on-chip modules) may or may not be initialized.
52 ! Initialize Status Register
53 mov.l 1f, r0 ! MD=1, RB=0, BL=0, IMASK=0xF
55 ! Initialize global interrupt mask
60 * Prefetch if possible to reduce cache miss penalty.
62 * We do this early on for SH-4A as a micro-optimization,
63 * as later on we will have speculative execution enabled
64 * and this will become less of an issue.
71 mov r0, r15 ! Set initial r15 (stack pointer)
75 ldc r0, r7_bank ! ... and initial thread_info
83 bf/s 9b ! while (r1 < r2)
86 ! Additional CPU initialization
91 SYNCO() ! Wait for pending instructions..
99 1: .long 0x400080F0 ! MD=1, RB=0, BL=0, FD=1, IMASK=0xF
100 2: .long init_thread_union+THREAD_SIZE
103 5: .long start_kernel