2 * Generic SH7786 PCI-Express operations.
4 * Copyright (C) 2009 - 2010 Paul Mundt
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License v2. See the file "COPYING" in the main directory of this archive
10 #include <linux/kernel.h>
11 #include <linux/init.h>
12 #include <linux/pci.h>
14 #include <linux/spinlock.h>
15 #include "pcie-sh7786.h"
22 static DEFINE_SPINLOCK(sh7786_pcie_lock);
24 static int sh7786_pcie_config_access(unsigned char access_type,
25 struct pci_bus *bus, unsigned int devfn, int where, u32 *data)
27 struct pci_channel *chan = bus->sysdata;
30 dev = PCI_SLOT(devfn);
31 func = PCI_FUNC(devfn);
33 if (bus->number > 255 || dev > 31 || func > 7)
34 return PCIBIOS_FUNC_NOT_SUPPORTED;
36 return PCIBIOS_DEVICE_NOT_FOUND;
39 pci_write_reg(chan, pci_read_reg(chan, SH4A_PCIEERRFR), SH4A_PCIEERRFR);
41 /* Set the PIO address */
42 pci_write_reg(chan, (bus->number << 24) | (dev << 19) |
43 (func << 16) | (where & ~3), SH4A_PCIEPAR);
45 /* Enable the configuration access */
48 pci_write_reg(chan, (1 << 31) | (1 << 8), SH4A_PCIEPCTLR);
51 pci_write_reg(chan, (1 << 31), SH4A_PCIEPCTLR);
54 /* Check for errors */
55 if (pci_read_reg(chan, SH4A_PCIEERRFR) & 0x10)
56 return PCIBIOS_DEVICE_NOT_FOUND;
57 /* Check for master and target aborts */
58 if (pci_read_reg(chan, SH4A_PCIEPCICONF1) & ((1 << 29) | (1 << 28)))
59 return PCIBIOS_DEVICE_NOT_FOUND;
61 if (access_type == PCI_ACCESS_READ)
62 *data = pci_read_reg(chan, SH4A_PCIEPDR);
64 pci_write_reg(chan, *data, SH4A_PCIEPDR);
66 return PCIBIOS_SUCCESSFUL;
69 static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn,
70 int where, int size, u32 *val)
76 if ((size == 2) && (where & 1))
77 return PCIBIOS_BAD_REGISTER_NUMBER;
78 else if ((size == 4) && (where & 3))
79 return PCIBIOS_BAD_REGISTER_NUMBER;
81 spin_lock_irqsave(&sh7786_pcie_lock, flags);
82 ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
84 if (ret != PCIBIOS_SUCCESSFUL) {
90 *val = (data >> ((where & 3) << 3)) & 0xff;
92 *val = (data >> ((where & 2) << 3)) & 0xffff;
96 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x "
97 "where=0x%04x size=%d val=0x%08lx\n", bus->number,
98 devfn, where, size, (unsigned long)*val);
101 spin_unlock_irqrestore(&sh7786_pcie_lock, flags);
105 static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn,
106 int where, int size, u32 val)
112 if ((size == 2) && (where & 1))
113 return PCIBIOS_BAD_REGISTER_NUMBER;
114 else if ((size == 4) && (where & 3))
115 return PCIBIOS_BAD_REGISTER_NUMBER;
117 spin_lock_irqsave(&sh7786_pcie_lock, flags);
118 ret = sh7786_pcie_config_access(PCI_ACCESS_READ, bus,
119 devfn, where, &data);
120 if (ret != PCIBIOS_SUCCESSFUL)
123 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x "
124 "where=0x%04x size=%d val=%08lx\n", bus->number,
125 devfn, where, size, (unsigned long)val);
128 shift = (where & 3) << 3;
129 data &= ~(0xff << shift);
130 data |= ((val & 0xff) << shift);
131 } else if (size == 2) {
132 shift = (where & 2) << 3;
133 data &= ~(0xffff << shift);
134 data |= ((val & 0xffff) << shift);
138 ret = sh7786_pcie_config_access(PCI_ACCESS_WRITE, bus,
139 devfn, where, &data);
141 spin_unlock_irqrestore(&sh7786_pcie_lock, flags);
145 struct pci_ops sh7786_pci_ops = {
146 .read = sh7786_pcie_read,
147 .write = sh7786_pcie_write,