arch/s390/include/asm/lowcore.h

   1 /*
   2  *  include/asm-s390/lowcore.h
   3  *
   4  *  S390 version
   5  *    Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation
   6  *    Author(s): Hartmut Penner (hp@de.ibm.com),
   7  *               Martin Schwidefsky (schwidefsky@de.ibm.com),
   8  *               Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
   9  */
  10
  11 #ifndef _ASM_S390_LOWCORE_H
  12 #define _ASM_S390_LOWCORE_H
  13
  14 #define __LC_IPL_PARMBLOCK_PTR          0x0014
  15 #define __LC_EXT_PARAMS                 0x0080
  16 #define __LC_CPU_ADDRESS                0x0084
  17 #define __LC_EXT_INT_CODE               0x0086
  18
  19 #define __LC_SVC_ILC                    0x0088
  20 #define __LC_SVC_INT_CODE               0x008a
  21 #define __LC_PGM_ILC                    0x008c
  22 #define __LC_PGM_INT_CODE               0x008e
  23
  24 #define __LC_PER_ATMID                  0x0096
  25 #define __LC_PER_ADDRESS                0x0098
  26 #define __LC_PER_ACCESS_ID              0x00a1
  27 #define __LC_AR_MODE_ID                 0x00a3
  28
  29 #define __LC_SUBCHANNEL_ID              0x00b8
  30 #define __LC_SUBCHANNEL_NR              0x00ba
  31 #define __LC_IO_INT_PARM                0x00bc
  32 #define __LC_IO_INT_WORD                0x00c0
  33 #define __LC_STFL_FAC_LIST              0x00c8
  34 #define __LC_MCCK_CODE                  0x00e8
  35
  36 #define __LC_DUMP_REIPL                 0x0e00
  37
  38 #ifndef __s390x__
  39 #define __LC_EXT_OLD_PSW                0x0018
  40 #define __LC_SVC_OLD_PSW                0x0020
  41 #define __LC_PGM_OLD_PSW                0x0028
  42 #define __LC_MCK_OLD_PSW                0x0030
  43 #define __LC_IO_OLD_PSW                 0x0038
  44 #define __LC_EXT_NEW_PSW                0x0058
  45 #define __LC_SVC_NEW_PSW                0x0060
  46 #define __LC_PGM_NEW_PSW                0x0068
  47 #define __LC_MCK_NEW_PSW                0x0070
  48 #define __LC_IO_NEW_PSW                 0x0078
  49 #define __LC_SAVE_AREA                  0x0200
  50 #define __LC_RETURN_PSW                 0x0240
  51 #define __LC_RETURN_MCCK_PSW            0x0248
  52 #define __LC_SYNC_ENTER_TIMER           0x0250
  53 #define __LC_ASYNC_ENTER_TIMER          0x0258
  54 #define __LC_EXIT_TIMER                 0x0260
  55 #define __LC_USER_TIMER                 0x0268
  56 #define __LC_SYSTEM_TIMER               0x0270
  57 #define __LC_STEAL_TIMER                0x0278
  58 #define __LC_LAST_UPDATE_TIMER          0x0280
  59 #define __LC_LAST_UPDATE_CLOCK          0x0288
  60 #define __LC_CURRENT                    0x0290
  61 #define __LC_THREAD_INFO                0x0294
  62 #define __LC_KERNEL_STACK               0x0298
  63 #define __LC_ASYNC_STACK                0x029c
  64 #define __LC_PANIC_STACK                0x02a0
  65 #define __LC_KERNEL_ASCE                0x02a4
  66 #define __LC_USER_ASCE                  0x02a8
  67 #define __LC_USER_EXEC_ASCE             0x02ac
  68 #define __LC_CPUID                      0x02b0
  69 #define __LC_INT_CLOCK                  0x02c8
  70 #define __LC_MACHINE_FLAGS              0x02d8
  71 #define __LC_FTRACE_FUNC                0x02dc
  72 #define __LC_IRB                        0x0300
  73 #define __LC_PFAULT_INTPARM             0x0080
  74 #define __LC_CPU_TIMER_SAVE_AREA        0x00d8
  75 #define __LC_CLOCK_COMP_SAVE_AREA       0x00e0
  76 #define __LC_PSW_SAVE_AREA              0x0100
  77 #define __LC_PREFIX_SAVE_AREA           0x0108
  78 #define __LC_AREGS_SAVE_AREA            0x0120
  79 #define __LC_FPREGS_SAVE_AREA           0x0160
  80 #define __LC_GPREGS_SAVE_AREA           0x0180
  81 #define __LC_CREGS_SAVE_AREA            0x01c0
  82 #else /* __s390x__ */
  83 #define __LC_LAST_BREAK                 0x0110
  84 #define __LC_EXT_OLD_PSW                0x0130
  85 #define __LC_SVC_OLD_PSW                0x0140
  86 #define __LC_PGM_OLD_PSW                0x0150
  87 #define __LC_MCK_OLD_PSW                0x0160
  88 #define __LC_IO_OLD_PSW                 0x0170
  89 #define __LC_RESTART_PSW                0x01a0
  90 #define __LC_EXT_NEW_PSW                0x01b0
  91 #define __LC_SVC_NEW_PSW                0x01c0
  92 #define __LC_PGM_NEW_PSW                0x01d0
  93 #define __LC_MCK_NEW_PSW                0x01e0
  94 #define __LC_IO_NEW_PSW                 0x01f0
  95 #define __LC_SAVE_AREA                  0x0200
  96 #define __LC_RETURN_PSW                 0x0280
  97 #define __LC_RETURN_MCCK_PSW            0x0290
  98 #define __LC_SYNC_ENTER_TIMER           0x02a0
  99 #define __LC_ASYNC_ENTER_TIMER          0x02a8
 100 #define __LC_EXIT_TIMER                 0x02b0
 101 #define __LC_USER_TIMER                 0x02b8
 102 #define __LC_SYSTEM_TIMER               0x02c0
 103 #define __LC_STEAL_TIMER                0x02c8
 104 #define __LC_LAST_UPDATE_TIMER          0x02d0
 105 #define __LC_LAST_UPDATE_CLOCK          0x02d8
 106 #define __LC_CURRENT                    0x02e0
 107 #define __LC_THREAD_INFO                0x02e8
 108 #define __LC_KERNEL_STACK               0x02f0
 109 #define __LC_ASYNC_STACK                0x02f8
 110 #define __LC_PANIC_STACK                0x0300
 111 #define __LC_KERNEL_ASCE                0x0308
 112 #define __LC_USER_ASCE                  0x0310
 113 #define __LC_USER_EXEC_ASCE             0x0318
 114 #define __LC_CPUID                      0x0320
 115 #define __LC_INT_CLOCK                  0x0340
 116 #define __LC_VDSO_PER_CPU               0x0350
 117 #define __LC_MACHINE_FLAGS              0x0358
 118 #define __LC_FTRACE_FUNC                0x0360
 119 #define __LC_IRB                        0x0380
 120 #define __LC_PASTE                      0x03c0
 121 #define __LC_PFAULT_INTPARM             0x11b8
 122 #define __LC_FPREGS_SAVE_AREA           0x1200
 123 #define __LC_GPREGS_SAVE_AREA           0x1280
 124 #define __LC_PSW_SAVE_AREA              0x1300
 125 #define __LC_PREFIX_SAVE_AREA           0x1318
 126 #define __LC_FP_CREG_SAVE_AREA          0x131c
 127 #define __LC_TODREG_SAVE_AREA           0x1324
 128 #define __LC_CPU_TIMER_SAVE_AREA        0x1328
 129 #define __LC_CLOCK_COMP_SAVE_AREA       0x1331
 130 #define __LC_AREGS_SAVE_AREA            0x1340
 131 #define __LC_CREGS_SAVE_AREA            0x1380
 132 #endif /* __s390x__ */
 133
 134 #ifndef __ASSEMBLY__
 135
 136 #include <asm/cpu.h>
 137 #include <asm/ptrace.h>
 138 #include <linux/types.h>
 139
 140 void restart_int_handler(void);
 141 void ext_int_handler(void);
 142 void system_call(void);
 143 void pgm_check_handler(void);
 144 void mcck_int_handler(void);
 145 void io_int_handler(void);
 146
 147 #ifdef CONFIG_32BIT
 148
 149 struct save_area {
 150         u32     ext_save;
 151         u64     timer;
 152         u64     clk_cmp;
 153         u8      pad1[24];
 154         u8      psw[8];
 155         u32     pref_reg;
 156         u8      pad2[20];
 157         u32     acc_regs[16];
 158         u64     fp_regs[4];
 159         u32     gp_regs[16];
 160         u32     ctrl_regs[16];
 161 }  __attribute__((packed));
 162
 163 #define SAVE_AREA_BASE offsetof(struct _lowcore, extended_save_area_addr)
 164
 165 #else /* CONFIG_32BIT */
 166
 167 struct save_area {
 168         u64     fp_regs[16];
 169         u64     gp_regs[16];
 170         u8      psw[16];
 171         u8      pad1[8];
 172         u32     pref_reg;
 173         u32     fp_ctrl_reg;
 174         u8      pad2[4];
 175         u32     tod_reg;
 176         u64     timer;
 177         u64     clk_cmp;
 178         u8      pad3[8];
 179         u32     acc_regs[16];
 180         u64     ctrl_regs[16];
 181 }  __attribute__((packed));
 182
 183 #define SAVE_AREA_BASE offsetof(struct _lowcore, floating_pt_save_area)
 184
 185 #endif /* CONFIG_32BIT */
 186
 187 #ifndef __s390x__
 188 #define LC_ORDER 0
 189 #else
 190 #define LC_ORDER 1
 191 #endif
 192
 193 #define LC_PAGES (1UL << LC_ORDER)
 194
 195 struct _lowcore
 196 {
 197 #ifndef __s390x__
 198         /* 0x0000 - 0x01ff: defined by architecture */
 199         psw_t   restart_psw;                    /* 0x0000 */
 200         __u32   ccw2[4];                        /* 0x0008 */
 201         psw_t   external_old_psw;               /* 0x0018 */
 202         psw_t   svc_old_psw;                    /* 0x0020 */
 203         psw_t   program_old_psw;                /* 0x0028 */
 204         psw_t   mcck_old_psw;                   /* 0x0030 */
 205         psw_t   io_old_psw;                     /* 0x0038 */
 206         __u8    pad_0x0040[0x0058-0x0040];      /* 0x0040 */
 207         psw_t   external_new_psw;               /* 0x0058 */
 208         psw_t   svc_new_psw;                    /* 0x0060 */
 209         psw_t   program_new_psw;                /* 0x0068 */
 210         psw_t   mcck_new_psw;                   /* 0x0070 */
 211         psw_t   io_new_psw;                     /* 0x0078 */
 212         __u32   ext_params;                     /* 0x0080 */
 213         __u16   cpu_addr;                       /* 0x0084 */
 214         __u16   ext_int_code;                   /* 0x0086 */
 215         __u16   svc_ilc;                        /* 0x0088 */
 216         __u16   svc_code;                       /* 0x008a */
 217         __u16   pgm_ilc;                        /* 0x008c */
 218         __u16   pgm_code;                       /* 0x008e */
 219         __u32   trans_exc_code;                 /* 0x0090 */
 220         __u16   mon_class_num;                  /* 0x0094 */
 221         __u16   per_perc_atmid;                 /* 0x0096 */
 222         __u32   per_address;                    /* 0x0098 */
 223         __u32   monitor_code;                   /* 0x009c */
 224         __u8    exc_access_id;                  /* 0x00a0 */
 225         __u8    per_access_id;                  /* 0x00a1 */
 226         __u8    pad_0x00a2[0x00b8-0x00a2];      /* 0x00a2 */
 227         __u16   subchannel_id;                  /* 0x00b8 */
 228         __u16   subchannel_nr;                  /* 0x00ba */
 229         __u32   io_int_parm;                    /* 0x00bc */
 230         __u32   io_int_word;                    /* 0x00c0 */
 231         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
 232         __u32   stfl_fac_list;                  /* 0x00c8 */
 233         __u8    pad_0x00cc[0x00d4-0x00cc];      /* 0x00cc */
 234         __u32   extended_save_area_addr;        /* 0x00d4 */
 235         __u32   cpu_timer_save_area[2];         /* 0x00d8 */
 236         __u32   clock_comp_save_area[2];        /* 0x00e0 */
 237         __u32   mcck_interruption_code[2];      /* 0x00e8 */
 238         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
 239         __u32   external_damage_code;           /* 0x00f4 */
 240         __u32   failing_storage_address;        /* 0x00f8 */
 241         __u8    pad_0x00fc[0x0100-0x00fc];      /* 0x00fc */
 242         __u32   st_status_fixed_logout[4];      /* 0x0100 */
 243         __u8    pad_0x0110[0x0120-0x0110];      /* 0x0110 */
 244
 245         /* CPU register save area: defined by architecture */
 246         __u32   access_regs_save_area[16];      /* 0x0120 */
 247         __u32   floating_pt_save_area[8];       /* 0x0160 */
 248         __u32   gpregs_save_area[16];           /* 0x0180 */
 249         __u32   cregs_save_area[16];            /* 0x01c0 */
 250
 251         /* Return psws. */
 252         __u32   save_area[16];                  /* 0x0200 */
 253         psw_t   return_psw;                     /* 0x0240 */
 254         psw_t   return_mcck_psw;                /* 0x0248 */
 255
 256         /* CPU time accounting values */
 257         __u64   sync_enter_timer;               /* 0x0250 */
 258         __u64   async_enter_timer;              /* 0x0258 */
 259         __u64   exit_timer;                     /* 0x0260 */
 260         __u64   user_timer;                     /* 0x0268 */
 261         __u64   system_timer;                   /* 0x0270 */
 262         __u64   steal_timer;                    /* 0x0278 */
 263         __u64   last_update_timer;              /* 0x0280 */
 264         __u64   last_update_clock;              /* 0x0288 */
 265
 266         /* Current process. */
 267         __u32   current_task;                   /* 0x0290 */
 268         __u32   thread_info;                    /* 0x0294 */
 269         __u32   kernel_stack;                   /* 0x0298 */
 270
 271         /* Interrupt and panic stack. */
 272         __u32   async_stack;                    /* 0x029c */
 273         __u32   panic_stack;                    /* 0x02a0 */
 274
 275         /* Address space pointer. */
 276         __u32   kernel_asce;                    /* 0x02a4 */
 277         __u32   user_asce;                      /* 0x02a8 */
 278         __u32   user_exec_asce;                 /* 0x02ac */
 279
 280         /* SMP info area */
 281         struct cpuid cpu_id;                    /* 0x02b0 */
 282         __u32   cpu_nr;                         /* 0x02b8 */
 283         __u32   softirq_pending;                /* 0x02bc */
 284         __u32   percpu_offset;                  /* 0x02c0 */
 285         __u32   ext_call_fast;                  /* 0x02c4 */
 286         __u64   int_clock;                      /* 0x02c8 */
 287         __u64   clock_comparator;               /* 0x02d0 */
 288         __u32   machine_flags;                  /* 0x02d8 */
 289         __u32   ftrace_func;                    /* 0x02dc */
 290         __u8    pad_0x02e0[0x0300-0x02e0];      /* 0x02e0 */
 291
 292         /* Interrupt response block */
 293         __u8    irb[64];                        /* 0x0300 */
 294
 295         __u8    pad_0x0340[0x0e00-0x0340];      /* 0x0340 */
 296
 297         /*
 298          * 0xe00 contains the address of the IPL Parameter Information
 299          * block. Dump tools need IPIB for IPL after dump.
 300          * Note: do not change the position of any fields in 0x0e00-0x0f00
 301          */
 302         __u32   ipib;                           /* 0x0e00 */
 303         __u32   ipib_checksum;                  /* 0x0e04 */
 304
 305         /* Align to the top 1k of prefix area */
 306         __u8    pad_0x0e08[0x1000-0x0e08];      /* 0x0e08 */
 307 #else /* !__s390x__ */
 308         /* 0x0000 - 0x01ff: defined by architecture */
 309         __u32   ccw1[2];                        /* 0x0000 */
 310         __u32   ccw2[4];                        /* 0x0008 */
 311         __u8    pad_0x0018[0x0080-0x0018];      /* 0x0018 */
 312         __u32   ext_params;                     /* 0x0080 */
 313         __u16   cpu_addr;                       /* 0x0084 */
 314         __u16   ext_int_code;                   /* 0x0086 */
 315         __u16   svc_ilc;                        /* 0x0088 */
 316         __u16   svc_code;                       /* 0x008a */
 317         __u16   pgm_ilc;                        /* 0x008c */
 318         __u16   pgm_code;                       /* 0x008e */
 319         __u32   data_exc_code;                  /* 0x0090 */
 320         __u16   mon_class_num;                  /* 0x0094 */
 321         __u16   per_perc_atmid;                 /* 0x0096 */
 322         addr_t  per_address;                    /* 0x0098 */
 323         __u8    exc_access_id;                  /* 0x00a0 */
 324         __u8    per_access_id;                  /* 0x00a1 */
 325         __u8    op_access_id;                   /* 0x00a2 */
 326         __u8    ar_access_id;                   /* 0x00a3 */
 327         __u8    pad_0x00a4[0x00a8-0x00a4];      /* 0x00a4 */
 328         addr_t  trans_exc_code;                 /* 0x00a8 */
 329         addr_t  monitor_code;                   /* 0x00b0 */
 330         __u16   subchannel_id;                  /* 0x00b8 */
 331         __u16   subchannel_nr;                  /* 0x00ba */
 332         __u32   io_int_parm;                    /* 0x00bc */
 333         __u32   io_int_word;                    /* 0x00c0 */
 334         __u8    pad_0x00c4[0x00c8-0x00c4];      /* 0x00c4 */
 335         __u32   stfl_fac_list;                  /* 0x00c8 */
 336         __u8    pad_0x00cc[0x00e8-0x00cc];      /* 0x00cc */
 337         __u32   mcck_interruption_code[2];      /* 0x00e8 */
 338         __u8    pad_0x00f0[0x00f4-0x00f0];      /* 0x00f0 */
 339         __u32   external_damage_code;           /* 0x00f4 */
 340         addr_t  failing_storage_address;        /* 0x00f8 */
 341         __u8    pad_0x0100[0x0120-0x0100];      /* 0x0100 */
 342         psw_t   restart_old_psw;                /* 0x0120 */
 343         psw_t   external_old_psw;               /* 0x0130 */
 344         psw_t   svc_old_psw;                    /* 0x0140 */
 345         psw_t   program_old_psw;                /* 0x0150 */
 346         psw_t   mcck_old_psw;                   /* 0x0160 */
 347         psw_t   io_old_psw;                     /* 0x0170 */
 348         __u8    pad_0x0180[0x01a0-0x0180];      /* 0x0180 */
 349         psw_t   restart_psw;                    /* 0x01a0 */
 350         psw_t   external_new_psw;               /* 0x01b0 */
 351         psw_t   svc_new_psw;                    /* 0x01c0 */
 352         psw_t   program_new_psw;                /* 0x01d0 */
 353         psw_t   mcck_new_psw;                   /* 0x01e0 */
 354         psw_t   io_new_psw;                     /* 0x01f0 */
 355
 356         /* Entry/exit save area & return psws. */
 357         __u64   save_area[16];                  /* 0x0200 */
 358         psw_t   return_psw;                     /* 0x0280 */
 359         psw_t   return_mcck_psw;                /* 0x0290 */
 360
 361         /* CPU accounting and timing values. */
 362         __u64   sync_enter_timer;               /* 0x02a0 */
 363         __u64   async_enter_timer;              /* 0x02a8 */
 364         __u64   exit_timer;                     /* 0x02b0 */
 365         __u64   user_timer;                     /* 0x02b8 */
 366         __u64   system_timer;                   /* 0x02c0 */
 367         __u64   steal_timer;                    /* 0x02c8 */
 368         __u64   last_update_timer;              /* 0x02d0 */
 369         __u64   last_update_clock;              /* 0x02d8 */
 370
 371         /* Current process. */
 372         __u64   current_task;                   /* 0x02e0 */
 373         __u64   thread_info;                    /* 0x02e8 */
 374         __u64   kernel_stack;                   /* 0x02f0 */
 375
 376         /* Interrupt and panic stack. */
 377         __u64   async_stack;                    /* 0x02f8 */
 378         __u64   panic_stack;                    /* 0x0300 */
 379
 380         /* Address space pointer. */
 381         __u64   kernel_asce;                    /* 0x0308 */
 382         __u64   user_asce;                      /* 0x0310 */
 383         __u64   user_exec_asce;                 /* 0x0318 */
 384
 385         /* SMP info area */
 386         struct cpuid cpu_id;                    /* 0x0320 */
 387         __u32   cpu_nr;                         /* 0x0328 */
 388         __u32   softirq_pending;                /* 0x032c */
 389         __u64   percpu_offset;                  /* 0x0330 */
 390         __u64   ext_call_fast;                  /* 0x0338 */
 391         __u64   int_clock;                      /* 0x0340 */
 392         __u64   clock_comparator;               /* 0x0348 */
 393         __u64   vdso_per_cpu_data;              /* 0x0350 */
 394         __u64   machine_flags;                  /* 0x0358 */
 395         __u64   ftrace_func;                    /* 0x0360 */
 396         __u8    pad_0x0368[0x0380-0x0368];      /* 0x0368 */
 397
 398         /* Interrupt response block. */
 399         __u8    irb[64];                        /* 0x0380 */
 400
 401         /* Per cpu primary space access list */
 402         __u32   paste[16];                      /* 0x03c0 */
 403
 404         __u8    pad_0x0400[0x0e00-0x0400];      /* 0x0400 */
 405
 406         /*
 407          * 0xe00 contains the address of the IPL Parameter Information
 408          * block. Dump tools need IPIB for IPL after dump.
 409          * Note: do not change the position of any fields in 0x0e00-0x0f00
 410          */
 411         __u64   ipib;                           /* 0x0e00 */
 412         __u32   ipib_checksum;                  /* 0x0e08 */
 413         __u8    pad_0x0e0c[0x11b8-0x0e0c];      /* 0x0e0c */
 414
 415         /* 64 bit extparam used for pfault/diag 250: defined by architecture */
 416         __u64   ext_params2;                    /* 0x11B8 */
 417         __u8    pad_0x11c0[0x1200-0x11C0];      /* 0x11C0 */
 418
 419         /* CPU register save area: defined by architecture */
 420         __u64   floating_pt_save_area[16];      /* 0x1200 */
 421         __u64   gpregs_save_area[16];           /* 0x1280 */
 422         __u32   st_status_fixed_logout[4];      /* 0x1300 */
 423         __u8    pad_0x1310[0x1318-0x1310];      /* 0x1310 */
 424         __u32   prefixreg_save_area;            /* 0x1318 */
 425         __u32   fpt_creg_save_area;             /* 0x131c */
 426         __u8    pad_0x1320[0x1324-0x1320];      /* 0x1320 */
 427         __u32   tod_progreg_save_area;          /* 0x1324 */
 428         __u32   cpu_timer_save_area[2];         /* 0x1328 */
 429         __u32   clock_comp_save_area[2];        /* 0x1330 */
 430         __u8    pad_0x1338[0x1340-0x1338];      /* 0x1338 */
 431         __u32   access_regs_save_area[16];      /* 0x1340 */
 432         __u64   cregs_save_area[16];            /* 0x1380 */
 433
 434         /* align to the top of the prefix area */
 435         __u8    pad_0x1400[0x2000-0x1400];      /* 0x1400 */
 436 #endif /* !__s390x__ */
 437 } __attribute__((packed)); /* End structure*/
 438
 439 #define S390_lowcore (*((struct _lowcore *) 0))
 440 extern struct _lowcore *lowcore_ptr[];
 441
 442 static inline void set_prefix(__u32 address)
 443 {
 444         asm volatile("spx %0" : : "m" (address) : "memory");
 445 }
 446
 447 static inline __u32 store_prefix(void)
 448 {
 449         __u32 address;
 450
 451         asm volatile("stpx %0" : "=m" (address));
 452         return address;
 453 }
 454
 455 #endif
 456
 457 #endif