1 menu "Platform support"
3 source "arch/powerpc/platforms/powernv/Kconfig"
4 source "arch/powerpc/platforms/pseries/Kconfig"
5 source "arch/powerpc/platforms/chrp/Kconfig"
6 source "arch/powerpc/platforms/512x/Kconfig"
7 source "arch/powerpc/platforms/52xx/Kconfig"
8 source "arch/powerpc/platforms/powermac/Kconfig"
9 source "arch/powerpc/platforms/maple/Kconfig"
10 source "arch/powerpc/platforms/pasemi/Kconfig"
11 source "arch/powerpc/platforms/ps3/Kconfig"
12 source "arch/powerpc/platforms/cell/Kconfig"
13 source "arch/powerpc/platforms/8xx/Kconfig"
14 source "arch/powerpc/platforms/82xx/Kconfig"
15 source "arch/powerpc/platforms/83xx/Kconfig"
16 source "arch/powerpc/platforms/85xx/Kconfig"
17 source "arch/powerpc/platforms/86xx/Kconfig"
18 source "arch/powerpc/platforms/embedded6xx/Kconfig"
19 source "arch/powerpc/platforms/44x/Kconfig"
20 source "arch/powerpc/platforms/40x/Kconfig"
21 source "arch/powerpc/platforms/amigaone/Kconfig"
22 source "arch/powerpc/platforms/wsp/Kconfig"
25 bool "KVM Guest support"
29 This option enables various optimizations for running under the KVM
30 hypervisor. Overhead for the kernel when not running inside KVM should
33 In case of doubt, say Y
36 bool "ePAPR para-virtualization support"
39 Enables ePAPR para-virtualization support for guests.
41 In case of doubt, say Y
45 depends on 6xx || PPC64
47 Support for running natively on the hardware, i.e. without
48 a hypervisor. This option is not user-selectable but should
49 be selected by all platforms that need it.
51 config PPC_OF_BOOT_TRAMPOLINE
52 bool "Support booting from Open Firmware or yaboot"
53 depends on 6xx || PPC64
56 Support from booting from Open Firmware or yaboot using an
57 Open Firmware client interface. This enables the kernel to
58 communicate with open firmware to retrieve system information
59 such as the device tree.
61 In case of doubt, say Y
63 config UDBG_RTAS_CONSOLE
64 bool "RTAS based debug console"
68 config PPC_SMP_MUXED_IPI
71 Select this opton if your platform supports SMP and your
72 interrupt controller provides less than 4 interrupts to each
73 cpu. This will enable the generic code to multiplex the 4
74 messages on to one ipi.
77 bool "BEAT based debug console"
90 bool "MPIC Global Timer"
91 depends on MPIC && FSL_SOC
94 The MPIC global timer is a hardware timer inside the
95 Freescale PIC complying with OpenPIC standard. When the
96 specified interval times out, the hardware timer generates
97 an interrupt. The driver currently is only tested on fsl
98 chip, but it can potentially support other global timers
99 complying with the OpenPIC standard.
101 config FSL_MPIC_TIMER_WAKEUP
102 tristate "Freescale MPIC global timer wakeup driver"
103 depends on FSL_SOC && MPIC_TIMER && PM
106 The driver provides a way to wake up the system by MPIC
108 e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup"
110 config PPC_EPAPR_HV_PIC
113 select EPAPR_PARAVIRT
120 bool "MPIC message register support"
124 Enables support for the MPIC message registers. These
125 registers are used for inter-processor communication.
140 config RTAS_ERROR_LOGGING
145 config PPC_RTAS_DAEMON
151 bool "Proc interface to RTAS"
152 depends on PPC_RTAS && PROC_FS
156 tristate "Firmware flash interface"
157 depends on PPC64 && RTAS_PROC
163 config MPIC_U3_HT_IRQS
167 config MPIC_BROKEN_REGREAD
171 This option enables a MPIC driver workaround for some chips
172 that have a bug that causes some interrupt source information
173 to not read back properly. It is safe to use on other chips as
174 well, but enabling it uses about 8KB of memory to keep copies
175 of the register contents in software.
178 depends on PPC_PSERIES
183 depends on PPC_PSERIES
184 bool "Support for GX bus based adapters"
186 Bus device driver for GX bus based adapters.
190 depends on (PPC_POWERNV || PPC_PSERIES) && PCI
205 config PPC_INDIRECT_IO
209 config PPC_INDIRECT_PIO
211 select PPC_INDIRECT_IO
213 config PPC_INDIRECT_MMIO
215 select PPC_INDIRECT_IO
217 config PPC_IO_WORKAROUNDS
220 source "drivers/cpufreq/Kconfig"
222 menu "CPUIdle driver"
224 source "drivers/cpuidle/Kconfig"
228 config PPC601_SYNC_FIX
229 bool "Workarounds for PPC601 bugs"
230 depends on 6xx && PPC_PMAC
232 Some versions of the PPC601 (the first PowerPC chip) have bugs which
233 mean that extra synchronization instructions are required near
234 certain instructions, typically those that make major changes to the
235 CPU state. These extra instructions reduce performance slightly.
236 If you say N here, these extra instructions will not be included,
237 resulting in a kernel which will run faster but may not run at all
238 on some systems with the PPC601 chip.
240 If in doubt, say Y here.
243 bool "On-chip CPU temperature sensor support"
246 G3 and G4 processors have an on-chip temperature sensor called the
247 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
248 temperature within 2-4 degrees Celsius. This option shows the current
249 on-die temperature in /proc/cpuinfo if the cpu supports it.
251 Unfortunately, on some chip revisions, this sensor is very inaccurate
252 and in many cases, does not work at all, so don't assume the cpu
253 temp is actually what /proc/cpuinfo says it is.
256 bool "Interrupt driven TAU driver (DANGEROUS)"
259 The TAU supports an interrupt driven mode which causes an interrupt
260 whenever the temperature goes out of range. This is the fastest way
261 to get notified the temp has exceeded a range. With this option off,
262 a timer is used to re-check the temperature periodically.
264 However, on some cpus it appears that the TAU interrupt hardware
265 is buggy and can cause a situation which would lead unexplained hard
268 Unless you are extending the TAU driver, or enjoy kernel/hardware
269 debugging, leave this option off.
272 bool "Average high and low temp"
275 The TAU hardware can compare the temperature to an upper and lower
276 bound. The default behavior is to show both the upper and lower
277 bound in /proc/cpuinfo. If the range is large, the temperature is
278 either changing a lot, or the TAU hardware is broken (likely on some
279 G4's). If the range is small (around 4 degrees), the temperature is
280 relatively stable. If you say Y here, a single temperature value,
281 halfway between the upper and lower bounds, will be reported in
284 If in doubt, say N here.
287 bool "Freescale QUICC Engine (QE) Support"
288 depends on FSL_SOC && PPC32
292 The QUICC Engine (QE) is a new generation of communications
293 coprocessors on Freescale embedded CPUs (akin to CPM in older chips).
294 Selecting this option means that you wish to build a kernel
295 for a machine with a QE coprocessor.
298 bool "QE GPIO support"
299 depends on QUICC_ENGINE
300 select ARCH_REQUIRE_GPIOLIB
302 Say Y here if you're going to use hardware that connects to the
306 bool "Enable support for the CPM2 (Communications Processor Module)"
307 depends on (FSL_SOC_BOOKE && PPC32) || 8260
310 select PPC_PCI_CHOICE
311 select ARCH_REQUIRE_GPIOLIB
313 The CPM2 (Communications Processor Module) is a coprocessor on
314 embedded CPUs made by Freescale. Selecting this option means that
315 you wish to build a kernel for a machine with a CPM2 coprocessor
316 on it (826x, 827x, 8560).
319 tristate "Axon DDR2 memory device driver"
320 depends on PPC_IBM_CELL_BLADE && BLOCK
323 It registers one block device per Axon's DDR2 memory bank found
324 on a system. Block devices are called axonram?, their major and
325 minor numbers are available in /proc/devices, /proc/partitions or
326 in /sys/block/axonram?/dev.
331 select GENERIC_ISA_DMA
333 Supports for the ULI1575 PCIe south bridge that exists on some
334 Freescale reference boards. The boards all use the ULI in pretty
343 Uses information from the OF or flattened device tree to instantiate
344 platform devices for direct mapped RTC chips like the DS1742 or DS1743.
347 bool "Support for simple, memory-mapped GPIO controllers"
349 select ARCH_REQUIRE_GPIOLIB
351 Say Y here to support simple, memory-mapped GPIO controllers.
352 These are usually BCSRs used to control board's switches, LEDs,
353 chip-selects, Ethernet/USB PHY's power and various other small
354 on-board peripherals.
356 config MCU_MPC8349EMITX
357 bool "MPC8349E-mITX MCU driver"
358 depends on I2C=y && PPC_83xx
359 select ARCH_REQUIRE_GPIOLIB
361 Say Y here to enable soft power-off functionality on the Freescale
362 boards with the MPC8349E-mITX-compatible MCU chips. This driver will
363 also register MCU GPIOs with the generic GPIO API, so you'll able
364 to use MCU pins as GPIOs.
367 bool "Xilinx PCI host bridge support"
368 depends on PCI && XILINX_VIRTEX