3 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
5 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
6 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Adapted for Power Macintosh by Paul Mackerras.
8 * Low-level exception handlers and MMU support
9 * rewritten by Paul Mackerras.
10 * Copyright (C) 1996 Paul Mackerras.
12 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
13 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
15 * This file contains the entry point for the 64-bit kernel along
16 * with some early initialization code common to all 64-bit powerpc
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License
21 * as published by the Free Software Foundation; either version
22 * 2 of the License, or (at your option) any later version.
25 #include <linux/threads.h>
29 #include <asm/ppc_asm.h>
30 #include <asm/asm-offsets.h>
32 #include <asm/cputable.h>
33 #include <asm/setup.h>
34 #include <asm/hvcall.h>
35 #include <asm/iseries/lpar_map.h>
36 #include <asm/thread_info.h>
37 #include <asm/firmware.h>
38 #include <asm/page_64.h>
39 #include <asm/irqflags.h>
40 #include <asm/kvm_book3s_asm.h>
41 #include <asm/ptrace.h>
43 /* The physical memory is laid out such that the secondary processor
44 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
45 * using the layout described in exceptions-64s.S
49 * Entering into this code we make the following assumptions:
51 * For pSeries or server processors:
52 * 1. The MMU is off & open firmware is running in real mode.
53 * 2. The kernel is entered at __start
56 * 1. The MMU is on (as it always is for iSeries)
57 * 2. The kernel is entered at system_reset_iSeries
59 * For Book3E processors:
60 * 1. The MMU is on running in AS0 in a state defined in ePAPR
61 * 2. The kernel is entered at __start
68 /* NOP this out unconditionally */
70 b .__start_initialization_multiplatform
73 /* Catch branch to 0 in real mode */
76 /* Secondary processors spin on this value until it becomes nonzero.
77 * When it does it contains the real address of the descriptor
78 * of the function that the cpu should jump to to continue
81 .globl __secondary_hold_spinloop
82 __secondary_hold_spinloop:
85 /* Secondary processors write this value with their cpu # */
86 /* after they enter the spin loop immediately below. */
87 .globl __secondary_hold_acknowledge
88 __secondary_hold_acknowledge:
91 #ifdef CONFIG_PPC_ISERIES
93 * At offset 0x20, there is a pointer to iSeries LPAR data.
94 * This is required by the hypervisor
97 .llong hvReleaseData-KERNELBASE
98 #endif /* CONFIG_PPC_ISERIES */
100 #ifdef CONFIG_RELOCATABLE
101 /* This flag is set to 1 by a loader if the kernel should run
102 * at the loaded address instead of the linked address. This
103 * is used by kexec-tools to keep the the kdump kernel in the
104 * crash_kernel region. The loader is responsible for
105 * observing the alignment requirement.
107 /* Do not move this variable as kexec-tools knows about it. */
111 .long 0x72756e30 /* "run0" -- relocate to 0 by default */
116 * The following code is used to hold secondary processors
117 * in a spin loop after they have entered the kernel, but
118 * before the bulk of the kernel has been relocated. This code
119 * is relocated to physical address 0x60 before prom_init is run.
120 * All of it must fit below the first exception vector at 0x100.
121 * Use .globl here not _GLOBAL because we want __secondary_hold
122 * to be the actual text address, not a descriptor.
124 .globl __secondary_hold
126 #ifndef CONFIG_PPC_BOOK3E
129 mtmsrd r24 /* RI on */
131 /* Grab our physical cpu number */
134 /* Tell the master cpu we're here */
135 /* Relocation is off & we are located at an address less */
136 /* than 0x100, so only need to grab low order offset. */
137 std r24,__secondary_hold_acknowledge-_stext(0)
140 /* All secondary cpus wait here until told to start. */
141 100: ld r4,__secondary_hold_spinloop-_stext(0)
145 #if defined(CONFIG_SMP) || defined(CONFIG_KEXEC)
146 ld r4,0(r4) /* deref function descriptor */
150 /* Make sure that patched code is visible */
157 /* This value is used to mark exception frames on the stack. */
160 .tc ID_72656773_68657265[TC],0x7265677368657265
164 * On server, we include the exception vectors code here as it
165 * relies on absolute addressing which is only possible within
166 * this compilation unit
168 #ifdef CONFIG_PPC_BOOK3S
169 #include "exceptions-64s.S"
172 _GLOBAL(generic_secondary_thread_init)
175 /* turn on 64-bit mode */
178 /* get a valid TOC pointer, wherever we're mapped at */
181 #ifdef CONFIG_PPC_BOOK3E
182 /* Book3E initialization */
184 bl .book3e_secondary_thread_init
186 b generic_secondary_common_init
189 * On pSeries and most other platforms, secondary processors spin
190 * in the following code.
191 * At entry, r3 = this processor's number (physical cpu id)
193 * On Book3E, r4 = 1 to indicate that the initial TLB entry for
194 * this core already exists (setup via some other mechanism such
195 * as SCOM before entry).
197 _GLOBAL(generic_secondary_smp_init)
201 /* turn on 64-bit mode */
204 /* get a valid TOC pointer, wherever we're mapped at */
207 #ifdef CONFIG_PPC_BOOK3E
208 /* Book3E initialization */
211 bl .book3e_secondary_core_init
214 generic_secondary_common_init:
215 /* Set up a paca value for this processor. Since we have the
216 * physical cpu id in r24, we need to search the pacas to find
217 * which logical id maps to our physical one.
219 LOAD_REG_ADDR(r13, paca) /* Load paca pointer */
220 ld r13,0(r13) /* Get base vaddr of paca array */
221 li r5,0 /* logical cpu id */
222 1: lhz r6,PACAHWCPUID(r13) /* Load HW procid from paca */
223 cmpw r6,r24 /* Compare to our id */
225 addi r13,r13,PACA_SIZE /* Loop to next PACA on miss */
230 mr r3,r24 /* not found, copy phys to r3 */
231 b .kexec_wait /* next kernel might do better */
234 #ifdef CONFIG_PPC_BOOK3E
235 addi r12,r13,PACA_EXTLB /* and TLB exc frame in another */
236 mtspr SPRN_SPRG_TLB_EXFRAME,r12
239 /* From now on, r24 is expected to be logical cpuid */
242 /* See if we need to call a cpu state restore handler */
243 LOAD_REG_ADDR(r23, cur_cpu_spec)
245 ld r23,CPU_SPEC_RESTORE(r23)
252 3: LOAD_REG_ADDR(r3, boot_cpu_count) /* Decrement boot_cpu_count */
260 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
263 b 4b /* Never go on non-SMP */
266 beq 4b /* Loop until told to go */
268 sync /* order paca.run and cur_cpu_spec */
269 isync /* In case code patching happened */
271 /* Create a temp kernel stack for use before relocation is on. */
272 ld r1,PACAEMERGSP(r13)
273 subi r1,r1,STACK_FRAME_OVERHEAD
280 * Assumes we're mapped EA == RA if the MMU is on.
282 #ifdef CONFIG_PPC_BOOK3S
285 andi. r0,r3,MSR_IR|MSR_DR
293 b . /* prevent speculative execution */
298 * Here is our main kernel entry point. We support currently 2 kind of entries
299 * depending on the value of r5.
301 * r5 != NULL -> OF entry, we go to prom_init, "legacy" parameter content
304 * r5 == NULL -> kexec style entry. r3 is a physical pointer to the
305 * DT block, r4 is a physical pointer to the kernel itself
308 _GLOBAL(__start_initialization_multiplatform)
309 /* Make sure we are running in 64 bits mode */
312 /* Get TOC pointer (current runtime address) */
315 /* find out where we are now */
317 0: mflr r26 /* r26 = runtime addr here */
318 addis r26,r26,(_stext - 0b)@ha
319 addi r26,r26,(_stext - 0b)@l /* current runtime base addr */
322 * Are we booted from a PROM Of-type client-interface ?
326 b .__boot_from_prom /* yes -> prom */
328 /* Save parameters */
332 #ifdef CONFIG_PPC_BOOK3E
333 bl .start_initialization_book3e
334 b .__after_prom_start
336 /* Setup some critical 970 SPRs before switching MMU off */
339 cmpwi r0,0x39 /* 970 */
341 cmpwi r0,0x3c /* 970FX */
343 cmpwi r0,0x44 /* 970MP */
345 cmpwi r0,0x45 /* 970GX */
347 1: bl .__cpu_preinit_ppc970
350 /* Switch off MMU if not already off */
352 b .__after_prom_start
353 #endif /* CONFIG_PPC_BOOK3E */
355 _INIT_STATIC(__boot_from_prom)
356 #ifdef CONFIG_PPC_OF_BOOT_TRAMPOLINE
357 /* Save parameters */
365 * Align the stack to 16-byte boundary
366 * Depending on the size and layout of the ELF sections in the initial
367 * boot binary, the stack pointer may be unaligned on PowerMac
371 #ifdef CONFIG_RELOCATABLE
372 /* Relocate code for where we are now */
377 /* Restore parameters */
384 /* Do all of the interaction with OF client interface */
387 #endif /* #CONFIG_PPC_OF_BOOT_TRAMPOLINE */
389 /* We never return. We also hit that trap if trying to boot
390 * from OF while CONFIG_PPC_OF_BOOT_TRAMPOLINE isn't selected */
393 _STATIC(__after_prom_start)
394 #ifdef CONFIG_RELOCATABLE
395 /* process relocations for the final address of the kernel */
396 lis r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
398 lwz r7,__run_at_load-_stext(r26)
399 cmplwi cr0,r7,1 /* flagged to stay where we are ? */
407 * We need to run with _stext at physical address PHYSICAL_START.
408 * This will leave some code in the first 256B of
409 * real memory, which are reserved for software use.
411 * Note: This process overwrites the OF exception vectors.
413 li r3,0 /* target addr */
414 #ifdef CONFIG_PPC_BOOK3E
415 tovirt(r3,r3) /* on booke, we already run at PAGE_OFFSET */
417 mr. r4,r26 /* In some cases the loader may */
418 beq 9f /* have already put us at zero */
419 li r6,0x100 /* Start offset, the first 0x100 */
420 /* bytes were copied earlier. */
421 #ifdef CONFIG_PPC_BOOK3E
422 tovirt(r6,r6) /* on booke, we already run at PAGE_OFFSET */
425 #ifdef CONFIG_CRASH_DUMP
427 * Check if the kernel has to be running as relocatable kernel based on the
428 * variable __run_at_load, if it is set the kernel is treated as relocatable
429 * kernel, otherwise it will be moved to PHYSICAL_START
431 lwz r7,__run_at_load-_stext(r26)
435 li r5,__end_interrupts - _stext /* just copy interrupts */
439 lis r5,(copy_to_here - _stext)@ha
440 addi r5,r5,(copy_to_here - _stext)@l /* # bytes of memory to copy */
442 bl .copy_and_flush /* copy the first n bytes */
443 /* this includes the code being */
445 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */
446 addi r8,r8,(4f - _stext)@l /* that we just made */
450 p_end: .llong _end - _stext
452 4: /* Now copy the rest of the kernel up to _end */
453 addis r5,r26,(p_end - _stext)@ha
454 ld r5,(p_end - _stext)@l(r5) /* get _end */
455 5: bl .copy_and_flush /* copy the rest */
457 9: b .start_here_multiplatform
460 * Copy routine used to copy the kernel to start at physical address 0
461 * and flush and invalidate the caches as needed.
462 * r3 = dest addr, r4 = source addr, r5 = copy limit, r6 = start offset
463 * on exit, r3, r4, r5 are unchanged, r6 is updated to be >= r5.
465 * Note: this routine *only* clobbers r0, r6 and lr
467 _GLOBAL(copy_and_flush)
470 4: li r0,8 /* Use the smallest common */
471 /* denominator cache line */
472 /* size. This results in */
473 /* extra cache line flushes */
474 /* but operation is correct. */
475 /* Can't get cache line size */
476 /* from NACA as it is being */
479 mtctr r0 /* put # words/line in ctr */
480 3: addi r6,r6,8 /* copy a cache line */
484 dcbst r6,r3 /* write it to memory */
486 icbi r6,r3 /* flush the icache line */
498 #ifdef CONFIG_PPC_PMAC
500 * On PowerMac, secondary processors starts from the reset vector, which
501 * is temporarily turned into a call to one of the functions below.
506 .globl __secondary_start_pmac_0
507 __secondary_start_pmac_0:
508 /* NB the entries for cpus 0, 1, 2 must each occupy 8 bytes. */
518 _GLOBAL(pmac_secondary_start)
519 /* turn on 64-bit mode */
524 rldimi r3,r0,40,23 /* clear bit 23 (rm_ci) */
531 /* get TOC pointer (real address) */
534 /* Copy some CPU settings from CPU 0 */
535 bl .__restore_cpu_ppc970
537 /* pSeries do that early though I don't think we really need it */
540 mtmsrd r3 /* RI on */
542 /* Set up a paca value for this processor. */
543 LOAD_REG_ADDR(r4,paca) /* Load paca pointer */
544 ld r4,0(r4) /* Get base vaddr of paca array */
545 mulli r13,r24,PACA_SIZE /* Calculate vaddr of right paca */
546 add r13,r13,r4 /* for this processor. */
547 SET_PACA(r13) /* Save vaddr of paca in an SPRG*/
549 /* Mark interrupts soft and hard disabled (they might be enabled
550 * in the PACA when doing hotplug)
553 stb r0,PACASOFTIRQEN(r13)
554 stb r0,PACAHARDIRQEN(r13)
556 /* Create a temp kernel stack for use before relocation is on. */
557 ld r1,PACAEMERGSP(r13)
558 subi r1,r1,STACK_FRAME_OVERHEAD
562 #endif /* CONFIG_PPC_PMAC */
565 * This function is called after the master CPU has released the
566 * secondary processors. The execution environment is relocation off.
567 * The paca for this processor has the following fields initialized at
569 * 1. Processor number
570 * 2. Segment table pointer (virtual address)
571 * On entry the following are set:
572 * r1 = stack pointer. vaddr for iSeries, raddr (temp stack) for pSeries
573 * r24 = cpu# (in Linux terms)
574 * r13 = paca virtual address
575 * SPRG_PACA = paca virtual address
580 .globl __secondary_start
582 /* Set thread priority to MEDIUM */
585 /* Initialize the kernel stack. Just a repeat for iSeries. */
586 LOAD_REG_ADDR(r3, current_set)
587 sldi r28,r24,3 /* get current_set[cpu#] */
589 addi r14,r14,THREAD_SIZE-STACK_FRAME_OVERHEAD
590 std r14,PACAKSAVE(r13)
592 /* Do early setup for that CPU (stab, slb, hash table pointer) */
593 bl .early_setup_secondary
596 * setup the new stack pointer, but *don't* use this until
601 /* Clear backchain so we get nice backtraces */
605 /* enable MMU and jump to start_secondary */
606 LOAD_REG_ADDR(r3, .start_secondary_prolog)
607 LOAD_REG_IMMEDIATE(r4, MSR_KERNEL)
608 #ifdef CONFIG_PPC_ISERIES
612 stb r8,PACAHARDIRQEN(r13)
613 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
616 stb r7,PACAHARDIRQEN(r13)
617 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
618 stb r7,PACASOFTIRQEN(r13)
623 b . /* prevent speculative execution */
626 * Running with relocation on at this point. All we want to do is
627 * zero the stack back-chain pointer and get the TOC virtual address
628 * before going into C code.
630 _GLOBAL(start_secondary_prolog)
633 std r3,0(r1) /* Zero the stack frame pointer */
637 * Reset stack pointer and call start_secondary
638 * to continue with online operation when woken up
639 * from cede in cpu offline.
641 _GLOBAL(start_secondary_resume)
642 ld r1,PACAKSAVE(r13) /* Reload kernel stack pointer */
644 std r3,0(r1) /* Zero the stack frame pointer */
650 * This subroutine clobbers r11 and r12
652 _GLOBAL(enable_64b_mode)
653 mfmsr r11 /* grab the current MSR */
654 #ifdef CONFIG_PPC_BOOK3E
655 oris r11,r11,0x8000 /* CM bit set, we'll set ICM later */
657 #else /* CONFIG_PPC_BOOK3E */
658 li r12,(MSR_SF | MSR_ISF)@highest
667 * This puts the TOC pointer into r2, offset by 0x8000 (as expected
668 * by the toolchain). It computes the correct value for wherever we
669 * are running at the moment, using position-independent code.
671 _GLOBAL(relative_toc)
675 ld r2,(p_toc - 0b)(r9)
680 p_toc: .llong __toc_start + 0x8000 - 0b
683 * This is where the main kernel code starts.
685 _INIT_STATIC(start_here_multiplatform)
686 /* set up the TOC (real address) */
689 /* Clear out the BSS. It may have been done in prom_init,
690 * already but that's irrelevant since prom_init will soon
691 * be detached from the kernel completely. Besides, we need
692 * to clear it now for kexec-style entry.
694 LOAD_REG_ADDR(r11,__bss_stop)
695 LOAD_REG_ADDR(r8,__bss_start)
696 sub r11,r11,r8 /* bss size */
697 addi r11,r11,7 /* round up to an even double word */
698 srdi. r11,r11,3 /* shift right by 3 */
702 mtctr r11 /* zero this many doublewords */
707 #ifndef CONFIG_PPC_BOOK3E
710 mtmsrd r6 /* RI on */
713 #ifdef CONFIG_RELOCATABLE
714 /* Save the physical address we're running at in kernstart_addr */
715 LOAD_REG_ADDR(r4, kernstart_addr)
720 /* The following gets the stack set up with the regs */
721 /* pointing to the real addr of the kernel stack. This is */
722 /* all done to support the C function call below which sets */
723 /* up the htab. This is done because we have relocated the */
724 /* kernel but are still running in real mode. */
726 LOAD_REG_ADDR(r3,init_thread_union)
728 /* set up a stack pointer */
729 addi r1,r3,THREAD_SIZE
731 stdu r0,-STACK_FRAME_OVERHEAD(r1)
733 /* Do very early kernel initializations, including initial hash table,
734 * stab and slb setup before we turn on relocation. */
736 /* Restore parameters passed from prom_init/kexec */
738 bl .early_setup /* also sets r13 and SPRG_PACA */
740 LOAD_REG_ADDR(r3, .start_here_common)
745 b . /* prevent speculative execution */
747 /* This is where all platforms converge execution */
748 _INIT_GLOBAL(start_here_common)
749 /* relocation is on at this point */
750 std r1,PACAKSAVE(r13)
752 /* Load the TOC (virtual address) */
757 /* Load up the kernel context */
760 stb r5,PACASOFTIRQEN(r13) /* Soft Disabled */
761 #ifdef CONFIG_PPC_ISERIES
764 ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/
767 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
769 stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
777 * We put a few things here that have to be page-aligned.
778 * This stuff goes at the beginning of the bss, which is page-aligned.
784 .globl empty_zero_page
788 .globl swapper_pg_dir
790 .space PGD_TABLE_SIZE