2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x2fff : pSeries Interrupt prologs
23 * 0x3000 - 0x5fff : interrupt support common interrupt prologs
24 * 0x6000 - 0x6fff : Initial (CPU0) segment table
25 * 0x7000 - 0x7fff : FWNMI data area
26 * 0x8000 - : Early init and support code
28 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
29 #define SYSCALL_PSERIES_1 \
33 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
36 mfspr r11,SPRN_SRR0 ; \
39 #define SYSCALL_PSERIES_2_RFID \
40 mfspr r12,SPRN_SRR1 ; \
41 ld r10,PACAKBASE(r13) ; \
42 LOAD_HANDLER(r10, system_call_entry) ; \
43 mtspr SPRN_SRR0,r10 ; \
44 ld r10,PACAKMSR(r13) ; \
45 mtspr SPRN_SRR1,r10 ; \
47 b . ; /* prevent speculative execution */
49 #define SYSCALL_PSERIES_3 \
50 /* Fast LE/BE switch system call */ \
51 1: mfspr r12,SPRN_SRR1 ; \
52 xori r12,r12,MSR_LE ; \
53 mtspr SPRN_SRR1,r12 ; \
54 rfid ; /* return to userspace */ \
56 2: mfspr r12,SPRN_SRR1 ; \
57 andi. r12,r12,MSR_PR ; \
59 mtspr SPRN_SRR0,r3 ; \
60 mtspr SPRN_SRR1,r4 ; \
61 mtspr SPRN_SDR1,r5 ; \
63 b . ; /* prevent speculative execution */
65 #if defined(CONFIG_RELOCATABLE)
67 * We can't branch directly; in the direct case we use LR
68 * and system_call_entry restores LR. (We thus need to move
69 * LR to r10 in the RFID case too.)
71 #define SYSCALL_PSERIES_2_DIRECT \
73 ld r12,PACAKBASE(r13) ; \
74 LOAD_HANDLER(r12, system_call_entry_direct) ; \
76 mfspr r12,SPRN_SRR1 ; \
77 /* Re-use of r13... No spare regs to do this */ \
80 GET_PACA(r13) ; /* get r13 back */ \
83 /* We can branch directly */
84 #define SYSCALL_PSERIES_2_DIRECT \
85 mfspr r12,SPRN_SRR1 ; \
87 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
88 b system_call_entry_direct ;
92 * This is the start of the interrupt handlers for pSeries
93 * This code runs with relocation off.
94 * Code from here to __end_interrupts gets copied down to real
95 * address 0x100 when we are running a relocatable kernel.
96 * Therefore any relative branches in this section must only
97 * branch to labels in this section.
100 .globl __start_interrupts
103 .globl system_reset_pSeries;
104 system_reset_pSeries:
107 #ifdef CONFIG_PPC_P7_NAP
109 /* Running native on arch 2.06 or later, check if we are
110 * waking up from nap. We only handle no state loss and
111 * supervisor state loss. We do -not- handle hypervisor
112 * state loss at this time.
115 rlwinm. r13,r13,47-31,30,31
118 /* waking up from powersave (nap) state */
120 /* Total loss of HV state is fatal, we could try to use the
121 * PIR to locate a PACA, then use an emergency stack etc...
122 * but for now, let's just stay stuck here
127 #ifdef CONFIG_KVM_BOOK3S_64_HV
128 li r0,KVM_HWTHREAD_IN_KERNEL
129 stb r0,HSTATE_HWTHREAD_STATE(r13)
130 /* Order setting hwthread_state vs. testing hwthread_req */
132 lbz r0,HSTATE_HWTHREAD_REQ(r13)
140 b .power7_wakeup_noloss
141 2: b .power7_wakeup_loss
143 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
144 #endif /* CONFIG_PPC_P7_NAP */
145 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
149 machine_check_pSeries_1:
150 /* This is moved out of line as it can be patched by FW, but
151 * some code path might still want to branch into the original
154 b machine_check_pSeries
157 .globl data_access_pSeries
162 b data_access_check_stab
163 data_access_not_stab:
164 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
165 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
169 .globl data_access_slb_pSeries
170 data_access_slb_pSeries:
173 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
174 std r3,PACA_EXSLB+EX_R3(r13)
177 /* Keep that around for when we re-implement dynamic VSIDs */
179 bge slb_miss_user_pseries
180 #endif /* __DISABLED__ */
182 #ifndef CONFIG_RELOCATABLE
186 * We can't just use a direct branch to .slb_miss_realmode
187 * because the distance from here to there depends on where
188 * the kernel ends up being put.
191 ld r10,PACAKBASE(r13)
192 LOAD_HANDLER(r10, .slb_miss_realmode)
197 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
200 .globl instruction_access_slb_pSeries
201 instruction_access_slb_pSeries:
204 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
205 std r3,PACA_EXSLB+EX_R3(r13)
206 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
208 /* Keep that around for when we re-implement dynamic VSIDs */
210 bge slb_miss_user_pseries
211 #endif /* __DISABLED__ */
213 #ifndef CONFIG_RELOCATABLE
217 ld r10,PACAKBASE(r13)
218 LOAD_HANDLER(r10, .slb_miss_realmode)
223 /* We open code these as we can't have a ". = x" (even with
224 * x = "." within a feature section
227 .globl hardware_interrupt_pSeries;
228 .globl hardware_interrupt_hv;
229 hardware_interrupt_pSeries:
230 hardware_interrupt_hv:
232 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
233 EXC_HV, SOFTEN_TEST_HV)
234 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
236 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
237 EXC_STD, SOFTEN_TEST_HV_201)
238 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
239 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
241 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
242 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
244 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
245 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
247 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
248 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
250 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
251 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
253 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
254 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
256 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
257 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
260 .globl system_call_pSeries
263 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
266 std r9,PACA_EXGEN+EX_R9(r13)
267 std r10,PACA_EXGEN+EX_R10(r13)
273 SYSCALL_PSERIES_2_RFID
275 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
277 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
278 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
280 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
281 * out of line to handle them
284 hv_exception_trampoline:
289 b emulation_assist_hv
295 /* We need to deal with the Altivec unavailable exception
296 * here which is at 0xf20, thus in the middle of the
297 * prolog code of the PerformanceMonitor one. A little
298 * trickery is thus necessary
300 performance_monitor_pSeries_1:
302 b performance_monitor_pSeries
304 altivec_unavailable_pSeries_1:
306 b altivec_unavailable_pSeries
308 vsx_unavailable_pSeries_1:
310 b vsx_unavailable_pSeries
312 #ifdef CONFIG_CBE_RAS
313 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
314 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
315 #endif /* CONFIG_CBE_RAS */
317 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
318 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
321 .global denorm_exception_hv
324 mtspr SPRN_SPRG_HSCRATCH0,r13
325 mfspr r13,SPRN_SPRG_HPACA
326 std r9,PACA_EXGEN+EX_R9(r13)
327 std r10,PACA_EXGEN+EX_R10(r13)
328 std r11,PACA_EXGEN+EX_R11(r13)
329 std r12,PACA_EXGEN+EX_R12(r13)
330 mfspr r9,SPRN_SPRG_HSCRATCH0
331 std r9,PACA_EXGEN+EX_R13(r13)
334 #ifdef CONFIG_PPC_DENORMALISATION
336 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
337 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
338 addi r11,r11,-4 /* HSRR0 is next instruction */
342 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
343 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
345 #ifdef CONFIG_CBE_RAS
346 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
347 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
348 #endif /* CONFIG_CBE_RAS */
350 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
351 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
353 #ifdef CONFIG_CBE_RAS
354 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
355 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
358 #endif /* CONFIG_CBE_RAS */
361 /*** Out of line interrupts support ***/
364 /* moved from 0x200 */
365 machine_check_pSeries:
366 .globl machine_check_fwnmi
369 SET_SCRATCH0(r13) /* save r13 */
370 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
371 EXC_STD, KVMTEST, 0x200)
372 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
374 /* moved from 0x300 */
375 data_access_check_stab:
377 std r9,PACA_EXSLB+EX_R9(r13)
378 std r10,PACA_EXSLB+EX_R10(r13)
382 rlwimi r10,r9,16,0x20
383 #ifdef CONFIG_KVM_BOOK3S_PR
384 lbz r9,HSTATE_IN_GUEST(r13)
385 rlwimi r10,r9,8,0x300
389 beq do_stab_bolted_pSeries
391 ld r9,PACA_EXSLB+EX_R9(r13)
392 ld r10,PACA_EXSLB+EX_R10(r13)
393 b data_access_not_stab
394 do_stab_bolted_pSeries:
395 std r11,PACA_EXSLB+EX_R11(r13)
396 std r12,PACA_EXSLB+EX_R12(r13)
398 std r10,PACA_EXSLB+EX_R13(r13)
399 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
401 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
402 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
403 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
404 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
405 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
406 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
408 #ifdef CONFIG_PPC_DENORMALISATION
412 * To denormalise we need to move a copy of the register to itself.
413 * For POWER6 do that here for all FP regs.
416 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
417 xori r10,r10,(MSR_FE0|MSR_FE1)
454 * To denormalise we need to move a copy of the register to itself.
455 * For POWER7 do that here for the first 32 VSX registers only.
458 oris r10,r10,MSR_VSX@h
493 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
496 ld r9,PACA_EXGEN+EX_R9(r13)
497 ld r10,PACA_EXGEN+EX_R10(r13)
498 ld r11,PACA_EXGEN+EX_R11(r13)
499 ld r12,PACA_EXGEN+EX_R12(r13)
500 ld r13,PACA_EXGEN+EX_R13(r13)
506 /* moved from 0xe00 */
507 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
508 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
509 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
510 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
511 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
512 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
513 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
514 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
516 /* moved from 0xf00 */
517 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
518 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
519 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
520 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
521 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
522 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
525 * An interrupt came in while soft-disabled. We set paca->irq_happened,
526 * then, if it was a decrementer interrupt, we bump the dec to max and
527 * and return, else we hard disable and return. This is called with
528 * r10 containing the value to OR to the paca field.
530 #define MASKED_INTERRUPT(_H) \
531 masked_##_H##interrupt: \
532 std r11,PACA_EXGEN+EX_R11(r13); \
533 lbz r11,PACAIRQHAPPENED(r13); \
535 stb r11,PACAIRQHAPPENED(r13); \
536 andi. r10,r10,PACA_IRQ_DEC; \
539 ori r10,r10,0xffff; \
540 mtspr SPRN_DEC,r10; \
542 1: mfspr r10,SPRN_##_H##SRR1; \
543 rldicl r10,r10,48,1; /* clear MSR_EE */ \
545 mtspr SPRN_##_H##SRR1,r10; \
547 ld r9,PACA_EXGEN+EX_R9(r13); \
548 ld r10,PACA_EXGEN+EX_R10(r13); \
549 ld r11,PACA_EXGEN+EX_R11(r13); \
558 * Called from arch_local_irq_enable when an interrupt needs
559 * to be resent. r3 contains 0x500 or 0x900 to indicate which
560 * kind of interrupt. MSR:EE is already off. We generate a
561 * stackframe like if a real interrupt had happened.
563 * Note: While MSR:EE is off, we need to make sure that _MSR
564 * in the generated frame has EE set to 1 or the exception
565 * handler will not properly re-enable them.
567 _GLOBAL(__replay_interrupt)
568 /* We are going to jump to the exception common code which
569 * will retrieve various register values from the PACA which
570 * we don't give a damn about, so we don't bother storing them.
577 bne decrementer_common
578 b hardware_interrupt_common
580 #ifdef CONFIG_PPC_PSERIES
582 * Vectors for the FWNMI option. Share common code.
584 .globl system_reset_fwnmi
588 SET_SCRATCH0(r13) /* save r13 */
589 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
592 #endif /* CONFIG_PPC_PSERIES */
596 * This is used for when the SLB miss handler has to go virtual,
597 * which doesn't happen for now anymore but will once we re-implement
598 * dynamic VSIDs for shared page tables
600 slb_miss_user_pseries:
601 std r10,PACA_EXGEN+EX_R10(r13)
602 std r11,PACA_EXGEN+EX_R11(r13)
603 std r12,PACA_EXGEN+EX_R12(r13)
605 ld r11,PACA_EXSLB+EX_R9(r13)
606 ld r12,PACA_EXSLB+EX_R3(r13)
607 std r10,PACA_EXGEN+EX_R13(r13)
608 std r11,PACA_EXGEN+EX_R9(r13)
609 std r12,PACA_EXGEN+EX_R3(r13)
612 mfspr r11,SRR0 /* save SRR0 */
613 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
614 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
616 mfspr r12,SRR1 /* and SRR1 */
619 b . /* prevent spec. execution */
620 #endif /* __DISABLED__ */
623 .globl __end_interrupts
627 * Code from here down to __end_handlers is invoked from the
628 * exception prologs above. Because the prologs assemble the
629 * addresses of these handlers using the LOAD_HANDLER macro,
630 * which uses an ori instruction, these handlers must be in
631 * the first 64k of the kernel image.
634 /*** Common interrupt handlers ***/
636 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
639 * Machine check is different because we use a different
640 * save area: PACA_EXMC instead of PACA_EXGEN.
643 .globl machine_check_common
644 machine_check_common:
645 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
649 addi r3,r1,STACK_FRAME_OVERHEAD
650 bl .machine_check_exception
653 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
654 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
655 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
656 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
657 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
658 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
659 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
660 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
661 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
662 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
663 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
664 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
665 #ifdef CONFIG_ALTIVEC
666 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
668 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
670 #ifdef CONFIG_CBE_RAS
671 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
672 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
673 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
674 #endif /* CONFIG_CBE_RAS */
680 ppc64_runlatch_on_trampoline:
681 b .__ppc64_runlatch_on
684 * Here we have detected that the kernel stack pointer is bad.
685 * R9 contains the saved CR, r13 points to the paca,
686 * r10 contains the (bad) kernel stack pointer,
687 * r11 and r12 contain the saved SRR0 and SRR1.
688 * We switch to using an emergency stack, save the registers there,
689 * and call kernel_bad_stack(), which panics.
692 ld r1,PACAEMERGSP(r13)
693 subi r1,r1,64+INT_FRAME_SIZE
725 std r10,ORIG_GPR3(r1)
726 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
729 lhz r12,PACA_TRAP_SAVE(r13)
731 addi r11,r1,INT_FRAME_SIZE
736 ld r11,exception_marker@toc(r2)
738 std r11,STACK_FRAME_OVERHEAD-16(r1)
739 1: addi r3,r1,STACK_FRAME_OVERHEAD
744 * Here r13 points to the paca, r9 contains the saved CR,
745 * SRR0 and SRR1 are saved in r11 and r12,
746 * r9 - r13 are saved in paca->exgen.
749 .globl data_access_common
752 std r10,PACA_EXGEN+EX_DAR(r13)
754 stw r10,PACA_EXGEN+EX_DSISR(r13)
755 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
758 ld r3,PACA_EXGEN+EX_DAR(r13)
759 lwz r4,PACA_EXGEN+EX_DSISR(r13)
761 b .do_hash_page /* Try to handle as hpte fault */
764 .globl h_data_storage_common
765 h_data_storage_common:
767 std r10,PACA_EXGEN+EX_DAR(r13)
768 mfspr r10,SPRN_HDSISR
769 stw r10,PACA_EXGEN+EX_DSISR(r13)
770 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
773 addi r3,r1,STACK_FRAME_OVERHEAD
774 bl .unknown_exception
778 .globl instruction_access_common
779 instruction_access_common:
780 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
786 b .do_hash_page /* Try to handle as hpte fault */
788 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
791 * Here is the common SLB miss user that is used when going to virtual
792 * mode for SLB misses, that is currently not used
796 .globl slb_miss_user_common
797 slb_miss_user_common:
799 std r3,PACA_EXGEN+EX_DAR(r13)
800 stw r9,PACA_EXGEN+EX_CCR(r13)
801 std r10,PACA_EXGEN+EX_LR(r13)
802 std r11,PACA_EXGEN+EX_SRR0(r13)
803 bl .slb_allocate_user
805 ld r10,PACA_EXGEN+EX_LR(r13)
806 ld r3,PACA_EXGEN+EX_R3(r13)
807 lwz r9,PACA_EXGEN+EX_CCR(r13)
808 ld r11,PACA_EXGEN+EX_SRR0(r13)
812 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
813 beq- unrecov_user_slb
821 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
827 ld r9,PACA_EXGEN+EX_R9(r13)
828 ld r10,PACA_EXGEN+EX_R10(r13)
829 ld r11,PACA_EXGEN+EX_R11(r13)
830 ld r12,PACA_EXGEN+EX_R12(r13)
831 ld r13,PACA_EXGEN+EX_R13(r13)
836 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
837 ld r4,PACA_EXGEN+EX_DAR(r13)
844 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
847 1: addi r3,r1,STACK_FRAME_OVERHEAD
848 bl .unrecoverable_exception
851 #endif /* __DISABLED__ */
855 * r13 points to the PACA, r9 contains the saved CR,
856 * r12 contain the saved SRR1, SRR0 is still ready for return
857 * r3 has the faulting address
858 * r9 - r13 are saved in paca->exslb.
859 * r3 is saved in paca->slb_r3
860 * We assume we aren't going to take any exceptions during this procedure.
862 _GLOBAL(slb_miss_realmode)
864 #ifdef CONFIG_RELOCATABLE
868 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
869 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
871 bl .slb_allocate_realmode
873 /* All done -- return from exception. */
875 ld r10,PACA_EXSLB+EX_LR(r13)
876 ld r3,PACA_EXSLB+EX_R3(r13)
877 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
881 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
887 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
890 ld r9,PACA_EXSLB+EX_R9(r13)
891 ld r10,PACA_EXSLB+EX_R10(r13)
892 ld r11,PACA_EXSLB+EX_R11(r13)
893 ld r12,PACA_EXSLB+EX_R12(r13)
894 ld r13,PACA_EXSLB+EX_R13(r13)
896 b . /* prevent speculative execution */
898 2: mfspr r11,SPRN_SRR0
899 ld r10,PACAKBASE(r13)
900 LOAD_HANDLER(r10,unrecov_slb)
908 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
911 1: addi r3,r1,STACK_FRAME_OVERHEAD
912 bl .unrecoverable_exception
916 #ifdef CONFIG_PPC_970_NAP
919 std r9,TI_LOCAL_FLAGS(r11)
920 ld r10,_LINK(r1) /* make idle task do the */
921 std r10,_NIP(r1) /* equivalent of a blr */
926 .globl alignment_common
929 std r10,PACA_EXGEN+EX_DAR(r13)
931 stw r10,PACA_EXGEN+EX_DSISR(r13)
932 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
933 ld r3,PACA_EXGEN+EX_DAR(r13)
934 lwz r4,PACA_EXGEN+EX_DSISR(r13)
939 addi r3,r1,STACK_FRAME_OVERHEAD
940 bl .alignment_exception
944 .globl program_check_common
945 program_check_common:
946 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
949 addi r3,r1,STACK_FRAME_OVERHEAD
950 bl .program_check_exception
954 .globl fp_unavailable_common
955 fp_unavailable_common:
956 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
957 bne 1f /* if from user, just load it up */
960 addi r3,r1,STACK_FRAME_OVERHEAD
961 bl .kernel_fp_unavailable_exception
964 b fast_exception_return
967 .globl altivec_unavailable_common
968 altivec_unavailable_common:
969 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
970 #ifdef CONFIG_ALTIVEC
974 b fast_exception_return
976 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
980 addi r3,r1,STACK_FRAME_OVERHEAD
981 bl .altivec_unavailable_exception
985 .globl vsx_unavailable_common
986 vsx_unavailable_common:
987 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
993 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
997 addi r3,r1,STACK_FRAME_OVERHEAD
998 bl .vsx_unavailable_exception
1002 .globl __end_handlers
1009 _STATIC(do_hash_page)
1013 andis. r0,r4,0xa410 /* weird error? */
1014 bne- handle_page_fault /* if not, try to insert a HPTE */
1015 andis. r0,r4,DSISR_DABRMATCH@h
1016 bne- handle_dabr_fault
1019 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1020 bne- do_ste_alloc /* If so handle it */
1021 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1023 CURRENT_THREAD_INFO(r11, r1)
1024 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1025 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1026 bne 77f /* then don't call hash_page now */
1028 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1029 * accessing a userspace segment (even from the kernel). We assume
1030 * kernel addresses always have the high bit set.
1032 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1033 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1034 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1035 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1036 ori r4,r4,1 /* add _PAGE_PRESENT */
1037 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1040 * r3 contains the faulting address
1041 * r4 contains the required access permissions
1042 * r5 contains the trap number
1044 * at return r3 = 0 for success, 1 for page fault, negative for error
1046 bl .hash_page /* build HPTE if possible */
1047 cmpdi r3,0 /* see if hash_page succeeded */
1050 beq fast_exc_return_irq /* Return from exception on success */
1055 /* Here we have a page fault that hash_page can't handle. */
1059 addi r3,r1,STACK_FRAME_OVERHEAD
1065 addi r3,r1,STACK_FRAME_OVERHEAD
1070 /* We have a data breakpoint exception - handle it */
1075 addi r3,r1,STACK_FRAME_OVERHEAD
1077 12: b .ret_from_except_lite
1080 /* We have a page fault that hash_page could handle but HV refused
1085 addi r3,r1,STACK_FRAME_OVERHEAD
1091 * We come here as a result of a DSI at a point where we don't want
1092 * to call hash_page, such as when we are accessing memory (possibly
1093 * user memory) inside a PMU interrupt that occurred while interrupts
1094 * were soft-disabled. We want to invoke the exception handler for
1095 * the access, or panic if there isn't a handler.
1099 addi r3,r1,STACK_FRAME_OVERHEAD
1104 /* here we have a segment miss */
1106 bl .ste_allocate /* try to insert stab entry */
1108 bne- handle_page_fault
1109 b fast_exception_return
1112 * r13 points to the PACA, r9 contains the saved CR,
1113 * r11 and r12 contain the saved SRR0 and SRR1.
1114 * r9 - r13 are saved in paca->exslb.
1115 * We assume we aren't going to take any exceptions during this procedure.
1116 * We assume (DAR >> 60) == 0xc.
1119 _GLOBAL(do_stab_bolted)
1120 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1121 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1123 /* Hash to the primary group */
1124 ld r10,PACASTABVIRT(r13)
1127 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1129 /* Calculate VSID */
1130 /* This is a kernel address, so protovsid = ESID | 1 << 37 */
1132 rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
1133 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1134 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1136 /* Search the primary group for a free entry */
1137 1: ld r11,0(r10) /* Test valid bit of the current ste */
1144 /* Stick for only searching the primary group for now. */
1145 /* At least for now, we use a very simple random castout scheme */
1146 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1148 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1151 /* r10 currently points to an ste one past the group of interest */
1152 /* make it point to the randomly selected entry */
1154 or r10,r10,r11 /* r10 is the entry to invalidate */
1156 isync /* mark the entry invalid */
1158 rldicl r11,r11,56,1 /* clear the valid bit */
1163 clrrdi r11,r11,28 /* Get the esid part of the ste */
1166 2: std r9,8(r10) /* Store the vsid part of the ste */
1169 mfspr r11,SPRN_DAR /* Get the new esid */
1170 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1171 ori r11,r11,0x90 /* Turn on valid and kp */
1172 std r11,0(r10) /* Put new entry back into the stab */
1176 /* All done -- return from exception. */
1177 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1178 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1180 andi. r10,r12,MSR_RI
1183 mtcrf 0x80,r9 /* restore CR */
1191 ld r9,PACA_EXSLB+EX_R9(r13)
1192 ld r10,PACA_EXSLB+EX_R10(r13)
1193 ld r11,PACA_EXSLB+EX_R11(r13)
1194 ld r12,PACA_EXSLB+EX_R12(r13)
1195 ld r13,PACA_EXSLB+EX_R13(r13)
1197 b . /* prevent speculative execution */
1199 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1201 * Data area reserved for FWNMI option.
1202 * This address (0x7000) is fixed by the RPA.
1205 .globl fwnmi_data_area
1208 /* pseries and powernv need to keep the whole page from
1209 * 0x7000 to 0x8000 free for use by the firmware
1212 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1214 /* Space for CPU0's segment table */
1220 #ifdef CONFIG_PPC_POWERNV
1221 _GLOBAL(opal_mc_secondary_handler)
1227 std r3,PACA_OPAL_MC_EVT(r13)
1228 ld r13,OPAL_MC_SRR0(r3)
1230 ld r13,OPAL_MC_SRR1(r3)
1232 ld r3,OPAL_MC_GPR3(r3)
1234 b machine_check_pSeries
1235 #endif /* CONFIG_PPC_POWERNV */