2 * MPC8544 DS Device Tree Source
4 * Copyright 2007 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
14 compatible = "MPC8544DS", "MPC85xxDS";
26 d-cache-line-size = <20>; // 32 bytes
27 i-cache-line-size = <20>; // 32 bytes
28 d-cache-size = <8000>; // L1, 32K
29 i-cache-size = <8000>; // L1, 32K
30 timebase-frequency = <0>;
32 clock-frequency = <0>;
37 device_type = "memory";
38 reg = <00000000 00000000>; // Filled by U-Boot
46 ranges = <00000000 e0000000 00100000>;
47 reg = <e0000000 00001000>; // CCSRBAR 1M
48 bus-frequency = <0>; // Filled out by uboot.
50 memory-controller@2000 {
51 compatible = "fsl,8544-memory-controller";
53 interrupt-parent = <&mpic>;
57 l2-cache-controller@20000 {
58 compatible = "fsl,8544-l2-cache-controller";
60 cache-line-size = <20>; // 32 bytes
61 cache-size = <40000>; // L2, 256K
62 interrupt-parent = <&mpic>;
70 compatible = "fsl-i2c";
73 interrupt-parent = <&mpic>;
81 compatible = "fsl-i2c";
84 interrupt-parent = <&mpic>;
92 compatible = "gianfar";
94 phy0: ethernet-phy@0 {
95 interrupt-parent = <&mpic>;
98 device_type = "ethernet-phy";
100 phy1: ethernet-phy@1 {
101 interrupt-parent = <&mpic>;
104 device_type = "ethernet-phy";
109 #address-cells = <1>;
111 device_type = "network";
113 compatible = "gianfar";
115 local-mac-address = [ 00 00 00 00 00 00 ];
116 interrupts = <1d 2 1e 2 22 2>;
117 interrupt-parent = <&mpic>;
118 phy-handle = <&phy0>;
119 phy-connection-type = "rgmii-id";
123 #address-cells = <1>;
125 device_type = "network";
127 compatible = "gianfar";
129 local-mac-address = [ 00 00 00 00 00 00 ];
130 interrupts = <1f 2 20 2 21 2>;
131 interrupt-parent = <&mpic>;
132 phy-handle = <&phy1>;
133 phy-connection-type = "rgmii-id";
137 device_type = "serial";
138 compatible = "ns16550";
140 clock-frequency = <0>;
142 interrupt-parent = <&mpic>;
146 device_type = "serial";
147 compatible = "ns16550";
149 clock-frequency = <0>;
151 interrupt-parent = <&mpic>;
154 global-utilities@e0000 { //global utilities block
155 compatible = "fsl,mpc8548-guts";
161 clock-frequency = <0>;
162 interrupt-controller;
163 #address-cells = <0>;
164 #interrupt-cells = <2>;
166 compatible = "chrp,open-pic";
167 device_type = "open-pic";
173 compatible = "fsl,mpc8540-pci";
175 interrupt-map-mask = <f800 0 0 7>;
178 /* IDSEL 0x11 J17 Slot 1 */
184 /* IDSEL 0x12 J16 Slot 2 */
189 9000 0 0 4 &mpic 1 1>;
191 interrupt-parent = <&mpic>;
194 ranges = <02000000 0 c0000000 c0000000 0 20000000
195 01000000 0 00000000 e1000000 0 00010000>;
196 clock-frequency = <3f940aa>;
197 #interrupt-cells = <1>;
199 #address-cells = <3>;
200 reg = <e0008000 1000>;
204 compatible = "fsl,mpc8548-pcie";
206 #interrupt-cells = <1>;
208 #address-cells = <3>;
209 reg = <e0009000 1000>;
211 ranges = <02000000 0 80000000 80000000 0 20000000
212 01000000 0 00000000 e1010000 0 00010000>;
213 clock-frequency = <1fca055>;
214 interrupt-parent = <&mpic>;
216 interrupt-map-mask = <f800 0 0 7>;
227 #address-cells = <3>;
229 ranges = <02000000 0 80000000
240 compatible = "fsl,mpc8548-pcie";
242 #interrupt-cells = <1>;
244 #address-cells = <3>;
245 reg = <e000a000 1000>;
247 ranges = <02000000 0 a0000000 a0000000 0 10000000
248 01000000 0 00000000 e1020000 0 00010000>;
249 clock-frequency = <1fca055>;
250 interrupt-parent = <&mpic>;
252 interrupt-map-mask = <f800 0 0 7>;
263 #address-cells = <3>;
265 ranges = <02000000 0 a0000000
276 compatible = "fsl,mpc8548-pcie";
278 #interrupt-cells = <1>;
280 #address-cells = <3>;
281 reg = <e000b000 1000>;
283 ranges = <02000000 0 b0000000 b0000000 0 00100000
284 01000000 0 00000000 b0100000 0 00100000>;
285 clock-frequency = <1fca055>;
286 interrupt-parent = <&mpic>;
288 interrupt-map-mask = <ff00 0 0 1>;
291 e000 0 0 1 &i8259 c 2
292 e100 0 0 1 &i8259 9 2
293 e200 0 0 1 &i8259 a 2
294 e300 0 0 1 &i8259 b 2
297 e800 0 0 1 &i8259 6 2
300 f000 0 0 1 &i8259 7 2
301 f100 0 0 1 &i8259 7 2
303 // IDSEL 0x1f IDE/SATA
304 f800 0 0 1 &i8259 e 2
305 f900 0 0 1 &i8259 5 2
311 #address-cells = <3>;
313 ranges = <02000000 0 b0000000
324 #address-cells = <3>;
325 ranges = <02000000 0 b0000000
334 #interrupt-cells = <2>;
336 #address-cells = <2>;
337 reg = <f000 0 0 0 0>;
341 interrupt-parent = <&i8259>;
343 i8259: interrupt-controller@20 {
347 interrupt-controller;
348 device_type = "interrupt-controller";
349 #address-cells = <0>;
350 #interrupt-cells = <2>;
351 compatible = "chrp,iic";
353 interrupt-parent = <&mpic>;
358 #address-cells = <1>;
359 reg = <1 60 1 1 64 1>;
360 interrupts = <1 3 c 3>;
361 interrupt-parent = <&i8259>;
365 compatible = "pnpPNP,303";
370 compatible = "pnpPNP,f03";
375 compatible = "pnpPNP,b00";