2 * MPC8349E MDS Device Tree Source
4 * Copyright 2005, 2006 Freescale Semiconductor Inc.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
13 model = "MPC8349EMDS";
14 compatible = "MPC8349EMDS", "MPC834xMDS", "MPC83xxMDS";
25 d-cache-line-size = <20>; // 32 bytes
26 i-cache-line-size = <20>; // 32 bytes
27 d-cache-size = <8000>; // L1, 32K
28 i-cache-size = <8000>; // L1, 32K
29 timebase-frequency = <0>; // from bootloader
30 bus-frequency = <0>; // from bootloader
31 clock-frequency = <0>; // from bootloader
36 device_type = "memory";
37 reg = <00000000 10000000>; // 256MB at 0
41 device_type = "board-control";
42 reg = <e2400000 8000>;
49 ranges = <0 e0000000 00100000>;
50 reg = <e0000000 00000200>;
54 device_type = "watchdog";
55 compatible = "mpc83xx_wdt";
63 compatible = "fsl-i2c";
66 interrupt-parent = < &ipic >;
70 compatible = "dallas,ds1374";
79 compatible = "fsl-i2c";
82 interrupt-parent = < &ipic >;
88 compatible = "fsl_spi";
91 interrupt-parent = < &ipic >;
95 /* phy type (ULPI or SERIAL) are only types supportted for MPH */
99 compatible = "fsl-usb2-mph";
101 #address-cells = <1>;
103 interrupt-parent = < &ipic >;
108 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
111 compatible = "fsl-usb2-dr";
113 #address-cells = <1>;
115 interrupt-parent = < &ipic >;
122 #address-cells = <1>;
124 compatible = "fsl,gianfar-mdio";
127 phy0: ethernet-phy@0 {
128 interrupt-parent = < &ipic >;
131 device_type = "ethernet-phy";
133 phy1: ethernet-phy@1 {
134 interrupt-parent = < &ipic >;
137 device_type = "ethernet-phy";
141 enet0: ethernet@24000 {
143 device_type = "network";
145 compatible = "gianfar";
147 local-mac-address = [ 00 00 00 00 00 00 ];
148 interrupts = <20 8 21 8 22 8>;
149 interrupt-parent = < &ipic >;
150 phy-handle = < &phy0 >;
151 linux,network-index = <0>;
154 enet1: ethernet@25000 {
156 device_type = "network";
158 compatible = "gianfar";
160 local-mac-address = [ 00 00 00 00 00 00 ];
161 interrupts = <23 8 24 8 25 8>;
162 interrupt-parent = < &ipic >;
163 phy-handle = < &phy1 >;
164 linux,network-index = <1>;
168 device_type = "serial";
169 compatible = "ns16550";
171 clock-frequency = <0>;
173 interrupt-parent = < &ipic >;
177 device_type = "serial";
178 compatible = "ns16550";
180 clock-frequency = <0>;
182 interrupt-parent = < &ipic >;
185 /* May need to remove if on a part without crypto engine */
187 device_type = "crypto";
189 compatible = "talitos";
192 interrupt-parent = < &ipic >;
194 channel-fifo-len = <18>;
195 exec-units-mask = <0000007e>;
196 /* desc mask is for rev2.0,
197 * we need runtime fixup for >2.0 */
198 descriptor-types-mask = <01010ebf>;
202 * interrupts cell = <intr #, sense>
203 * sense values match linux IORESOURCE_IRQ_* defines:
204 * sense == 8: Level, low assertion
205 * sense == 2: Edge, high-to-low change
208 interrupt-controller;
209 #address-cells = <0>;
210 #interrupt-cells = <2>;
212 device_type = "ipic";
217 interrupt-map-mask = <f800 0 0 7>;
221 8800 0 0 1 &ipic 14 8
222 8800 0 0 2 &ipic 15 8
223 8800 0 0 3 &ipic 16 8
224 8800 0 0 4 &ipic 17 8
227 9000 0 0 1 &ipic 16 8
228 9000 0 0 2 &ipic 17 8
229 9000 0 0 3 &ipic 14 8
230 9000 0 0 4 &ipic 15 8
233 9800 0 0 1 &ipic 17 8
234 9800 0 0 2 &ipic 14 8
235 9800 0 0 3 &ipic 15 8
236 9800 0 0 4 &ipic 16 8
239 a800 0 0 1 &ipic 14 8
240 a800 0 0 2 &ipic 15 8
241 a800 0 0 3 &ipic 16 8
242 a800 0 0 4 &ipic 17 8
245 b000 0 0 1 &ipic 17 8
246 b000 0 0 2 &ipic 14 8
247 b000 0 0 3 &ipic 15 8
248 b000 0 0 4 &ipic 16 8
251 b800 0 0 1 &ipic 16 8
252 b800 0 0 2 &ipic 17 8
253 b800 0 0 3 &ipic 14 8
254 b800 0 0 4 &ipic 15 8
257 c000 0 0 1 &ipic 15 8
258 c000 0 0 2 &ipic 16 8
259 c000 0 0 3 &ipic 17 8
260 c000 0 0 4 &ipic 14 8>;
261 interrupt-parent = < &ipic >;
264 ranges = <02000000 0 90000000 90000000 0 10000000
265 42000000 0 80000000 80000000 0 10000000
266 01000000 0 00000000 e2000000 0 00100000>;
267 clock-frequency = <3f940aa>;
268 #interrupt-cells = <1>;
270 #address-cells = <3>;
271 reg = <e0008500 100>;
272 compatible = "fsl,mpc8349-pci";
277 interrupt-map-mask = <f800 0 0 7>;
281 8800 0 0 1 &ipic 14 8
282 8800 0 0 2 &ipic 15 8
283 8800 0 0 3 &ipic 16 8
284 8800 0 0 4 &ipic 17 8
287 9000 0 0 1 &ipic 16 8
288 9000 0 0 2 &ipic 17 8
289 9000 0 0 3 &ipic 14 8
290 9000 0 0 4 &ipic 15 8
293 9800 0 0 1 &ipic 17 8
294 9800 0 0 2 &ipic 14 8
295 9800 0 0 3 &ipic 15 8
296 9800 0 0 4 &ipic 16 8
299 a800 0 0 1 &ipic 14 8
300 a800 0 0 2 &ipic 15 8
301 a800 0 0 3 &ipic 16 8
302 a800 0 0 4 &ipic 17 8
305 b000 0 0 1 &ipic 17 8
306 b000 0 0 2 &ipic 14 8
307 b000 0 0 3 &ipic 15 8
308 b000 0 0 4 &ipic 16 8
311 b800 0 0 1 &ipic 16 8
312 b800 0 0 2 &ipic 17 8
313 b800 0 0 3 &ipic 14 8
314 b800 0 0 4 &ipic 15 8
317 c000 0 0 1 &ipic 15 8
318 c000 0 0 2 &ipic 16 8
319 c000 0 0 3 &ipic 17 8
320 c000 0 0 4 &ipic 14 8>;
321 interrupt-parent = < &ipic >;
324 ranges = <02000000 0 b0000000 b0000000 0 10000000
325 42000000 0 a0000000 a0000000 0 10000000
326 01000000 0 00000000 e2100000 0 00100000>;
327 clock-frequency = <3f940aa>;
328 #interrupt-cells = <1>;
330 #address-cells = <3>;
331 reg = <e0008600 100>;
332 compatible = "fsl,mpc8349-pci";