2 * Copyright (C) 2005-2012 Imagination Technologies Ltd.
4 * This file contains the architecture-dependant parts of system setup.
8 #include <linux/bootmem.h>
9 #include <linux/console.h>
10 #include <linux/cpu.h>
11 #include <linux/delay.h>
12 #include <linux/errno.h>
14 #include <linux/genhd.h>
15 #include <linux/init.h>
16 #include <linux/initrd.h>
17 #include <linux/interrupt.h>
18 #include <linux/kernel.h>
19 #include <linux/memblock.h>
21 #include <linux/of_fdt.h>
22 #include <linux/pfn.h>
23 #include <linux/root_dev.h>
24 #include <linux/sched.h>
25 #include <linux/seq_file.h>
26 #include <linux/start_kernel.h>
27 #include <linux/string.h>
29 #include <asm/cachepart.h>
30 #include <asm/clock.h>
31 #include <asm/core_reg.h>
34 #include <asm/highmem.h>
35 #include <asm/hwthread.h>
36 #include <asm/l2cache.h>
37 #include <asm/mach/arch.h>
38 #include <asm/metag_regs.h>
40 #include <asm/mmzone.h>
41 #include <asm/processor.h>
43 #include <asm/sections.h>
44 #include <asm/setup.h>
45 #include <asm/traps.h>
47 /* Priv protect as many registers as possible. */
48 #define DEFAULT_PRIV (TXPRIVEXT_COPRO_BITS | \
49 TXPRIVEXT_TXTRIGGER_BIT | \
50 TXPRIVEXT_TXGBLCREG_BIT | \
51 TXPRIVEXT_ILOCK_BIT | \
52 TXPRIVEXT_TXITACCYC_BIT | \
53 TXPRIVEXT_TXDIVTIME_BIT | \
54 TXPRIVEXT_TXAMAREGX_BIT | \
55 TXPRIVEXT_TXTIMERI_BIT | \
56 TXPRIVEXT_TXSTATUS_BIT | \
57 TXPRIVEXT_TXDISABLE_BIT)
59 /* Meta2 specific bits. */
60 #ifdef CONFIG_METAG_META12
63 #define META2_PRIV (TXPRIVEXT_TXTIMER_BIT | \
67 /* Unaligned access checking bits. */
68 #ifdef CONFIG_METAG_UNALIGNED
69 #define UNALIGNED_PRIV TXPRIVEXT_ALIGNREW_BIT
71 #define UNALIGNED_PRIV 0
74 #define PRIV_BITS (DEFAULT_PRIV | \
78 extern char _heap_start[];
80 #ifdef CONFIG_METAG_BUILTIN_DTB
81 extern u32 __dtb_start[];
84 #ifdef CONFIG_DA_CONSOLE
85 /* Our early channel based console driver */
86 extern struct console dash_console;
89 struct machine_desc *machine_desc __initdata;
92 * Map a Linux CPU number to a hardware thread ID
93 * In SMP this will be setup with the correct mapping at startup; in UP this
94 * will map to the HW thread on which we are running.
96 u8 cpu_2_hwthread_id[NR_CPUS] __read_mostly = {
97 [0 ... NR_CPUS-1] = BAD_HWTHREAD_ID
101 * Map a hardware thread ID to a Linux CPU number
102 * In SMP this will be fleshed out with the correct CPU ID for a particular
103 * hardware thread. In UP this will be initialised with the boot CPU ID.
105 u8 hwthread_id_2_cpu[4] __read_mostly = {
106 [0 ... 3] = BAD_CPU_ID
109 /* The relative offset of the MMU mapped memory (from ldlk or bootloader)
110 * to the real physical memory. This is needed as we have to use the
111 * physical addresses in the MMU tables (pte entries), and not the virtual
113 * This variable is used in the __pa() and __va() macros, and should
114 * probably only be used via them.
116 unsigned int meta_memoffset;
118 static char __initdata *original_cmd_line;
120 DEFINE_PER_CPU(PTBI, pTBI);
123 * Mapping are specified as "CPU_ID:HWTHREAD_ID", e.g.
125 * "hwthread_map=0:1,1:2,2:3,3:0"
127 * Linux CPU ID HWTHREAD_ID
128 * ---------------------------
134 static int __init parse_hwthread_map(char *p)
140 if (cpu < 0 || cpu > 9)
143 p++; /* skip semi-colon */
144 cpu_2_hwthread_id[cpu] = (*p++) - '0';
145 if (cpu_2_hwthread_id[cpu] >= 4)
147 hwthread_id_2_cpu[cpu_2_hwthread_id[cpu]] = cpu;
150 p++; /* skip comma */
155 pr_err("%s: hwthread_map cpu argument out of range\n", __func__);
158 pr_err("%s: hwthread_map thread argument out of range\n", __func__);
161 early_param("hwthread_map", parse_hwthread_map);
163 void __init dump_machine_table(void)
165 struct machine_desc *p;
168 pr_info("Available machine support:\n\tNAME\t\tCOMPATIBLE LIST\n");
169 for_each_machine_desc(p) {
170 pr_info("\t%s\t[", p->name);
171 for (compat = p->dt_compat; compat && *compat; ++compat)
172 printk(" '%s'", *compat);
176 pr_info("\nPlease check your kernel config and/or bootloader.\n");
178 hard_processor_halt(HALT_PANIC);
181 #ifdef CONFIG_METAG_HALT_ON_PANIC
182 static int metag_panic_event(struct notifier_block *this, unsigned long event,
185 hard_processor_halt(HALT_PANIC);
189 static struct notifier_block metag_panic_block = {
196 void __init setup_arch(char **cmdline_p)
198 unsigned long start_pfn;
199 unsigned long text_start = (unsigned long)(&_stext);
200 unsigned long cpu = smp_processor_id();
201 unsigned long heap_start, heap_end;
202 unsigned long start_pte;
210 #ifdef CONFIG_DA_CONSOLE
211 if (metag_da_enabled()) {
212 /* An early channel based console driver */
213 register_console(&dash_console);
214 add_preferred_console("ttyDA", 1, NULL);
218 /* try interpreting the argument as a device tree */
219 machine_desc = setup_machine_fdt(original_cmd_line);
220 /* if it doesn't look like a device tree it must be a command line */
222 #ifdef CONFIG_METAG_BUILTIN_DTB
223 /* try the embedded device tree */
224 machine_desc = setup_machine_fdt(__dtb_start);
226 panic("Invalid embedded device tree.");
228 /* use the default machine description */
229 machine_desc = default_machine_desc();
231 #ifndef CONFIG_CMDLINE_FORCE
232 /* append the bootloader cmdline to any builtin fdt cmdline */
233 if (boot_command_line[0] && original_cmd_line[0])
234 strlcat(boot_command_line, " ", COMMAND_LINE_SIZE);
235 strlcat(boot_command_line, original_cmd_line,
239 setup_meta_clocks(machine_desc->clocks);
241 *cmdline_p = boot_command_line;
245 * Make sure we don't alias in dcache or icache
247 check_for_cache_aliasing(cpu);
250 #ifdef CONFIG_METAG_HALT_ON_PANIC
251 atomic_notifier_chain_register(&panic_notifier_list,
255 #ifdef CONFIG_DUMMY_CONSOLE
256 conswitchp = &dummy_con;
259 if (!(__core_reg_get(TXSTATUS) & TXSTATUS_PSTAT_BIT))
260 panic("Privilege must be enabled for this thread.");
262 _pTBI = __TBI(TBID_ISTAT_BIT);
264 per_cpu(pTBI, cpu) = _pTBI;
266 if (!per_cpu(pTBI, cpu))
267 panic("No TBI found!");
270 * Initialize all interrupt vectors to our copy of __TBIUnExpXXX,
271 * rather than the version from the bootloader. This makes call
272 * stacks easier to understand and may allow us to unmap the
273 * bootloader at some point.
275 * We need to keep the LWK handler that TBI installed in order to
276 * be able to do inter-thread comms.
278 for (i = 0; i <= TBID_SIGNUM_MAX; i++)
279 if (i != TBID_SIGNUM_LWK)
280 _pTBI->fnSigs[i] = __TBIUnExpXXX;
282 /* A Meta requirement is that the kernel is loaded (virtually)
283 * at the PAGE_OFFSET.
285 if (PAGE_OFFSET != text_start)
286 panic("Kernel not loaded at PAGE_OFFSET (%#x) but at %#lx.",
287 PAGE_OFFSET, text_start);
289 start_pte = mmu_read_second_level_page(text_start);
292 * Kernel pages should have the PRIV bit set by the bootloader.
294 if (!(start_pte & _PAGE_KERNEL))
295 panic("kernel pte does not have PRIV set");
298 * See __pa and __va in include/asm/page.h.
299 * This value is negative when running in local space but the
300 * calculations work anyway.
302 meta_memoffset = text_start - (start_pte & PAGE_MASK);
304 /* Now lets look at the heap space */
305 heap_id = (__TBIThreadId() & TBID_THREAD_BITS)
306 + TBID_SEG(0, TBID_SEGSCOPE_LOCAL, TBID_SEGTYPE_HEAP);
308 p_heap = __TBIFindSeg(NULL, heap_id);
311 panic("Could not find heap from TBI!");
313 /* The heap begins at the first full page after the kernel data. */
314 heap_start = (unsigned long) &_heap_start;
316 /* The heap ends at the end of the heap segment specified with
319 if (is_global_space(text_start)) {
320 pr_debug("WARNING: running in global space!\n");
321 heap_end = (unsigned long)p_heap->pGAddr + p_heap->Bytes;
323 heap_end = (unsigned long)p_heap->pLAddr + p_heap->Bytes;
326 ROOT_DEV = Root_RAM0;
328 /* init_mm is the mm struct used for the first task. It is then
329 * cloned for all other tasks spawned from that task.
331 * Note - we are using the virtual addresses here.
333 init_mm.start_code = (unsigned long)(&_stext);
334 init_mm.end_code = (unsigned long)(&_etext);
335 init_mm.end_data = (unsigned long)(&_edata);
336 init_mm.brk = (unsigned long)heap_start;
338 min_low_pfn = PFN_UP(__pa(text_start));
339 max_low_pfn = PFN_DOWN(__pa(heap_end));
341 pfn_base = min_low_pfn;
343 /* Round max_pfn up to a 4Mb boundary. The free_bootmem_node()
344 * call later makes sure to keep the rounded up pages marked reserved.
346 max_pfn = max_low_pfn + ((1 << MAX_ORDER) - 1);
347 max_pfn &= ~((1 << MAX_ORDER) - 1);
349 start_pfn = PFN_UP(__pa(heap_start));
351 if (min_low_pfn & ((1 << MAX_ORDER) - 1)) {
352 /* Theoretically, we could expand the space that the
353 * bootmem allocator covers - much as we do for the
354 * 'high' address, and then tell the bootmem system
355 * that the lowest chunk is 'not available'. Right
356 * now it is just much easier to constrain the
357 * user to always MAX_ORDER align their kernel space.
360 panic("Kernel must be %d byte aligned, currently at %#lx.",
361 1 << (MAX_ORDER + PAGE_SHIFT),
362 min_low_pfn << PAGE_SHIFT);
365 #ifdef CONFIG_HIGHMEM
366 highstart_pfn = highend_pfn = max_pfn;
367 high_memory = (void *) __va(PFN_PHYS(highstart_pfn));
369 high_memory = (void *)__va(PFN_PHYS(max_pfn));
372 paging_init(heap_end);
376 /* Setup the boot cpu's mapping. The rest will be setup below. */
377 cpu_2_hwthread_id[smp_processor_id()] = hard_processor_id();
378 hwthread_id_2_cpu[hard_processor_id()] = smp_processor_id();
380 unflatten_device_tree();
386 if (machine_desc->init_early)
387 machine_desc->init_early();
390 static int __init customize_machine(void)
392 /* customizes platform devices, or adds new ones */
393 if (machine_desc->init_machine)
394 machine_desc->init_machine();
397 arch_initcall(customize_machine);
399 static int __init init_machine_late(void)
401 if (machine_desc->init_late)
402 machine_desc->init_late();
405 late_initcall(init_machine_late);
407 #ifdef CONFIG_PROC_FS
409 * Get CPU information for use by the procfs.
411 static const char *get_cpu_capabilities(unsigned int txenable)
413 #ifdef CONFIG_METAG_META21
414 /* See CORE_ID in META HTP.GP TRM - Architecture Overview 2.1.238 */
415 int coreid = metag_in32(METAC_CORE_ID);
416 unsigned int dsp_type = (coreid >> 3) & 7;
417 unsigned int fpu_type = (coreid >> 7) & 3;
419 switch (dsp_type | fpu_type << 3) {
420 case (0x00): return "EDSP";
421 case (0x01): return "DSP";
422 case (0x08): return "EDSP+LFPU";
423 case (0x09): return "DSP+LFPU";
424 case (0x10): return "EDSP+FPU";
425 case (0x11): return "DSP+FPU";
430 if (!(txenable & TXENABLE_CLASS_BITS))
437 static int show_cpuinfo(struct seq_file *m, void *v)
440 unsigned int txenable, thread_id, major, minor;
441 unsigned long clockfreq = get_coreclock();
449 txenable = __core_reg_get(TXENABLE);
450 major = (txenable & TXENABLE_MAJOR_REV_BITS) >> TXENABLE_MAJOR_REV_S;
451 minor = (txenable & TXENABLE_MINOR_REV_BITS) >> TXENABLE_MINOR_REV_S;
452 thread_id = (txenable >> 8) & 0x3;
455 for_each_online_cpu(i) {
456 lpj = per_cpu(cpu_data, i).loops_per_jiffy;
457 txenable = core_reg_read(TXUCT_ID, TXENABLE_REGNUM,
458 cpu_2_hwthread_id[i]);
460 seq_printf(m, "CPU:\t\t%s %d.%d (thread %d)\n"
461 "Clocking:\t%lu.%1luMHz\n"
462 "BogoMips:\t%lu.%02lu\n"
463 "Calibration:\t%lu loops\n"
464 "Capabilities:\t%s\n\n",
465 cpu, major, minor, i,
466 clockfreq / 1000000, (clockfreq / 100000) % 10,
467 lpj / (500000 / HZ), (lpj / (5000 / HZ)) % 100,
469 get_cpu_capabilities(txenable));
472 seq_printf(m, "CPU:\t\t%s %d.%d (thread %d)\n"
473 "Clocking:\t%lu.%1luMHz\n"
474 "BogoMips:\t%lu.%02lu\n"
475 "Calibration:\t%lu loops\n"
476 "Capabilities:\t%s\n",
477 cpu, major, minor, thread_id,
478 clockfreq / 1000000, (clockfreq / 100000) % 10,
479 loops_per_jiffy / (500000 / HZ),
480 (loops_per_jiffy / (5000 / HZ)) % 100,
482 get_cpu_capabilities(txenable));
483 #endif /* CONFIG_SMP */
485 #ifdef CONFIG_METAG_L2C
486 if (meta_l2c_is_present()) {
487 seq_printf(m, "L2 cache:\t%s\n"
488 "L2 cache size:\t%d KB\n",
489 meta_l2c_is_enabled() ? "enabled" : "disabled",
490 meta_l2c_size() >> 10);
496 static void *c_start(struct seq_file *m, loff_t *pos)
498 return (void *)(*pos == 0);
500 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
504 static void c_stop(struct seq_file *m, void *v)
507 const struct seq_operations cpuinfo_op = {
511 .show = show_cpuinfo,
513 #endif /* CONFIG_PROC_FS */
515 void __init metag_start_kernel(char *args)
517 /* Zero the timer register so timestamps are from the point at
518 * which the kernel started running.
520 __core_reg_set(TXTIMER, 0);
523 memset(__bss_start, 0,
524 (unsigned long)__bss_stop - (unsigned long)__bss_start);
526 /* Remember where these are for use in setup_arch */
527 original_cmd_line = args;
529 current_thread_info()->cpu = hard_processor_id();
535 * Setup TXPRIVEXT register to be prevent userland from touching our
536 * precious registers.
538 void setup_txprivext(void)
540 __core_reg_set(TXPRIVEXT, PRIV_BITS);
543 PTBI pTBI_get(unsigned int cpu)
545 return per_cpu(pTBI, cpu);
548 #if defined(CONFIG_METAG_DSP) && defined(CONFIG_METAG_FPU)
549 char capabilites[] = "dsp fpu";
550 #elif defined(CONFIG_METAG_DSP)
551 char capabilites[] = "dsp";
552 #elif defined(CONFIG_METAG_FPU)
553 char capabilites[] = "fpu";
555 char capabilites[] = "";
558 static struct ctl_table caps_kern_table[] = {
560 .procname = "capabilities",
562 .maxlen = sizeof(capabilites),
564 .proc_handler = proc_dostring,
569 static struct ctl_table caps_root_table[] = {
571 .procname = "kernel",
573 .child = caps_kern_table,
578 static int __init capabilities_register_sysctl(void)
580 struct ctl_table_header *caps_table_header;
582 caps_table_header = register_sysctl_table(caps_root_table);
583 if (!caps_table_header) {
584 pr_err("Unable to register CAPABILITIES sysctl\n");
591 core_initcall(capabilities_register_sysctl);