2 * Copyright 2004-2009 Analog Devices Inc.
3 * 2008-2009 Cambridge Signal Processing
4 * 2005 National ICT Australia (NICTA)
5 * Aidan Williams <aidan@nicta.com.au>
7 * Licensed under the GPL-2 or later.
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/mtd/mtd.h>
13 #include <linux/mtd/partitions.h>
14 #include <linux/spi/spi.h>
15 #include <linux/spi/flash.h>
16 #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
17 #include <linux/usb/isp1362.h>
19 #include <linux/ata_platform.h>
20 #include <linux/irq.h>
21 #include <linux/interrupt.h>
22 #include <linux/usb/sl811.h>
24 #include <asm/bfin5xx_spi.h>
25 #include <asm/reboot.h>
26 #include <linux/spi/ad7877.h>
29 * Name the Board for the /proc/cpuinfo
31 char *bfin_board_name = "CamSig Minotaur BF537";
33 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
34 static struct resource bfin_pcmcia_cf_resources[] = {
36 .start = 0x20310000, /* IO PORT */
38 .flags = IORESOURCE_MEM,
40 .start = 0x20311000, /* Attribute Memory */
42 .flags = IORESOURCE_MEM,
46 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
48 .start = IRQ_PF6, /* Card Detect PF6 */
50 .flags = IORESOURCE_IRQ,
54 static struct platform_device bfin_pcmcia_cf_device = {
55 .name = "bfin_cf_pcmcia",
57 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
58 .resource = bfin_pcmcia_cf_resources,
62 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
63 static struct platform_device rtc_device = {
69 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
70 static struct platform_device bfin_mii_bus = {
71 .name = "bfin_mii_bus",
74 static struct platform_device bfin_mac_device = {
76 .dev.platform_data = &bfin_mii_bus,
80 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
81 static struct resource net2272_bfin_resources[] = {
84 .end = 0x20300000 + 0x100,
85 .flags = IORESOURCE_MEM,
89 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
93 static struct platform_device net2272_bfin_device = {
96 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
97 .resource = net2272_bfin_resources,
101 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
102 /* all SPI peripherals info goes here */
104 #if defined(CONFIG_MTD_M25P80) \
105 || defined(CONFIG_MTD_M25P80_MODULE)
107 /* Partition sizes */
108 #define FLASH_SIZE 0x00400000
109 #define PSIZE_UBOOT 0x00030000
110 #define PSIZE_INITRAMFS 0x00240000
112 static struct mtd_partition bfin_spi_flash_partitions[] = {
114 .name = "bootloader(spi)",
117 .mask_flags = MTD_CAP_ROM
119 .name = "initramfs(spi)",
120 .size = PSIZE_INITRAMFS,
121 .offset = PSIZE_UBOOT
124 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
125 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
129 static struct flash_platform_data bfin_spi_flash_data = {
131 .parts = bfin_spi_flash_partitions,
132 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
136 /* SPI flash chip (m25p64) */
137 static struct bfin5xx_spi_chip spi_flash_chip_info = {
138 .enable_dma = 0, /* use dma transfer with this chip*/
143 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
144 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
150 static struct spi_board_info bfin_spi_board_info[] __initdata = {
151 #if defined(CONFIG_MTD_M25P80) \
152 || defined(CONFIG_MTD_M25P80_MODULE)
154 /* the modalias must be the same as spi device driver name */
155 .modalias = "m25p80", /* Name of spi_driver for this device */
156 .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
157 .bus_num = 0, /* Framework bus number */
158 .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
159 .platform_data = &bfin_spi_flash_data,
160 .controller_data = &spi_flash_chip_info,
165 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
167 .modalias = "mmc_spi",
168 .max_speed_hz = 5000000, /* max spi clock (SCK) speed in HZ */
171 .controller_data = &mmc_spi_chip_info,
177 /* SPI controller data */
178 static struct bfin5xx_spi_master bfin_spi0_info = {
180 .enable_dma = 1, /* master has the ability to do dma transfer */
184 static struct resource bfin_spi0_resource[] = {
186 .start = SPI0_REGBASE,
187 .end = SPI0_REGBASE + 0xFF,
188 .flags = IORESOURCE_MEM,
193 .flags = IORESOURCE_DMA,
198 .flags = IORESOURCE_IRQ,
202 static struct platform_device bfin_spi0_device = {
204 .id = 0, /* Bus number */
205 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
206 .resource = bfin_spi0_resource,
208 .platform_data = &bfin_spi0_info, /* Passed to driver */
211 #endif /* spi master and devices */
213 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
214 #ifdef CONFIG_SERIAL_BFIN_UART0
215 static struct resource bfin_uart0_resources[] = {
219 .flags = IORESOURCE_MEM,
222 .start = IRQ_UART0_RX,
223 .end = IRQ_UART0_RX+1,
224 .flags = IORESOURCE_IRQ,
227 .start = IRQ_UART0_ERROR,
228 .end = IRQ_UART0_ERROR,
229 .flags = IORESOURCE_IRQ,
232 .start = CH_UART0_TX,
234 .flags = IORESOURCE_DMA,
237 .start = CH_UART0_RX,
239 .flags = IORESOURCE_DMA,
243 unsigned short bfin_uart0_peripherals[] = {
244 P_UART0_TX, P_UART0_RX, 0
247 static struct platform_device bfin_uart0_device = {
250 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
251 .resource = bfin_uart0_resources,
253 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
257 #ifdef CONFIG_SERIAL_BFIN_UART1
258 static struct resource bfin_uart1_resources[] = {
262 .flags = IORESOURCE_MEM,
265 .start = IRQ_UART1_RX,
266 .end = IRQ_UART1_RX+1,
267 .flags = IORESOURCE_IRQ,
270 .start = IRQ_UART1_ERROR,
271 .end = IRQ_UART1_ERROR,
272 .flags = IORESOURCE_IRQ,
275 .start = CH_UART1_TX,
277 .flags = IORESOURCE_DMA,
280 .start = CH_UART1_RX,
282 .flags = IORESOURCE_DMA,
286 unsigned short bfin_uart1_peripherals[] = {
287 P_UART1_TX, P_UART1_RX, 0
290 static struct platform_device bfin_uart1_device = {
293 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
294 .resource = bfin_uart1_resources,
296 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
302 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
303 #ifdef CONFIG_BFIN_SIR0
304 static struct resource bfin_sir0_resources[] = {
308 .flags = IORESOURCE_MEM,
311 .start = IRQ_UART0_RX,
312 .end = IRQ_UART0_RX+1,
313 .flags = IORESOURCE_IRQ,
316 .start = CH_UART0_RX,
317 .end = CH_UART0_RX+1,
318 .flags = IORESOURCE_DMA,
322 static struct platform_device bfin_sir0_device = {
325 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
326 .resource = bfin_sir0_resources,
329 #ifdef CONFIG_BFIN_SIR1
330 static struct resource bfin_sir1_resources[] = {
334 .flags = IORESOURCE_MEM,
337 .start = IRQ_UART1_RX,
338 .end = IRQ_UART1_RX+1,
339 .flags = IORESOURCE_IRQ,
342 .start = CH_UART1_RX,
343 .end = CH_UART1_RX+1,
344 .flags = IORESOURCE_DMA,
348 static struct platform_device bfin_sir1_device = {
351 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
352 .resource = bfin_sir1_resources,
357 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
358 static struct resource bfin_twi0_resource[] = {
360 .start = TWI0_REGBASE,
361 .end = TWI0_REGBASE + 0xFF,
362 .flags = IORESOURCE_MEM,
367 .flags = IORESOURCE_IRQ,
371 static struct platform_device i2c_bfin_twi_device = {
372 .name = "i2c-bfin-twi",
374 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
375 .resource = bfin_twi0_resource,
379 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
380 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
381 static struct resource bfin_sport0_uart_resources[] = {
383 .start = SPORT0_TCR1,
384 .end = SPORT0_MRCS3+4,
385 .flags = IORESOURCE_MEM,
388 .start = IRQ_SPORT0_RX,
389 .end = IRQ_SPORT0_RX+1,
390 .flags = IORESOURCE_IRQ,
393 .start = IRQ_SPORT0_ERROR,
394 .end = IRQ_SPORT0_ERROR,
395 .flags = IORESOURCE_IRQ,
399 unsigned short bfin_sport0_peripherals[] = {
400 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
401 P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0
404 static struct platform_device bfin_sport0_uart_device = {
405 .name = "bfin-sport-uart",
407 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
408 .resource = bfin_sport0_uart_resources,
410 .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
414 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
415 static struct resource bfin_sport1_uart_resources[] = {
417 .start = SPORT1_TCR1,
418 .end = SPORT1_MRCS3+4,
419 .flags = IORESOURCE_MEM,
422 .start = IRQ_SPORT1_RX,
423 .end = IRQ_SPORT1_RX+1,
424 .flags = IORESOURCE_IRQ,
427 .start = IRQ_SPORT1_ERROR,
428 .end = IRQ_SPORT1_ERROR,
429 .flags = IORESOURCE_IRQ,
433 unsigned short bfin_sport1_peripherals[] = {
434 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
435 P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0
438 static struct platform_device bfin_sport1_uart_device = {
439 .name = "bfin-sport-uart",
441 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
442 .resource = bfin_sport1_uart_resources,
444 .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
450 static struct platform_device *minotaur_devices[] __initdata = {
451 #if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
452 &bfin_pcmcia_cf_device,
455 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
459 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
464 #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
465 &net2272_bfin_device,
468 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
472 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
473 #ifdef CONFIG_SERIAL_BFIN_UART0
476 #ifdef CONFIG_SERIAL_BFIN_UART1
481 #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
482 #ifdef CONFIG_BFIN_SIR0
485 #ifdef CONFIG_BFIN_SIR1
490 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
491 &i2c_bfin_twi_device,
494 #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
495 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
496 &bfin_sport0_uart_device,
498 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
499 &bfin_sport1_uart_device,
505 static int __init minotaur_init(void)
507 printk(KERN_INFO "%s(): registering device resources\n", __func__);
508 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
509 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
510 spi_register_board_info(bfin_spi_board_info,
511 ARRAY_SIZE(bfin_spi_board_info));
517 arch_initcall(minotaur_init);
519 static struct platform_device *minotaur_early_devices[] __initdata = {
520 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
521 #ifdef CONFIG_SERIAL_BFIN_UART0
524 #ifdef CONFIG_SERIAL_BFIN_UART1
529 #if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
530 #ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
531 &bfin_sport0_uart_device,
533 #ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
534 &bfin_sport1_uart_device,
539 void __init native_machine_early_platform_add_devices(void)
541 printk(KERN_INFO "register early platform devices\n");
542 early_platform_add_devices(minotaur_early_devices,
543 ARRAY_SIZE(minotaur_early_devices));
546 void native_machine_restart(char *cmd)
548 /* workaround reboot hang when booting from SPI */
549 if ((bfin_read_SYSCR() & 0x7) == 0x3)
550 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);