2 * arch/arm/plat-mxc/iomux-v1.c
4 * Copyright (C) 2004 Sascha Hauer, Synertronixx GmbH
5 * Copyright (C) 2009 Uwe Kleine-Koenig, Pengutronix
7 * Common code for i.MX1, i.MX21 and i.MX27
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
24 #include <linux/errno.h>
25 #include <linux/init.h>
26 #include <linux/kernel.h>
27 #include <linux/module.h>
28 #include <linux/string.h>
29 #include <linux/gpio.h>
31 #include <mach/hardware.h>
32 #include <asm/mach/map.h>
33 #include <mach/iomux.h>
35 static void __iomem *imx_iomuxv1_baseaddr;
37 static inline unsigned long imx_iomuxv1_readl(unsigned offset)
39 return __raw_readl(imx_iomuxv1_baseaddr + offset);
42 static inline void imx_iomuxv1_writel(unsigned long val, unsigned offset)
44 __raw_writel(val, imx_iomuxv1_baseaddr + offset);
47 static inline void imx_iomuxv1_rmwl(unsigned offset,
48 unsigned long mask, unsigned long value)
50 unsigned long reg = imx_iomuxv1_readl(offset);
55 imx_iomuxv1_writel(reg, offset);
58 static inline void imx_iomuxv1_set_puen(
59 unsigned int port, unsigned int pin, int on)
61 unsigned long mask = 1 << pin;
63 imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0);
66 static inline void imx_iomuxv1_set_ddir(
67 unsigned int port, unsigned int pin, int out)
69 unsigned long mask = 1 << pin;
71 imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0);
74 static inline void imx_iomuxv1_set_gpr(
75 unsigned int port, unsigned int pin, int af)
77 unsigned long mask = 1 << pin;
79 imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0);
82 static inline void imx_iomuxv1_set_gius(
83 unsigned int port, unsigned int pin, int inuse)
85 unsigned long mask = 1 << pin;
87 imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0);
90 static inline void imx_iomuxv1_set_ocr(
91 unsigned int port, unsigned int pin, unsigned int ocr)
93 unsigned long shift = (pin & 0xf) << 1;
94 unsigned long mask = 3 << shift;
95 unsigned long value = ocr << shift;
96 unsigned long offset = pin < 16 ? MXC_OCR1(port) : MXC_OCR2(port);
98 imx_iomuxv1_rmwl(offset, mask, value);
101 static inline void imx_iomuxv1_set_iconfa(
102 unsigned int port, unsigned int pin, unsigned int aout)
104 unsigned long shift = (pin & 0xf) << 1;
105 unsigned long mask = 3 << shift;
106 unsigned long value = aout << shift;
107 unsigned long offset = pin < 16 ? MXC_ICONFA1(port) : MXC_ICONFA2(port);
109 imx_iomuxv1_rmwl(offset, mask, value);
112 static inline void imx_iomuxv1_set_iconfb(
113 unsigned int port, unsigned int pin, unsigned int bout)
115 unsigned long shift = (pin & 0xf) << 1;
116 unsigned long mask = 3 << shift;
117 unsigned long value = bout << shift;
118 unsigned long offset = pin < 16 ? MXC_ICONFB1(port) : MXC_ICONFB2(port);
120 imx_iomuxv1_rmwl(offset, mask, value);
123 void mxc_gpio_mode(int gpio_mode)
125 unsigned int pin = gpio_mode & GPIO_PIN_MASK;
126 unsigned int port = (gpio_mode & GPIO_PORT_MASK) >> GPIO_PORT_SHIFT;
127 unsigned int ocr = (gpio_mode & GPIO_OCR_MASK) >> GPIO_OCR_SHIFT;
128 unsigned int aout = (gpio_mode >> GPIO_AOUT_SHIFT) & 3;
129 unsigned int bout = (gpio_mode >> GPIO_BOUT_SHIFT) & 3;
132 imx_iomuxv1_set_puen(port, pin, gpio_mode & GPIO_PUEN);
135 imx_iomuxv1_set_ddir(port, pin, gpio_mode & GPIO_OUT);
137 /* Primary / alternate function */
138 imx_iomuxv1_set_gpr(port, pin, gpio_mode & GPIO_AF);
141 imx_iomuxv1_set_gius(port, pin, !(gpio_mode & (GPIO_PF | GPIO_AF)));
143 imx_iomuxv1_set_ocr(port, pin, ocr);
145 imx_iomuxv1_set_iconfa(port, pin, aout);
147 imx_iomuxv1_set_iconfb(port, pin, bout);
149 EXPORT_SYMBOL(mxc_gpio_mode);
151 int mxc_gpio_setup_multiple_pins(const int *pin_list, unsigned count,
154 const int *p = pin_list;
160 for (i = 0; i < count; i++) {
161 gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
162 mode = *p & ~(GPIO_PIN_MASK | GPIO_PORT_MASK);
164 if (gpio >= (GPIO_PORT_MAX + 1) * 32)
167 ret = gpio_request(gpio, label);
171 mxc_gpio_mode(gpio | mode);
178 mxc_gpio_release_multiple_pins(pin_list, i);
181 EXPORT_SYMBOL(mxc_gpio_setup_multiple_pins);
183 void mxc_gpio_release_multiple_pins(const int *pin_list, int count)
185 const int *p = pin_list;
188 for (i = 0; i < count; i++) {
189 unsigned gpio = *p & (GPIO_PIN_MASK | GPIO_PORT_MASK);
194 EXPORT_SYMBOL(mxc_gpio_release_multiple_pins);
196 static int imx_iomuxv1_init(void)
198 #ifdef CONFIG_ARCH_MX1
200 imx_iomuxv1_baseaddr = MX1_IO_ADDRESS(MX1_GPIO_BASE_ADDR);
203 #ifdef CONFIG_MACH_MX21
205 imx_iomuxv1_baseaddr = MX21_IO_ADDRESS(MX21_GPIO_BASE_ADDR);
208 #ifdef CONFIG_MACH_MX27
210 imx_iomuxv1_baseaddr = MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR);
217 pure_initcall(imx_iomuxv1_init);