cbaf665d0c218ab0997067c00681c0984da93fdf
[pandora-u-boot.git] / arch / arm / mach-stm32mp / spl.c
1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
2 /*
3  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
4  */
5
6 #include <common.h>
7 #include <cpu_func.h>
8 #include <dm.h>
9 #include <hang.h>
10 #include <spl.h>
11 #include <asm/cache.h>
12 #include <asm/io.h>
13 #include <asm/arch/sys_proto.h>
14 #include <linux/libfdt.h>
15
16 u32 spl_boot_device(void)
17 {
18         u32 boot_mode;
19
20         boot_mode = get_bootmode();
21
22         switch (boot_mode) {
23         case BOOT_FLASH_SD_1:
24         case BOOT_FLASH_EMMC_1:
25                 return BOOT_DEVICE_MMC1;
26         case BOOT_FLASH_SD_2:
27         case BOOT_FLASH_EMMC_2:
28                 return BOOT_DEVICE_MMC2;
29         case BOOT_SERIAL_UART_1:
30         case BOOT_SERIAL_UART_2:
31         case BOOT_SERIAL_UART_3:
32         case BOOT_SERIAL_UART_4:
33         case BOOT_SERIAL_UART_5:
34         case BOOT_SERIAL_UART_6:
35         case BOOT_SERIAL_UART_7:
36         case BOOT_SERIAL_UART_8:
37                 return BOOT_DEVICE_UART;
38         case BOOT_SERIAL_USB_OTG:
39                 return BOOT_DEVICE_USB;
40         case BOOT_FLASH_NAND_FMC:
41                 return BOOT_DEVICE_NAND;
42         case BOOT_FLASH_NOR_QSPI:
43                 return BOOT_DEVICE_SPI;
44         case BOOT_FLASH_SPINAND_1:
45                 return BOOT_DEVICE_NONE; /* SPINAND not supported in SPL */
46         }
47
48         return BOOT_DEVICE_MMC1;
49 }
50
51 u32 spl_mmc_boot_mode(const u32 boot_device)
52 {
53         return MMCSD_MODE_RAW;
54 }
55
56 int spl_mmc_boot_partition(const u32 boot_device)
57 {
58         switch (boot_device) {
59         case BOOT_DEVICE_MMC1:
60                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION;
61         case BOOT_DEVICE_MMC2:
62                 return CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION_MMC2;
63         default:
64                 return -EINVAL;
65         }
66 }
67
68 #ifdef CONFIG_SPL_DISPLAY_PRINT
69 void spl_display_print(void)
70 {
71         DECLARE_GLOBAL_DATA_PTR;
72         const char *model;
73
74         /* same code than show_board_info() but not compiled for SPL
75          * see CONFIG_DISPLAY_BOARDINFO & common/board_info.c
76          */
77         model = fdt_getprop(gd->fdt_blob, 0, "model", NULL);
78         if (model)
79                 printf("Model: %s\n", model);
80 }
81 #endif
82
83 __weak int board_early_init_f(void)
84 {
85         return 0;
86 }
87
88 void board_init_f(ulong dummy)
89 {
90         struct udevice *dev;
91         int ret;
92
93         arch_cpu_init();
94
95         ret = spl_early_init();
96         if (ret) {
97                 debug("spl_early_init() failed: %d\n", ret);
98                 hang();
99         }
100
101         ret = uclass_get_device(UCLASS_CLK, 0, &dev);
102         if (ret) {
103                 debug("Clock init failed: %d\n", ret);
104                 hang();
105         }
106
107         ret = uclass_get_device(UCLASS_RESET, 0, &dev);
108         if (ret) {
109                 debug("Reset init failed: %d\n", ret);
110                 hang();
111         }
112
113         ret = uclass_get_device(UCLASS_PINCTRL, 0, &dev);
114         if (ret) {
115                 debug("%s: Cannot find pinctrl device\n", __func__);
116                 hang();
117         }
118
119         /* enable console uart printing */
120         preloader_console_init();
121
122         ret = board_early_init_f();
123         if (ret) {
124                 debug("board_early_init_f() failed: %d\n", ret);
125                 hang();
126         }
127
128         ret = uclass_get_device(UCLASS_RAM, 0, &dev);
129         if (ret) {
130                 printf("DRAM init failed: %d\n", ret);
131                 hang();
132         }
133
134         /*
135          * activate cache on DDR only when DDR is fully initialized
136          * to avoid speculative access and issue in get_ram_size()
137          */
138         if (!CONFIG_IS_ENABLED(SYS_DCACHE_OFF))
139                 mmu_set_region_dcache_behaviour(STM32_DDR_BASE, STM32_DDR_SIZE,
140                                                 DCACHE_DEFAULT_OPTION);
141 }
142
143 void spl_board_prepare_for_boot(void)
144 {
145         dcache_disable();
146 }
147
148 void spl_board_prepare_for_boot_linux(void)
149 {
150         dcache_disable();
151 }