1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Altera Corporation <www.altera.com>
9 #include <asm/arch/freeze_controller.h>
10 #include <asm/arch/scan_manager.h>
11 #include <asm/arch/system_manager.h>
14 * Maximum polling loop to wait for IO scan chain engine becomes idle
15 * to prevent infinite loop. It is important that this is NOT changed
16 * to delay using timer functions, since at the time this function is
17 * called, timer might not yet be inited.
19 #define SCANMGR_MAX_DELAY 100
22 * Maximum length of TDI_TDO packet payload is 128 bits,
23 * represented by (length - 1) in TDI_TDO header.
25 #define TDI_TDO_MAX_PAYLOAD 127
27 #define SCANMGR_STAT_ACTIVE (1 << 31)
28 #define SCANMGR_STAT_WFIFOCNT_MASK 0x70000000
30 static const struct socfpga_scan_manager *scan_manager_base =
31 (void *)(SOCFPGA_SCANMGR_ADDRESS);
32 static const struct socfpga_freeze_controller *freeze_controller_base =
33 (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
36 * scan_chain_engine_is_idle() - Check if the JTAG scan chain is idle
37 * @max_iter: Maximum number of iterations to wait for idle
39 * Function to check IO scan chain engine status and wait if the engine is
40 * is active. Poll the IO scan chain engine till maximum iteration reached.
42 static u32 scan_chain_engine_is_idle(u32 max_iter)
44 const u32 mask = SCANMGR_STAT_ACTIVE | SCANMGR_STAT_WFIFOCNT_MASK;
47 /* Poll the engine until the scan engine is inactive. */
49 status = readl(&scan_manager_base->stat);
57 #define JTAG_BP_INSN (1 << 0)
58 #define JTAG_BP_TMS (1 << 1)
59 #define JTAG_BP_PAYLOAD (1 << 2)
60 #define JTAG_BP_2BYTE (1 << 3)
61 #define JTAG_BP_4BYTE (1 << 4)
64 * scan_mgr_jtag_io() - Access the JTAG chain
65 * @flags: Control flags, used to configure the action on the JTAG
66 * @iarg: Instruction argument
67 * @parg: Payload argument or data
69 * Perform I/O on the JTAG chain
71 static void scan_mgr_jtag_io(const u32 flags, const u8 iarg, const u32 parg)
75 if (flags & JTAG_BP_INSN) { /* JTAG instruction */
77 * The SCC JTAG register is LSB first, so make
78 * space for the instruction at the LSB.
81 if (flags & JTAG_BP_TMS) {
82 data |= (0 << 7); /* TMS instruction. */
83 data |= iarg & 0x3f; /* TMS arg is 6 bits. */
84 if (flags & JTAG_BP_PAYLOAD)
87 data |= (1 << 7); /* TDI/TDO instruction. */
88 data |= iarg & 0xf; /* TDI/TDO arg is 4 bits. */
89 if (flags & JTAG_BP_PAYLOAD)
94 if (flags & JTAG_BP_4BYTE)
95 writel(data, &scan_manager_base->fifo_quad_byte);
96 else if (flags & JTAG_BP_2BYTE)
97 writel(data & 0xffff, &scan_manager_base->fifo_double_byte);
99 writel(data & 0xff, &scan_manager_base->fifo_single_byte);
103 * scan_mgr_jtag_insn_data() - Send JTAG instruction and data
104 * @iarg: Instruction argument
105 * @data: Associated data
106 * @dlen: Length of data in bits
108 * This function is used when programming the IO chains to submit the
109 * instruction followed by variable length payload.
112 scan_mgr_jtag_insn_data(const u8 iarg, const unsigned long *data,
113 const unsigned int dlen)
117 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_2BYTE, iarg, dlen - 1);
119 /* 32 bits or more remain */
120 for (i = 0; i < dlen / 32; i++)
121 scan_mgr_jtag_io(JTAG_BP_4BYTE, 0x0, data[i]);
123 if ((dlen % 32) > 24) { /* 31...24 bits remain */
124 scan_mgr_jtag_io(JTAG_BP_4BYTE, 0x0, data[i]);
125 } else if (dlen % 32) { /* 24...1 bit remain */
126 for (j = 0; j < dlen % 32; j += 8)
127 scan_mgr_jtag_io(0, 0x0, data[i] >> j);
130 return scan_chain_engine_is_idle(SCANMGR_MAX_DELAY);
134 * scan_mgr_io_scan_chain_prg() - Program HPS IO Scan Chain
135 * @io_scan_chain_id: IO scan chain ID
137 static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id)
139 u32 io_scan_chain_len_in_bits;
140 const unsigned long *iocsr_scan_chain;
141 unsigned int rem, idx = 0;
144 ret = iocsr_get_config_table(io_scan_chain_id, &iocsr_scan_chain,
145 &io_scan_chain_len_in_bits);
150 * De-assert reinit if the IO scan chain is intended for HIO. In
151 * this, its the chain 3.
153 if (io_scan_chain_id == 3)
154 clrbits_le32(&freeze_controller_base->hioctrl,
155 SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
158 * Check if the scan chain engine is inactive and the
159 * WFIFO is empty before enabling the IO scan chain
161 ret = scan_chain_engine_is_idle(SCANMGR_MAX_DELAY);
166 * Enable IO Scan chain based on scan chain id
167 * Note: only one chain can be enabled at a time
169 setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
171 /* Program IO scan chain. */
172 while (io_scan_chain_len_in_bits) {
173 if (io_scan_chain_len_in_bits > 128)
176 rem = io_scan_chain_len_in_bits;
178 ret = scan_mgr_jtag_insn_data(0x0, &iocsr_scan_chain[idx], rem);
181 io_scan_chain_len_in_bits -= rem;
185 /* Disable IO Scan chain when configuration done*/
186 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
190 /* Disable IO Scan chain when error detected */
191 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
195 int scan_mgr_configure_iocsr(void)
199 /* configure the IOCSR through scan chain */
200 status |= scan_mgr_io_scan_chain_prg(0);
201 status |= scan_mgr_io_scan_chain_prg(1);
202 status |= scan_mgr_io_scan_chain_prg(2);
203 status |= scan_mgr_io_scan_chain_prg(3);
208 * scan_mgr_get_fpga_id() - Obtain FPGA JTAG ID
210 * This function obtains JTAG ID from the FPGA TAP controller.
212 u32 scan_mgr_get_fpga_id(void)
214 const unsigned long data = 0;
218 /* Enable HPS to talk to JTAG in the FPGA through the System Manager */
219 writel(0x1, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL);
222 writel(0x80, &scan_manager_base->en);
223 /* write to CSW to make s2f_ntrst reset */
224 writel(0x02, &scan_manager_base->stat);
229 /* write 0x00 to CSW to clear the s2f_ntrst */
230 writel(0, &scan_manager_base->stat);
233 * Go to Test-Logic-Reset state.
234 * This sets TAP controller into IDCODE mode.
236 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_TMS, 0x1f | (1 << 5), 0x0);
238 /* Go to Run-Test/Idle -> DR-Scan -> Capture-DR -> Shift-DR state. */
239 scan_mgr_jtag_io(JTAG_BP_INSN | JTAG_BP_TMS, 0x02 | (1 << 4), 0x0);
242 * Push 4 bytes of data through TDI->DR->TDO.
244 * Length of TDI data is 32bits (length - 1) and they are only
245 * zeroes as we care only for TDO data.
247 ret = scan_mgr_jtag_insn_data(0x4, &data, 32);
248 /* Read 32 bit from captured JTAG data. */
250 id = readl(&scan_manager_base->fifo_quad_byte);
252 /* Disable all port */
253 writel(0, &scan_manager_base->en);
254 writel(0, socfpga_get_sysmgr_addr() + SYSMGR_GEN5_SCANMGRGRP_CTRL);