e52466fb6fbd777da6dfbab88b574a8d594ef599
[pandora-u-boot.git] / arch / arm / mach-rockchip / rk3188 / rk3188.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2019 Rockchip Electronics Co., Ltd
4  */
5 #include <common.h>
6 #include <dm.h>
7 #include <hang.h>
8 #include <syscon.h>
9 #include <asm/io.h>
10 #include <asm/arch-rockchip/bootrom.h>
11 #include <asm/arch-rockchip/clock.h>
12 #include <asm/arch-rockchip/grf_rk3188.h>
13 #include <asm/arch-rockchip/hardware.h>
14 #include <linux/err.h>
15
16 #define GRF_BASE        0x20008000
17
18 const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1] = {
19         [BROM_BOOTSOURCE_EMMC] = "/dwmmc@1021c000",
20         [BROM_BOOTSOURCE_SD] = "/dwmmc@10214000",
21 };
22
23 #ifdef CONFIG_DEBUG_UART_BOARD_INIT
24 void board_debug_uart_init(void)
25 {
26         /* Enable early UART on the RK3188 */
27         struct rk3188_grf * const grf = (void *)GRF_BASE;
28         enum {
29                 GPIO1B1_SHIFT           = 2,
30                 GPIO1B1_MASK            = 3,
31                 GPIO1B1_GPIO            = 0,
32                 GPIO1B1_UART2_SOUT,
33                 GPIO1B1_JTAG_TDO,
34
35                 GPIO1B0_SHIFT           = 0,
36                 GPIO1B0_MASK            = 3,
37                 GPIO1B0_GPIO            = 0,
38                 GPIO1B0_UART2_SIN,
39                 GPIO1B0_JTAG_TDI,
40         };
41
42         rk_clrsetreg(&grf->gpio1b_iomux,
43                      GPIO1B1_MASK << GPIO1B1_SHIFT |
44                      GPIO1B0_MASK << GPIO1B0_SHIFT,
45                      GPIO1B1_UART2_SOUT << GPIO1B1_SHIFT |
46                      GPIO1B0_UART2_SIN << GPIO1B0_SHIFT);
47 }
48 #endif
49
50 #ifdef CONFIG_SPL_BUILD
51 int arch_cpu_init(void)
52 {
53         struct rk3188_grf *grf;
54
55         grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
56         if (IS_ERR(grf)) {
57                 pr_err("grf syscon returned %ld\n", PTR_ERR(grf));
58                 return 0;
59         }
60 #ifdef CONFIG_ROCKCHIP_USB_UART
61         rk_clrsetreg(&grf->uoc0_con[0],
62                      SIDDQ_MASK | UOC_DISABLE_MASK | COMMON_ON_N_MASK,
63                      1 << SIDDQ_SHIFT | 1 << UOC_DISABLE_SHIFT |
64                      1 << COMMON_ON_N_SHIFT);
65         rk_clrsetreg(&grf->uoc0_con[2],
66                      SOFT_CON_SEL_MASK, 1 << SOFT_CON_SEL_SHIFT);
67         rk_clrsetreg(&grf->uoc0_con[3],
68                      OPMODE_MASK | XCVRSELECT_MASK |
69                      TERMSEL_FULLSPEED_MASK | SUSPENDN_MASK,
70                      OPMODE_NODRIVING << OPMODE_SHIFT |
71                      XCVRSELECT_FSTRANSC << XCVRSELECT_SHIFT |
72                      1 << TERMSEL_FULLSPEED_SHIFT |
73                      1 << SUSPENDN_SHIFT);
74         rk_clrsetreg(&grf->uoc0_con[0],
75                      BYPASSSEL_MASK | BYPASSDMEN_MASK,
76                      1 << BYPASSSEL_SHIFT | 1 << BYPASSDMEN_SHIFT);
77 #endif
78
79         /* enable noc remap to mimic legacy loaders */
80         rk_clrsetreg(&grf->soc_con0,
81                      NOC_REMAP_MASK << NOC_REMAP_SHIFT,
82                      NOC_REMAP_MASK << NOC_REMAP_SHIFT);
83
84         return 0;
85 }
86 #endif
87
88 #ifdef CONFIG_SPL_BUILD
89 static int setup_led(void)
90 {
91 #ifdef CONFIG_SPL_LED
92         struct udevice *dev;
93         char *led_name;
94         int ret;
95
96         led_name = fdtdec_get_config_string(gd->fdt_blob, "u-boot,boot-led");
97         if (!led_name)
98                 return 0;
99         ret = led_get_by_label(led_name, &dev);
100         if (ret) {
101                 debug("%s: get=%d\n", __func__, ret);
102                 return ret;
103         }
104         ret = led_set_on(dev, 1);
105         if (ret)
106                 return ret;
107 #endif
108
109         return 0;
110 }
111
112 void spl_board_init(void)
113 {
114         int ret;
115
116         ret = setup_led();
117         if (ret) {
118                 debug("LED ret=%d\n", ret);
119                 hang();
120         }
121 }
122 #endif