18d47cfa2a188884fa48dd9886409d905c389fde
[pandora-kernel.git] / arch / arm / mach-pxa / mainstone.c
1 /*
2  *  linux/arch/arm/mach-pxa/mainstone.c
3  *
4  *  Support for the Intel HCDDBBVA0 Development Platform.
5  *  (go figure how they came up with such name...)
6  *
7  *  Author:     Nicolas Pitre
8  *  Created:    Nov 05, 2002
9  *  Copyright:  MontaVista Software Inc.
10  *
11  *  This program is free software; you can redistribute it and/or modify
12  *  it under the terms of the GNU General Public License version 2 as
13  *  published by the Free Software Foundation.
14  */
15
16 #include <linux/init.h>
17 #include <linux/platform_device.h>
18 #include <linux/sysdev.h>
19 #include <linux/interrupt.h>
20 #include <linux/sched.h>
21 #include <linux/bitops.h>
22 #include <linux/fb.h>
23 #include <linux/ioport.h>
24 #include <linux/mtd/mtd.h>
25 #include <linux/mtd/partitions.h>
26 #include <linux/backlight.h>
27 #include <linux/input.h>
28 #include <linux/gpio_keys.h>
29
30 #include <asm/types.h>
31 #include <asm/setup.h>
32 #include <asm/memory.h>
33 #include <asm/mach-types.h>
34 #include <asm/hardware.h>
35 #include <asm/irq.h>
36 #include <asm/sizes.h>
37
38 #include <asm/mach/arch.h>
39 #include <asm/mach/map.h>
40 #include <asm/mach/irq.h>
41 #include <asm/mach/flash.h>
42
43 #include <asm/arch/pxa-regs.h>
44 #include <asm/arch/pxa2xx-regs.h>
45 #include <asm/arch/mfp-pxa27x.h>
46 #include <asm/arch/mainstone.h>
47 #include <asm/arch/audio.h>
48 #include <asm/arch/pxafb.h>
49 #include <asm/arch/i2c.h>
50 #include <asm/arch/mmc.h>
51 #include <asm/arch/irda.h>
52 #include <asm/arch/ohci.h>
53 #include <asm/arch/pxa27x_keypad.h>
54
55 #include "generic.h"
56 #include "devices.h"
57
58 static unsigned long mainstone_pin_config[] = {
59         /* Chip Select */
60         GPIO15_nCS_1,
61
62         /* LCD - 16bpp Active TFT */
63         GPIO58_LCD_LDD_0,
64         GPIO59_LCD_LDD_1,
65         GPIO60_LCD_LDD_2,
66         GPIO61_LCD_LDD_3,
67         GPIO62_LCD_LDD_4,
68         GPIO63_LCD_LDD_5,
69         GPIO64_LCD_LDD_6,
70         GPIO65_LCD_LDD_7,
71         GPIO66_LCD_LDD_8,
72         GPIO67_LCD_LDD_9,
73         GPIO68_LCD_LDD_10,
74         GPIO69_LCD_LDD_11,
75         GPIO70_LCD_LDD_12,
76         GPIO71_LCD_LDD_13,
77         GPIO72_LCD_LDD_14,
78         GPIO73_LCD_LDD_15,
79         GPIO74_LCD_FCLK,
80         GPIO75_LCD_LCLK,
81         GPIO76_LCD_PCLK,
82         GPIO77_LCD_BIAS,
83         GPIO16_PWM0_OUT,        /* Backlight */
84
85         /* MMC */
86         GPIO32_MMC_CLK,
87         GPIO112_MMC_CMD,
88         GPIO92_MMC_DAT_0,
89         GPIO109_MMC_DAT_1,
90         GPIO110_MMC_DAT_2,
91         GPIO111_MMC_DAT_3,
92
93         /* USB Host Port 1 */
94         GPIO88_USBH1_PWR,
95         GPIO89_USBH1_PEN,
96
97         /* PC Card */
98         GPIO48_nPOE,
99         GPIO49_nPWE,
100         GPIO50_nPIOR,
101         GPIO51_nPIOW,
102         GPIO85_nPCE_1,
103         GPIO54_nPCE_2,
104         GPIO79_PSKTSEL,
105         GPIO55_nPREG,
106         GPIO56_nPWAIT,
107         GPIO57_nIOIS16,
108
109         /* AC97 */
110         GPIO45_AC97_SYSCLK,
111
112         /* Keypad */
113         GPIO93_KP_DKIN_0        | WAKEUP_ON_LEVEL_HIGH,
114         GPIO94_KP_DKIN_1        | WAKEUP_ON_LEVEL_HIGH,
115         GPIO95_KP_DKIN_2        | WAKEUP_ON_LEVEL_HIGH,
116         GPIO100_KP_MKIN_0       | WAKEUP_ON_LEVEL_HIGH,
117         GPIO101_KP_MKIN_1       | WAKEUP_ON_LEVEL_HIGH,
118         GPIO102_KP_MKIN_2       | WAKEUP_ON_LEVEL_HIGH,
119         GPIO97_KP_MKIN_3        | WAKEUP_ON_LEVEL_HIGH,
120         GPIO98_KP_MKIN_4        | WAKEUP_ON_LEVEL_HIGH,
121         GPIO99_KP_MKIN_5        | WAKEUP_ON_LEVEL_HIGH,
122         GPIO103_KP_MKOUT_0,
123         GPIO104_KP_MKOUT_1,
124         GPIO105_KP_MKOUT_2,
125         GPIO106_KP_MKOUT_3,
126         GPIO107_KP_MKOUT_4,
127         GPIO108_KP_MKOUT_5,
128         GPIO96_KP_MKOUT_6,
129
130         /* GPIO */
131         GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
132 };
133
134 static unsigned long mainstone_irq_enabled;
135
136 static void mainstone_mask_irq(unsigned int irq)
137 {
138         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
139         MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
140 }
141
142 static void mainstone_unmask_irq(unsigned int irq)
143 {
144         int mainstone_irq = (irq - MAINSTONE_IRQ(0));
145         /* the irq can be acknowledged only if deasserted, so it's done here */
146         MST_INTSETCLR &= ~(1 << mainstone_irq);
147         MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
148 }
149
150 static struct irq_chip mainstone_irq_chip = {
151         .name           = "FPGA",
152         .ack            = mainstone_mask_irq,
153         .mask           = mainstone_mask_irq,
154         .unmask         = mainstone_unmask_irq,
155 };
156
157 static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
158 {
159         unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
160         do {
161                 GEDR(0) = GPIO_bit(0);  /* clear useless edge notification */
162                 if (likely(pending)) {
163                         irq = MAINSTONE_IRQ(0) + __ffs(pending);
164                         desc = irq_desc + irq;
165                         desc_handle_irq(irq, desc);
166                 }
167                 pending = MST_INTSETCLR & mainstone_irq_enabled;
168         } while (pending);
169 }
170
171 static void __init mainstone_init_irq(void)
172 {
173         int irq;
174
175         pxa27x_init_irq();
176
177         /* setup extra Mainstone irqs */
178         for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
179                 set_irq_chip(irq, &mainstone_irq_chip);
180                 set_irq_handler(irq, handle_level_irq);
181                 if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
182                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
183                 else
184                         set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
185         }
186         set_irq_flags(MAINSTONE_IRQ(8), 0);
187         set_irq_flags(MAINSTONE_IRQ(12), 0);
188
189         MST_INTMSKENA = 0;
190         MST_INTSETCLR = 0;
191
192         set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
193         set_irq_type(IRQ_GPIO(0), IRQT_FALLING);
194 }
195
196 #ifdef CONFIG_PM
197
198 static int mainstone_irq_resume(struct sys_device *dev)
199 {
200         MST_INTMSKENA = mainstone_irq_enabled;
201         return 0;
202 }
203
204 static struct sysdev_class mainstone_irq_sysclass = {
205         .name = "cpld_irq",
206         .resume = mainstone_irq_resume,
207 };
208
209 static struct sys_device mainstone_irq_device = {
210         .cls = &mainstone_irq_sysclass,
211 };
212
213 static int __init mainstone_irq_device_init(void)
214 {
215         int ret = -ENODEV;
216
217         if (machine_is_mainstone()) {
218                 ret = sysdev_class_register(&mainstone_irq_sysclass);
219                 if (ret == 0)
220                         ret = sysdev_register(&mainstone_irq_device);
221         }
222         return ret;
223 }
224
225 device_initcall(mainstone_irq_device_init);
226
227 #endif
228
229
230 static struct resource smc91x_resources[] = {
231         [0] = {
232                 .start  = (MST_ETH_PHYS + 0x300),
233                 .end    = (MST_ETH_PHYS + 0xfffff),
234                 .flags  = IORESOURCE_MEM,
235         },
236         [1] = {
237                 .start  = MAINSTONE_IRQ(3),
238                 .end    = MAINSTONE_IRQ(3),
239                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
240         }
241 };
242
243 static struct platform_device smc91x_device = {
244         .name           = "smc91x",
245         .id             = 0,
246         .num_resources  = ARRAY_SIZE(smc91x_resources),
247         .resource       = smc91x_resources,
248 };
249
250 static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
251 {
252         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
253                 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
254         return 0;
255 }
256
257 static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
258 {
259         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
260                 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
261 }
262
263 static long mst_audio_suspend_mask;
264
265 static void mst_audio_suspend(void *priv)
266 {
267         mst_audio_suspend_mask = MST_MSCWR2;
268         MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
269 }
270
271 static void mst_audio_resume(void *priv)
272 {
273         MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
274 }
275
276 static pxa2xx_audio_ops_t mst_audio_ops = {
277         .startup        = mst_audio_startup,
278         .shutdown       = mst_audio_shutdown,
279         .suspend        = mst_audio_suspend,
280         .resume         = mst_audio_resume,
281 };
282
283 static struct platform_device mst_audio_device = {
284         .name           = "pxa2xx-ac97",
285         .id             = -1,
286         .dev            = { .platform_data = &mst_audio_ops },
287 };
288
289 static struct resource flash_resources[] = {
290         [0] = {
291                 .start  = PXA_CS0_PHYS,
292                 .end    = PXA_CS0_PHYS + SZ_64M - 1,
293                 .flags  = IORESOURCE_MEM,
294         },
295         [1] = {
296                 .start  = PXA_CS1_PHYS,
297                 .end    = PXA_CS1_PHYS + SZ_64M - 1,
298                 .flags  = IORESOURCE_MEM,
299         },
300 };
301
302 static struct mtd_partition mainstoneflash0_partitions[] = {
303         {
304                 .name =         "Bootloader",
305                 .size =         0x00040000,
306                 .offset =       0,
307                 .mask_flags =   MTD_WRITEABLE  /* force read-only */
308         },{
309                 .name =         "Kernel",
310                 .size =         0x00400000,
311                 .offset =       0x00040000,
312         },{
313                 .name =         "Filesystem",
314                 .size =         MTDPART_SIZ_FULL,
315                 .offset =       0x00440000
316         }
317 };
318
319 static struct flash_platform_data mst_flash_data[2] = {
320         {
321                 .map_name       = "cfi_probe",
322                 .parts          = mainstoneflash0_partitions,
323                 .nr_parts       = ARRAY_SIZE(mainstoneflash0_partitions),
324         }, {
325                 .map_name       = "cfi_probe",
326                 .parts          = NULL,
327                 .nr_parts       = 0,
328         }
329 };
330
331 static struct platform_device mst_flash_device[2] = {
332         {
333                 .name           = "pxa2xx-flash",
334                 .id             = 0,
335                 .dev = {
336                         .platform_data = &mst_flash_data[0],
337                 },
338                 .resource = &flash_resources[0],
339                 .num_resources = 1,
340         },
341         {
342                 .name           = "pxa2xx-flash",
343                 .id             = 1,
344                 .dev = {
345                         .platform_data = &mst_flash_data[1],
346                 },
347                 .resource = &flash_resources[1],
348                 .num_resources = 1,
349         },
350 };
351
352 #ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
353 static int mainstone_backlight_update_status(struct backlight_device *bl)
354 {
355         int brightness = bl->props.brightness;
356
357         if (bl->props.power != FB_BLANK_UNBLANK ||
358             bl->props.fb_blank != FB_BLANK_UNBLANK)
359                 brightness = 0;
360
361         if (brightness != 0)
362                 pxa_set_cken(CKEN_PWM0, 1);
363
364         PWM_CTRL0 = 0;
365         PWM_PWDUTY0 = brightness;
366         PWM_PERVAL0 = bl->props.max_brightness;
367
368         if (brightness == 0)
369                 pxa_set_cken(CKEN_PWM0, 0);
370         return 0; /* pointless return value */
371 }
372
373 static int mainstone_backlight_get_brightness(struct backlight_device *bl)
374 {
375         return PWM_PWDUTY0;
376 }
377
378 static /*const*/ struct backlight_ops mainstone_backlight_ops = {
379         .update_status  = mainstone_backlight_update_status,
380         .get_brightness = mainstone_backlight_get_brightness,
381 };
382
383 static void __init mainstone_backlight_register(void)
384 {
385         struct backlight_device *bl;
386
387         bl = backlight_device_register("mainstone-bl", &pxa_device_fb.dev,
388                                        NULL, &mainstone_backlight_ops);
389         if (IS_ERR(bl)) {
390                 printk(KERN_ERR "mainstone: unable to register backlight: %ld\n",
391                        PTR_ERR(bl));
392                 return;
393         }
394
395         /*
396          * broken design - register-then-setup interfaces are
397          * utterly broken by definition.
398          */
399         bl->props.max_brightness = 1023;
400         bl->props.brightness = 1023;
401         backlight_update_status(bl);
402 }
403 #else
404 #define mainstone_backlight_register()  do { } while (0)
405 #endif
406
407 static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
408         .pixclock               = 50000,
409         .xres                   = 640,
410         .yres                   = 480,
411         .bpp                    = 16,
412         .hsync_len              = 1,
413         .left_margin            = 0x9f,
414         .right_margin           = 1,
415         .vsync_len              = 44,
416         .upper_margin           = 0,
417         .lower_margin           = 0,
418         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
419 };
420
421 static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
422         .pixclock               = 110000,
423         .xres                   = 240,
424         .yres                   = 320,
425         .bpp                    = 16,
426         .hsync_len              = 4,
427         .left_margin            = 8,
428         .right_margin           = 20,
429         .vsync_len              = 3,
430         .upper_margin           = 1,
431         .lower_margin           = 10,
432         .sync                   = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
433 };
434
435 static struct pxafb_mach_info mainstone_pxafb_info = {
436         .num_modes              = 1,
437         .lccr0                  = LCCR0_Act,
438         .lccr3                  = LCCR3_PCP,
439 };
440
441 static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
442 {
443         int err;
444
445         /* make sure SD/Memory Stick multiplexer's signals
446          * are routed to MMC controller
447          */
448         MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
449
450         err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
451                              "MMC card detect", data);
452         if (err)
453                 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
454
455         return err;
456 }
457
458 static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
459 {
460         struct pxamci_platform_data* p_d = dev->platform_data;
461
462         if (( 1 << vdd) & p_d->ocr_mask) {
463                 printk(KERN_DEBUG "%s: on\n", __func__);
464                 MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
465                 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
466         } else {
467                 printk(KERN_DEBUG "%s: off\n", __func__);
468                 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
469         }
470 }
471
472 static void mainstone_mci_exit(struct device *dev, void *data)
473 {
474         free_irq(MAINSTONE_MMC_IRQ, data);
475 }
476
477 static struct pxamci_platform_data mainstone_mci_platform_data = {
478         .ocr_mask       = MMC_VDD_32_33|MMC_VDD_33_34,
479         .init           = mainstone_mci_init,
480         .setpower       = mainstone_mci_setpower,
481         .exit           = mainstone_mci_exit,
482 };
483
484 static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
485 {
486         unsigned long flags;
487
488         local_irq_save(flags);
489         if (mode & IR_SIRMODE) {
490                 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
491         } else if (mode & IR_FIRMODE) {
492                 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
493         }
494         if (mode & IR_OFF) {
495                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
496         } else {
497                 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
498         }
499         local_irq_restore(flags);
500 }
501
502 static struct pxaficp_platform_data mainstone_ficp_platform_data = {
503         .transceiver_cap  = IR_SIRMODE | IR_FIRMODE | IR_OFF,
504         .transceiver_mode = mainstone_irda_transceiver_mode,
505 };
506
507 static struct gpio_keys_button gpio_keys_button[] = {
508         [0] = {
509                 .desc   = "wakeup",
510                 .code   = KEY_SUSPEND,
511                 .type   = EV_KEY,
512                 .gpio   = 1,
513                 .wakeup = 1,
514         },
515 };
516
517 static struct gpio_keys_platform_data mainstone_gpio_keys = {
518         .buttons        = gpio_keys_button,
519         .nbuttons       = 1,
520 };
521
522 static struct platform_device mst_gpio_keys_device = {
523         .name           = "gpio-keys",
524         .id             = -1,
525         .dev            = {
526                 .platform_data  = &mainstone_gpio_keys,
527         },
528 };
529
530 static struct platform_device *platform_devices[] __initdata = {
531         &smc91x_device,
532         &mst_audio_device,
533         &mst_flash_device[0],
534         &mst_flash_device[1],
535         &mst_gpio_keys_device,
536 };
537
538 static int mainstone_ohci_init(struct device *dev)
539 {
540         /* Set the Power Control Polarity Low and Power Sense
541            Polarity Low to active low. */
542         UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
543                 ~(UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSEP3 | UHCHR_SSE);
544
545         return 0;
546 }
547
548 static struct pxaohci_platform_data mainstone_ohci_platform_data = {
549         .port_mode      = PMM_PERPORT_MODE,
550         .init           = mainstone_ohci_init,
551 };
552
553 #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULES)
554 static unsigned int mainstone_matrix_keys[] = {
555         KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
556         KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
557         KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
558         KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
559         KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
560         KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
561         KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
562         KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
563         KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
564
565         KEY(0, 4, KEY_DOT),     /* . */
566         KEY(1, 4, KEY_CLOSE),   /* @ */
567         KEY(4, 4, KEY_SLASH),
568         KEY(5, 4, KEY_BACKSLASH),
569         KEY(0, 5, KEY_HOME),
570         KEY(1, 5, KEY_LEFTSHIFT),
571         KEY(2, 5, KEY_SPACE),
572         KEY(3, 5, KEY_SPACE),
573         KEY(4, 5, KEY_ENTER),
574         KEY(5, 5, KEY_BACKSPACE),
575
576         KEY(0, 6, KEY_UP),
577         KEY(1, 6, KEY_DOWN),
578         KEY(2, 6, KEY_LEFT),
579         KEY(3, 6, KEY_RIGHT),
580         KEY(4, 6, KEY_SELECT),
581 };
582
583 struct pxa27x_keypad_platform_data mainstone_keypad_info = {
584         .matrix_key_rows        = 6,
585         .matrix_key_cols        = 7,
586         .matrix_key_map         = mainstone_matrix_keys,
587         .matrix_key_map_size    = ARRAY_SIZE(mainstone_matrix_keys),
588
589         .enable_rotary0         = 1,
590         .rotary0_up_key         = KEY_UP,
591         .rotary0_down_key       = KEY_DOWN,
592
593         .debounce_interval      = 30,
594 };
595
596 static void __init mainstone_init_keypad(void)
597 {
598         pxa_set_keypad_info(&mainstone_keypad_info);
599 }
600 #else
601 static inline void mainstone_init_keypad(void) {}
602 #endif
603
604 static void __init mainstone_init(void)
605 {
606         int SW7 = 0;  /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
607
608         pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
609
610         mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
611         mst_flash_data[1].width = 4;
612
613         /* Compensate for SW7 which swaps the flash banks */
614         mst_flash_data[SW7].name = "processor-flash";
615         mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
616
617         printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
618                mst_flash_data[0].name);
619
620         /* system bus arbiter setting
621          * - Core_Park
622          * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
623          */
624         ARB_CNTRL = ARB_CORE_PARK | 0x234;
625
626         platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
627
628         /* reading Mainstone's "Virtual Configuration Register"
629            might be handy to select LCD type here */
630         if (0)
631                 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
632         else
633                 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
634
635         set_pxa_fb_info(&mainstone_pxafb_info);
636         mainstone_backlight_register();
637
638         pxa_set_mci_info(&mainstone_mci_platform_data);
639         pxa_set_ficp_info(&mainstone_ficp_platform_data);
640         pxa_set_ohci_info(&mainstone_ohci_platform_data);
641         pxa_set_i2c_info(NULL);
642
643         mainstone_init_keypad();
644 }
645
646
647 static struct map_desc mainstone_io_desc[] __initdata = {
648         {       /* CPLD */
649                 .virtual        =  MST_FPGA_VIRT,
650                 .pfn            = __phys_to_pfn(MST_FPGA_PHYS),
651                 .length         = 0x00100000,
652                 .type           = MT_DEVICE
653         }
654 };
655
656 static void __init mainstone_map_io(void)
657 {
658         pxa_map_io();
659         iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
660
661         /*      for use I SRAM as framebuffer.  */
662         PSLR |= 0xF04;
663         PCFR = 0x66;
664 }
665
666 MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
667         /* Maintainer: MontaVista Software Inc. */
668         .phys_io        = 0x40000000,
669         .boot_params    = 0xa0000100,   /* BLOB boot parameter setting */
670         .io_pg_offst    = (io_p2v(0x40000000) >> 18) & 0xfffc,
671         .map_io         = mainstone_map_io,
672         .init_irq       = mainstone_init_irq,
673         .timer          = &pxa_timer,
674         .init_machine   = mainstone_init,
675 MACHINE_END