2 * linux/arch/arm/mach-omap1/board-h3.c
4 * This file contains OMAP1710 H3 specific code.
6 * Copyright (C) 2004 Texas Instruments, Inc.
7 * Copyright (C) 2002 MontaVista Software, Inc.
8 * Copyright (C) 2001 RidgeRun, Inc.
9 * Author: RidgeRun, Inc.
10 * Greg Lonnon (glonnon@ridgerun.com) or info@ridgerun.com
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
17 #include <linux/types.h>
18 #include <linux/init.h>
19 #include <linux/major.h>
20 #include <linux/kernel.h>
21 #include <linux/platform_device.h>
22 #include <linux/errno.h>
23 #include <linux/workqueue.h>
24 #include <linux/i2c.h>
25 #include <linux/mtd/mtd.h>
26 #include <linux/mtd/nand.h>
27 #include <linux/mtd/partitions.h>
28 #include <linux/input.h>
29 #include <linux/i2c/tps65010.h>
30 #include <linux/clk.h>
31 #include <linux/i2c.h>
32 #include <linux/spi/spi.h>
33 #include <linux/spi/tsc210x.h>
35 #include <asm/setup.h>
37 #include <mach/hardware.h>
40 #include <asm/mach-types.h>
41 #include <asm/mach/arch.h>
42 #include <asm/mach/flash.h>
43 #include <asm/mach/map.h>
45 #include <media/v4l2-int-device.h>
47 #include <mach/gpio.h>
48 #include <mach/gpio-switch.h>
49 #include <mach/gpioexpander.h>
50 #include <mach/irqs.h>
53 #include <mach/nand.h>
54 #include <mach/irda.h>
56 #include <mach/keypad.h>
58 #include <mach/common.h>
59 #include <mach/mcbsp.h>
60 #include <mach/omap-alsa.h>
62 #include <../drivers/media/video/ov9640.h>
66 static int h3_keymap[] = {
101 KEY(5, 4, KEY_SLEEP),
106 static struct mtd_partition nor_partitions[] = {
107 /* bootloader (U-Boot, etc) in first sector */
109 .name = "bootloader",
112 .mask_flags = MTD_WRITEABLE, /* force read-only */
114 /* bootloader params in the next sector */
117 .offset = MTDPART_OFS_APPEND,
124 .offset = MTDPART_OFS_APPEND,
130 .name = "filesystem",
131 .offset = MTDPART_OFS_APPEND,
132 .size = MTDPART_SIZ_FULL,
137 static struct flash_platform_data nor_data = {
138 .map_name = "cfi_probe",
140 .parts = nor_partitions,
141 .nr_parts = ARRAY_SIZE(nor_partitions),
144 static struct resource nor_resource = {
145 /* This is on CS3, wherever it's mapped */
146 .flags = IORESOURCE_MEM,
149 static struct platform_device nor_device = {
153 .platform_data = &nor_data,
156 .resource = &nor_resource,
159 static struct mtd_partition nand_partitions[] = {
161 /* REVISIT: enable these partitions if you make NAND BOOT work */
166 .mask_flags = MTD_WRITEABLE, /* force read-only */
169 .name = "bootloader",
170 .offset = MTDPART_OFS_APPEND,
172 .mask_flags = MTD_WRITEABLE, /* force read-only */
176 .offset = MTDPART_OFS_APPEND,
181 .offset = MTDPART_OFS_APPEND,
186 .name = "filesystem",
187 .size = MTDPART_SIZ_FULL,
188 .offset = MTDPART_OFS_APPEND,
192 /* dip switches control NAND chip access: 8 bit, 16 bit, or neither */
193 static struct omap_nand_platform_data nand_data = {
194 .options = NAND_SAMSUNG_LP_OPTIONS,
195 .parts = nand_partitions,
196 .nr_parts = ARRAY_SIZE(nand_partitions),
199 static struct resource nand_resource = {
200 .flags = IORESOURCE_MEM,
203 static struct platform_device nand_device = {
207 .platform_data = &nand_data,
210 .resource = &nand_resource,
213 static struct resource smc91x_resources[] = {
215 .start = OMAP1710_ETHR_START, /* Physical */
216 .end = OMAP1710_ETHR_START + 0xf,
217 .flags = IORESOURCE_MEM,
220 .start = OMAP_GPIO_IRQ(40),
221 .end = OMAP_GPIO_IRQ(40),
222 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
226 static struct platform_device smc91x_device = {
229 .num_resources = ARRAY_SIZE(smc91x_resources),
230 .resource = smc91x_resources,
233 #define GPTIMER_BASE 0xFFFB1400
234 #define GPTIMER_REGS(x) (0xFFFB1400 + (x * 0x800))
235 #define GPTIMER_REGS_SIZE 0x46
237 static struct resource intlat_resources[] = {
239 .start = GPTIMER_REGS(0), /* Physical */
240 .end = GPTIMER_REGS(0) + GPTIMER_REGS_SIZE,
241 .flags = IORESOURCE_MEM,
244 .start = INT_1610_GPTIMER1,
245 .end = INT_1610_GPTIMER1,
246 .flags = IORESOURCE_IRQ,
250 static struct platform_device intlat_device = {
251 .name = "omap_intlat",
253 .num_resources = ARRAY_SIZE(intlat_resources),
254 .resource = intlat_resources,
257 static struct resource h3_kp_resources[] = {
259 .start = INT_KEYBOARD,
261 .flags = IORESOURCE_IRQ,
265 static struct omap_kp_platform_data h3_kp_data = {
269 .keymapsize = ARRAY_SIZE(h3_keymap),
275 static struct platform_device h3_kp_device = {
276 .name = "omap-keypad",
279 .platform_data = &h3_kp_data,
281 .num_resources = ARRAY_SIZE(h3_kp_resources),
282 .resource = h3_kp_resources,
286 /* Select between the IrDA and aGPS module
288 static int h3_select_irda(struct device *dev, int state)
293 if ((err = read_gpio_expa(&expa, 0x26))) {
294 printk(KERN_ERR "Error reading from I/O EXPANDER \n");
298 /* 'P6' enable/disable IRDA_TX and IRDA_RX */
299 if (state & IR_SEL) { /* IrDA */
300 if ((err = write_gpio_expa(expa | 0x40, 0x26))) {
301 printk(KERN_ERR "Error writing to I/O EXPANDER \n");
305 if ((err = write_gpio_expa(expa & ~0x40, 0x26))) {
306 printk(KERN_ERR "Error writing to I/O EXPANDER \n");
313 static void set_trans_mode(struct work_struct *work)
315 struct omap_irda_config *irda_config =
316 container_of(work, struct omap_irda_config, gpio_expa.work);
317 int mode = irda_config->mode;
321 if ((err = read_gpio_expa(&expa, 0x27)) != 0) {
322 printk(KERN_ERR "Error reading from I/O expander\n");
327 if (mode & IR_SIRMODE) {
329 } else { /* MIR/FIR */
333 if ((err = write_gpio_expa(expa, 0x27)) != 0) {
334 printk(KERN_ERR "Error writing to I/O expander\n");
338 static int h3_transceiver_mode(struct device *dev, int mode)
340 struct omap_irda_config *irda_config = dev->platform_data;
342 irda_config->mode = mode;
343 cancel_delayed_work(&irda_config->gpio_expa);
344 PREPARE_DELAYED_WORK(&irda_config->gpio_expa, set_trans_mode);
345 schedule_delayed_work(&irda_config->gpio_expa, 0);
350 static struct omap_irda_config h3_irda_data = {
351 .transceiver_cap = IR_SIRMODE | IR_MIRMODE | IR_FIRMODE,
352 .transceiver_mode = h3_transceiver_mode,
353 .select_irda = h3_select_irda,
354 .rx_channel = OMAP_DMA_UART3_RX,
355 .tx_channel = OMAP_DMA_UART3_TX,
356 .dest_start = UART3_THR,
357 .src_start = UART3_RHR,
362 static struct resource h3_irda_resources[] = {
366 .flags = IORESOURCE_IRQ,
370 static u64 irda_dmamask = 0xffffffff;
372 static struct platform_device h3_irda_device = {
376 .platform_data = &h3_irda_data,
377 .dma_mask = &irda_dmamask,
379 .num_resources = ARRAY_SIZE(h3_irda_resources),
380 .resource = h3_irda_resources,
383 static struct platform_device h3_lcd_device = {
388 static struct tsc210x_config tsc_platform_data = {
390 .monitor = TSC_VBAT | TSC_TEMP,
394 static struct spi_board_info h3_spi_board_info[] __initdata = {
396 .modalias = "tsc2101",
399 .irq = OMAP_GPIO_IRQ(H3_TS_GPIO),
400 .max_speed_hz = 16000000,
401 .platform_data = &tsc_platform_data,
405 static struct omap_mcbsp_reg_cfg mcbsp_regs = {
406 .spcr2 = FREE | FRST | GRST | XRST | XINTM(3),
407 .spcr1 = RINTM(3) | RRST,
408 .rcr2 = RPHASE | RFRLEN2(OMAP_MCBSP_WORD_8) |
409 RWDLEN2(OMAP_MCBSP_WORD_16) | RDATDLY(1),
410 .rcr1 = RFRLEN1(OMAP_MCBSP_WORD_8) | RWDLEN1(OMAP_MCBSP_WORD_16),
411 .xcr2 = XPHASE | XFRLEN2(OMAP_MCBSP_WORD_8) |
412 XWDLEN2(OMAP_MCBSP_WORD_16) | XDATDLY(1) | XFIG,
413 .xcr1 = XFRLEN1(OMAP_MCBSP_WORD_8) | XWDLEN1(OMAP_MCBSP_WORD_16),
415 .srgr2 = GSYNC | CLKSP | FSGM | FPER(31),
417 .pcr0 = CLKRM | SCLKME | FSXP | FSRP | CLKXP | CLKRP,
418 /*.pcr0 = CLKXP | CLKRP,*/ /* mcbsp: slave */
421 static struct omap_alsa_codec_config alsa_config = {
422 .name = "H3 TSC2101",
423 .mcbsp_regs_alsa = &mcbsp_regs,
424 .codec_configure_dev = NULL, /* tsc2101_configure, */
425 .codec_set_samplerate = NULL, /* tsc2101_set_samplerate, */
426 .codec_clock_setup = NULL, /* tsc2101_clock_setup, */
427 .codec_clock_on = NULL, /* tsc2101_clock_on, */
428 .codec_clock_off = NULL, /* tsc2101_clock_off, */
429 .get_default_samplerate = NULL, /* tsc2101_get_default_samplerate, */
432 static struct platform_device h3_mcbsp1_device = {
433 .name = "omap_alsa_mcbsp",
436 .platform_data = &alsa_config,
440 static struct platform_device *devices[] __initdata = {
451 static struct omap_usb_config h3_usb_config __initdata = {
452 /* usb1 has a Mini-AB port and external isp1301 transceiver */
455 #ifdef CONFIG_USB_GADGET_OMAP
456 .hmc_mode = 19, /* 0:host(off) 1:dev|otg 2:disabled */
457 #elif defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
458 /* NONSTANDARD CABLE NEEDED (B-to-Mini-B) */
459 .hmc_mode = 20, /* 1:dev|otg(off) 1:host 2:disabled */
465 static struct omap_uart_config h3_uart_config __initdata = {
466 .enabled_uarts = ((1 << 0) | (1 << 1) | (1 << 2)),
469 static struct omap_lcd_config h3_lcd_config __initdata = {
470 .ctrl_name = "internal",
473 static struct omap_board_config_kernel h3_config[] __initdata = {
474 { OMAP_TAG_USB, &h3_usb_config },
475 { OMAP_TAG_UART, &h3_uart_config },
476 { OMAP_TAG_LCD, &h3_lcd_config },
479 static struct omap_gpio_switch h3_gpio_switches[] __initdata = {
482 .gpio = OMAP_MPUIO(1),
483 .type = OMAP_GPIO_SWITCH_TYPE_COVER,
484 .debounce_rising = 100,
485 .debounce_falling = 0,
486 .notify = h3_mmc_slot_cover_handler,
491 #define H3_NAND_RB_GPIO_PIN 10
493 static int nand_dev_ready(struct omap_nand_platform_data *data)
495 return omap_get_gpio_datain(H3_NAND_RB_GPIO_PIN);
498 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
500 * Common OV9640 register initialization for all image sizes, pixel formats,
503 const static struct ov9640_reg ov9640_common[] = {
505 { 0x12, 0x80 }, { 0x11, 0x80 }, { 0x13, 0x88 }, /* COM7, CLKRC, COM8 */
506 { 0x01, 0x58 }, { 0x02, 0x24 }, { 0x04, 0x00 }, /* BLUE, RED, COM1 */
507 { 0x0E, 0x81 }, { 0x0F, 0x4F }, { 0x14, 0xcA }, /* COM5, COM6, COM9 */
508 { 0x16, 0x02 }, { 0x1B, 0x01 }, { 0x24, 0x70 }, /* ?, PSHFT, AEW */
509 { 0x25, 0x68 }, { 0x26, 0xD3 }, { 0x27, 0x90 }, /* AEB, VPT, BBIAS */
510 { 0x2A, 0x00 }, { 0x2B, 0x00 }, { 0x32, 0x24 }, /* EXHCH, EXHCL, HREF */
511 { 0x33, 0x02 }, { 0x37, 0x02 }, { 0x38, 0x13 }, /* CHLF, ADC, ACOM */
512 { 0x39, 0xF0 }, { 0x3A, 0x00 }, { 0x3B, 0x01 }, /* OFON, TSLB, COM11 */
513 { 0x3D, 0x90 }, { 0x3E, 0x02 }, { 0x3F, 0xF2 }, /* COM13, COM14, EDGE */
514 { 0x41, 0x02 }, { 0x42, 0xC8 }, /* COM16, COM17 */
515 { 0x43, 0xF0 }, { 0x44, 0x10 }, { 0x45, 0x6C }, /* ?, ?, ? */
516 { 0x46, 0x6C }, { 0x47, 0x44 }, { 0x48, 0x44 }, /* ?, ?, ? */
517 { 0x49, 0x03 }, { 0x59, 0x49 }, { 0x5A, 0x94 }, /* ?, ?, ? */
518 { 0x5B, 0x46 }, { 0x5C, 0x84 }, { 0x5D, 0x5C }, /* ?, ?, ? */
519 { 0x5E, 0x08 }, { 0x5F, 0x00 }, { 0x60, 0x14 }, /* ?, ?, ? */
520 { 0x61, 0xCE }, /* ? */
521 { 0x62, 0x70 }, { 0x63, 0x00 }, { 0x64, 0x04 }, /* LCC1, LCC2, LCC3 */
522 { 0x65, 0x00 }, { 0x66, 0x00 }, /* LCC4, LCC5 */
523 { 0x69, 0x00 }, { 0x6A, 0x3E }, { 0x6B, 0x3F }, /* HV, MBD, DBLV */
524 { 0x6C, 0x40 }, { 0x6D, 0x30 }, { 0x6E, 0x4B }, /* GSP1, GSP2, GSP3 */
525 { 0x6F, 0x60 }, { 0x70, 0x70 }, { 0x71, 0x70 }, /* GSP4, GSP5, GSP6 */
526 { 0x72, 0x70 }, { 0x73, 0x70 }, { 0x74, 0x60 }, /* GSP7, GSP8, GSP9 */
527 { 0x75, 0x60 }, { 0x76, 0x50 }, { 0x77, 0x48 }, /* GSP10,GSP11,GSP12 */
528 { 0x78, 0x3A }, { 0x79, 0x2E }, { 0x7A, 0x28 }, /* GSP13,GSP14,GSP15 */
529 { 0x7B, 0x22 }, { 0x7C, 0x04 }, { 0x7D, 0x07 }, /* GSP16,GST1, GST2 */
530 { 0x7E, 0x10 }, { 0x7F, 0x28 }, { 0x80, 0x36 }, /* GST3, GST4, GST5 */
531 { 0x81, 0x44 }, { 0x82, 0x52 }, { 0x83, 0x60 }, /* GST6, GST7, GST8 */
532 { 0x84, 0x6C }, { 0x85, 0x78 }, { 0x86, 0x8C }, /* GST9, GST10,GST11 */
533 { 0x87, 0x9E }, { 0x88, 0xBB }, { 0x89, 0xD2 }, /* GST12,GST13,GST14 */
534 { 0x8A, 0xE6 }, { 0x13, 0xaF }, { 0x15, 0x02 }, /* GST15, COM8 */
535 { 0x22, 0x8a }, /* GROS */
536 { OV9640_REG_TERM, OV9640_VAL_TERM }
539 static int ov9640_sensor_power_set(int power)
544 /* read current state of GPIO EXPA outputs */
545 err = read_gpio_expa(&expa, 0x27);
547 printk(KERN_ERR "Error reading GPIO EXPA\n");
550 /* Clear GPIO EXPA P3 (CAMERA_MODULE_EN) to power-up/down sensor */
556 err = write_gpio_expa(expa, 0x27);
558 printk(KERN_ERR "Error writing to GPIO EXPA\n");
565 static struct v4l2_ifparm ifparm = {
566 .if_type = V4L2_IF_TYPE_BT656,
569 .frame_start_on_rising_vs = 1,
571 .mode = V4L2_IF_TYPE_BT656_MODE_NOBT_8BIT,
572 .clock_min = OV9640_XCLK_MIN,
573 .clock_max = OV9640_XCLK_MAX,
578 static int ov9640_ifparm(struct v4l2_ifparm *p)
585 static struct ov9640_platform_data h3_ov9640_platform_data = {
586 .power_set = ov9640_sensor_power_set,
587 .default_regs = ov9640_common,
588 .ifparm = ov9640_ifparm,
592 static struct i2c_board_info __initdata h3_i2c_board_info[] = {
594 I2C_BOARD_INFO("tps65013", 0x48),
595 /* .irq = OMAP_GPIO_IRQ(??), */
597 #if defined(CONFIG_VIDEO_OV9640) || defined(CONFIG_VIDEO_OV9640_MODULE)
599 I2C_BOARD_INFO("ov9640", 0x30),
600 .platform_data = &h3_ov9640_platform_data,
604 I2C_BOARD_INFO("isp1301_omap", 0x2d),
605 .irq = OMAP_GPIO_IRQ(14),
609 static void __init h3_init(void)
611 /* Here we assume the NOR boot config: NOR on CS3 (possibly swapped
612 * to address 0 by a dip switch), NAND on CS2B. The NAND driver will
613 * notice whether a NAND chip is enabled at probe time.
615 * H3 support NAND-boot, with a dip switch to put NOR on CS2B and NAND
616 * (which on H2 may be 16bit) on CS3. Try detecting that in code here,
617 * to avoid probing every possible flash configuration...
619 nor_resource.end = nor_resource.start = omap_cs3_phys();
620 nor_resource.end += SZ_32M - 1;
622 nand_resource.end = nand_resource.start = OMAP_CS2B_PHYS;
623 nand_resource.end += SZ_4K - 1;
624 if (!(omap_request_gpio(H3_NAND_RB_GPIO_PIN)))
625 nand_data.dev_ready = nand_dev_ready;
627 /* GPIO10 Func_MUX_CTRL reg bit 29:27, Configure V2 to mode1 as GPIO */
628 /* GPIO10 pullup/down register, Enable pullup on GPIO10 */
629 omap_cfg_reg(V2_1710_GPIO10);
632 omap_cfg_reg(W19_1610_GPIO48);
633 gpio_request(H3_TS_GPIO, "tsc_irq");
634 gpio_direction_input(H3_TS_GPIO);
635 omap_cfg_reg(N14_1610_UWIRE_CS0);
637 platform_add_devices(devices, ARRAY_SIZE(devices));
638 spi_register_board_info(h3_spi_board_info,
639 ARRAY_SIZE(h3_spi_board_info));
640 omap_board_config = h3_config;
641 omap_board_config_size = ARRAY_SIZE(h3_config);
643 omap_register_i2c_bus(1, 100, h3_i2c_board_info,
644 ARRAY_SIZE(h3_i2c_board_info));
646 omap_register_gpio_switches(h3_gpio_switches,
647 ARRAY_SIZE(h3_gpio_switches));
650 static void __init h3_init_smc91x(void)
652 omap_cfg_reg(W15_1710_GPIO40);
653 if (omap_request_gpio(40) < 0) {
654 printk("Error requesting gpio 40 for smc91x irq\n");
659 static void __init h3_init_irq(void)
661 omap1_init_common_hw();
667 static void __init h3_map_io(void)
669 omap1_map_common_io();
672 MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board")
673 /* Maintainer: Texas Instruments, Inc. */
674 .phys_io = 0xfff00000,
675 .io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
676 .boot_params = 0x10000100,
678 .init_irq = h3_init_irq,
679 .init_machine = h3_init,
680 .timer = &omap_timer,