2 * (C) Copyright 2008-2010
3 * GraÅžvydas Ignotas <notasas@gmail.com>
5 * Configuration settings for the OMAP3 Pandora.
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
27 * High Level Configuration Options
29 #define CONFIG_OMAP 1 /* in a TI OMAP core */
30 #define CONFIG_OMAP34XX 1 /* which is a 34XX */
31 #define CONFIG_OMAP3_PANDORA 1 /* working with pandora */
32 #define CONFIG_OMAP_GPIO
34 #define CONFIG_SDRC /* The chip has SDRC controller */
36 #include <asm/arch/cpu.h> /* get chip and board defs */
37 #include <asm/arch/omap3.h>
40 * Display CPU and Board information
42 #define CONFIG_DISPLAY_CPUINFO 1
43 #define CONFIG_DISPLAY_BOARDINFO 1
46 #define V_OSCK 26000000 /* Clock output from T2 */
47 #define V_SCLK (V_OSCK >> 1)
49 #define CONFIG_MISC_INIT_R
51 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
52 #define CONFIG_SETUP_MEMORY_TAGS 1
53 #define CONFIG_INITRD_TAG 1
54 #define CONFIG_REVISION_TAG 1
56 #define CONFIG_OF_LIBFDT 1
59 * Size of malloc() pool
61 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
62 #define CONFIG_SYS_MALLOC_LEN (1024 * 1024 + CONFIG_ENV_SIZE)
66 #define LCD_BPP LCD_COLOR16
67 #define CONFIG_SYS_WHITE_ON_BLACK 1
69 /* used by menu code */
70 #define CONFIG_PREBOOT
71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
72 #define CONFIG_SYS_DEVICE_NULLDEV 1
78 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
79 #define CONFIG_SYS_DEVICE_NULLDEV 1
82 #define CONFIG_MUSB_UDC 1
83 #define CONFIG_USB_OMAP3 1
84 #define CONFIG_TWL4030_USB 1
86 /* USB device configuration */
87 #define CONFIG_USB_DEVICE 1
88 #define CONFIG_USB_TTY 1
91 * NS16550 Configuration
93 #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
95 #define CONFIG_SYS_NS16550
96 #define CONFIG_SYS_NS16550_SERIAL
97 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
98 #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
101 * select serial console configuration
103 #define CONFIG_CONS_INDEX 3
104 #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
105 #define CONFIG_SERIAL3 3
107 /* allow to overwrite serial and ethaddr */
108 #define CONFIG_ENV_OVERWRITE
109 #define CONFIG_BAUDRATE 115200
110 #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, \
112 #define CONFIG_GENERIC_MMC 1
114 #define CONFIG_OMAP_HSMMC 1
115 #define CONFIG_DOS_PARTITION 1
117 /* commands to include */
118 #include <config_cmd_default.h>
120 #define CONFIG_CMD_EXT2 /* EXT2 Support */
121 #define CONFIG_CMD_FAT /* FAT support */
123 #define CONFIG_CMD_I2C /* I2C serial bus support */
124 #define CONFIG_CMD_MMC /* MMC support */
125 #define CONFIG_CMD_NAND /* NAND support */
126 #define CONFIG_CMD_CACHE /* Cache control */
128 #undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
129 #undef CONFIG_CMD_FPGA /* FPGA configuration Support */
130 #undef CONFIG_CMD_IMI /* iminfo */
131 #undef CONFIG_CMD_IMLS /* List all found images */
132 #undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
133 #undef CONFIG_CMD_NFS /* NFS support */
135 #define CONFIG_SYS_NO_FLASH
136 #define CONFIG_HARD_I2C 1
137 #define CONFIG_SYS_I2C_SPEED 100000
138 #define CONFIG_SYS_I2C_SLAVE 1
139 #define CONFIG_SYS_I2C_BUS 0
140 #define CONFIG_SYS_I2C_BUS_SELECT 1
141 #define CONFIG_DRIVER_OMAP34XX_I2C 1
146 #define CONFIG_TWL4030_POWER 1
147 #define CONFIG_TWL4030_LED 1
152 #define CONFIG_NAND_OMAP_GPMC
153 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
155 #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
158 #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
160 #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
163 #ifdef CONFIG_CMD_NAND
164 #define CONFIG_CMD_MTDPARTS
165 #define CONFIG_MTD_PARTITIONS
166 #define CONFIG_MTD_DEVICE
167 #define CONFIG_CMD_UBI
168 #define CONFIG_CMD_UBIFS
169 #define CONFIG_RBTREE
172 #define MTDIDS_DEFAULT "nand0=nand"
173 #define MTDPARTS_DEFAULT "mtdparts=nand:512k(xloader),"\
174 "1920k(uboot),128k(uboot-env),"\
175 "10m(boot),-(rootfs)"
177 #define MTDPARTS_DEFAULT
180 /* Environment information */
181 #define CONFIG_BOOTDELAY 0
183 #define CONFIG_EXTRA_ENV_SETTINGS \
185 "loadaddr=0x82000000\0" \
186 "bootargs=ubi.mtd=4 ubi.mtd=3 root=ubi0:rootfs rootfstype=ubifs " \
187 "rw rootflags=bulk_read vram=6272K omapfb.vram=0:3000K quiet\0" \
188 "mtdparts=" MTDPARTS_DEFAULT "\0" \
190 #define CONFIG_BOOTCOMMAND \
191 "if mmc rescan && fatload mmc1 0 ${loadaddr} autoboot.txt || " \
192 "ext2load mmc1 0 ${loadaddr} autoboot.txt; then " \
193 "ssource ${loadaddr} ${filesize}; " \
195 "if ubi part boot && ubifsmount boot; then " \
196 "ubifsload ${loadaddr} autoboot.txt && ssource ${loadaddr} ${filesize}; " \
197 "ubifsload ${loadaddr} uImage && bootm ${loadaddr}; " \
199 "setenv stdout lcd; echo Failed to load kernel, you may need to reflash the firmware.; " \
202 #define CONFIG_AUTO_COMPLETE 1
204 * Miscellaneous configurable options
206 #define CONFIG_SYS_LONGHELP /* undef to save memory */
207 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
208 #define CONFIG_SYS_PROMPT "Pandora # "
209 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
210 /* Print Buffer Size */
211 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
212 sizeof(CONFIG_SYS_PROMPT) + 16)
213 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
215 /* Boot Argument Buffer Size */
216 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
217 /* memtest works on */
218 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
219 #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
220 0x01F00000) /* 31MB */
222 #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
226 * OMAP3 has 12 GP timers, they can be driven by the system clock
227 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
228 * This rate is divided by a local divisor.
230 #define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
231 #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
232 #define CONFIG_SYS_HZ 1000
234 /*-----------------------------------------------------------------------
235 * Physical Memory Map
237 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
238 #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
239 #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
241 #define CONFIG_SYS_TEXT_BASE 0x80008000
242 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
243 #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
244 #define CONFIG_SYS_INIT_RAM_SIZE 0x800
245 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
246 CONFIG_SYS_INIT_RAM_SIZE - \
247 GENERATED_GBL_DATA_SIZE)
249 /*-----------------------------------------------------------------------
250 * FLASH and environment organization
253 /* **** PISMO SUPPORT *** */
255 /* Configure the PISMO */
256 #define PISMO1_NAND_SIZE GPMC_SIZE_128M
257 #define PISMO1_ONEN_SIZE GPMC_SIZE_128M
259 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
261 #if defined(CONFIG_CMD_NAND)
262 #define CONFIG_SYS_FLASH_BASE PISMO1_NAND_BASE
265 /* Monitor at start of flash */
266 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
268 #define CONFIG_ENV_IS_IN_NAND 1
269 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
271 #define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
272 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
273 #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
275 #define CONFIG_SYS_CACHELINE_SIZE 64
277 #endif /* __CONFIG_H */