x86, cpu: Split addon_cpuid_features.c
authorH. Peter Anvin <hpa@linux.intel.com>
Tue, 20 Jul 2010 01:32:04 +0000 (18:32 -0700)
committerH. Peter Anvin <hpa@linux.intel.com>
Tue, 20 Jul 2010 02:02:41 +0000 (19:02 -0700)
addon_cpuid_features.c contains exactly two almost completely
unrelated functions, plus has a long and very generic name.  Split it
into two files, scattered.c for the scattered feature flags, and
topology.c for the topology information.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
LKML-Reference: <tip-*@git.kernel.org>

arch/x86/kernel/cpu/Makefile
arch/x86/kernel/cpu/scattered.c [new file with mode: 0644]
arch/x86/kernel/cpu/topology.c [moved from arch/x86/kernel/cpu/addon_cpuid_features.c with 64% similarity]

index 3a785da..5e3a351 100644 (file)
@@ -12,7 +12,7 @@ endif
 nostackp := $(call cc-option, -fno-stack-protector)
 CFLAGS_common.o                := $(nostackp)
 
-obj-y                  := intel_cacheinfo.o addon_cpuid_features.o
+obj-y                  := intel_cacheinfo.o scattered.o topology.o
 obj-y                  += proc.o capflags.o powerflags.o common.o
 obj-y                  += vmware.o hypervisor.o sched.o mshyperv.o
 
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
new file mode 100644 (file)
index 0000000..9815364
--- /dev/null
@@ -0,0 +1,61 @@
+/*
+ *     Routines to indentify additional cpu features that are scattered in
+ *     cpuid space.
+ */
+#include <linux/cpu.h>
+
+#include <asm/pat.h>
+#include <asm/processor.h>
+
+#include <asm/apic.h>
+
+struct cpuid_bit {
+       u16 feature;
+       u8 reg;
+       u8 bit;
+       u32 level;
+       u32 sub_leaf;
+};
+
+enum cpuid_regs {
+       CR_EAX = 0,
+       CR_ECX,
+       CR_EDX,
+       CR_EBX
+};
+
+void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
+{
+       u32 max_level;
+       u32 regs[4];
+       const struct cpuid_bit *cb;
+
+       static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
+               { X86_FEATURE_IDA,              CR_EAX, 1, 0x00000006, 0 },
+               { X86_FEATURE_ARAT,             CR_EAX, 2, 0x00000006, 0 },
+               { X86_FEATURE_APERFMPERF,       CR_ECX, 0, 0x00000006, 0 },
+               { X86_FEATURE_EPB,              CR_ECX, 3, 0x00000006, 0 },
+               { X86_FEATURE_XSAVEOPT,         CR_EAX, 0, 0x0000000d, 1 },
+               { X86_FEATURE_CPB,              CR_EDX, 9, 0x80000007, 0 },
+               { X86_FEATURE_NPT,              CR_EDX, 0, 0x8000000a, 0 },
+               { X86_FEATURE_LBRV,             CR_EDX, 1, 0x8000000a, 0 },
+               { X86_FEATURE_SVML,             CR_EDX, 2, 0x8000000a, 0 },
+               { X86_FEATURE_NRIPS,            CR_EDX, 3, 0x8000000a, 0 },
+               { 0, 0, 0, 0, 0 }
+       };
+
+       for (cb = cpuid_bits; cb->feature; cb++) {
+
+               /* Verify that the level is valid */
+               max_level = cpuid_eax(cb->level & 0xffff0000);
+               if (max_level < cb->level ||
+                   max_level > (cb->level | 0xffff))
+                       continue;
+
+               cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
+                           &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
+
+               if (regs[cb->reg] & (1 << cb->bit))
+                       set_cpu_cap(c, cb->feature);
+       }
+}
similarity index 64%
rename from arch/x86/kernel/cpu/addon_cpuid_features.c
rename to arch/x86/kernel/cpu/topology.c
index 41eebcd..4397e98 100644 (file)
@@ -1,65 +1,14 @@
 /*
- *     Routines to indentify additional cpu features that are scattered in
- *     cpuid space.
+ * Check for extended topology enumeration cpuid leaf 0xb and if it
+ * exists, use it for populating initial_apicid and cpu topology
+ * detection.
  */
-#include <linux/cpu.h>
 
+#include <linux/cpu.h>
+#include <asm/apic.h>
 #include <asm/pat.h>
 #include <asm/processor.h>
 
-#include <asm/apic.h>
-
-struct cpuid_bit {
-       u16 feature;
-       u8 reg;
-       u8 bit;
-       u32 level;
-       u32 sub_leaf;
-};
-
-enum cpuid_regs {
-       CR_EAX = 0,
-       CR_ECX,
-       CR_EDX,
-       CR_EBX
-};
-
-void __cpuinit init_scattered_cpuid_features(struct cpuinfo_x86 *c)
-{
-       u32 max_level;
-       u32 regs[4];
-       const struct cpuid_bit *cb;
-
-       static const struct cpuid_bit __cpuinitconst cpuid_bits[] = {
-               { X86_FEATURE_IDA,              CR_EAX, 1, 0x00000006, 0 },
-               { X86_FEATURE_ARAT,             CR_EAX, 2, 0x00000006, 0 },
-               { X86_FEATURE_APERFMPERF,       CR_ECX, 0, 0x00000006, 0 },
-               { X86_FEATURE_EPB,              CR_ECX, 3, 0x00000006, 0 },
-               { X86_FEATURE_XSAVEOPT,         CR_EAX, 0, 0x0000000d, 1 },
-               { X86_FEATURE_CPB,              CR_EDX, 9, 0x80000007, 0 },
-               { X86_FEATURE_NPT,              CR_EDX, 0, 0x8000000a, 0 },
-               { X86_FEATURE_LBRV,             CR_EDX, 1, 0x8000000a, 0 },
-               { X86_FEATURE_SVML,             CR_EDX, 2, 0x8000000a, 0 },
-               { X86_FEATURE_NRIPS,            CR_EDX, 3, 0x8000000a, 0 },
-               { 0, 0, 0, 0, 0 }
-       };
-
-       for (cb = cpuid_bits; cb->feature; cb++) {
-
-               /* Verify that the level is valid */
-               max_level = cpuid_eax(cb->level & 0xffff0000);
-               if (max_level < cb->level ||
-                   max_level > (cb->level | 0xffff))
-                       continue;
-
-               cpuid_count(cb->level, cb->sub_leaf, &regs[CR_EAX],
-                           &regs[CR_EBX], &regs[CR_ECX], &regs[CR_EDX]);
-
-               if (regs[cb->reg] & (1 << cb->bit))
-                       set_cpu_cap(c, cb->feature);
-       }
-}
-
 /* leaf 0xb SMT level */
 #define SMT_LEVEL      0