drivers/i2c/chips/twl4030-usb.c

   1 /*
   2  * twl4030_usb - TWL4030 USB transceiver, talking to OMAP OTG controller
   3  *
   4  * Copyright (C) 2004-2007 Texas Instruments
   5  * Copyright (C) 2008 Nokia Corporation
   6  * Contact: Felipe Balbi <felipe.balbi@nokia.com>
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Current status:
  23  *      - HS USB ULPI mode works.
  24  *      - 3-pin mode support may be added in future.
  25  */
  26
  27 #include <linux/module.h>
  28 #include <linux/init.h>
  29 #include <linux/time.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/platform_device.h>
  32 #include <linux/spinlock.h>
  33 #include <linux/workqueue.h>
  34 #include <linux/io.h>
  35 #include <linux/usb.h>
  36 #include <linux/usb/ch9.h>
  37 #include <linux/usb/gadget.h>
  38 #include <linux/usb/otg.h>
  39 #include <linux/i2c/twl4030.h>
  40 #include <mach/usb.h>
  41
  42 /* Register defines */
  43
  44 #define VENDOR_ID_LO                    0x00
  45 #define VENDOR_ID_HI                    0x01
  46 #define PRODUCT_ID_LO                   0x02
  47 #define PRODUCT_ID_HI                   0x03
  48
  49 #define FUNC_CTRL                       0x04
  50 #define FUNC_CTRL_SET                   0x05
  51 #define FUNC_CTRL_CLR                   0x06
  52 #define FUNC_CTRL_SUSPENDM              (1 << 6)
  53 #define FUNC_CTRL_RESET                 (1 << 5)
  54 #define FUNC_CTRL_OPMODE_MASK           (3 << 3) /* bits 3 and 4 */
  55 #define FUNC_CTRL_OPMODE_NORMAL         (0 << 3)
  56 #define FUNC_CTRL_OPMODE_NONDRIVING     (1 << 3)
  57 #define FUNC_CTRL_OPMODE_DISABLE_BIT_NRZI       (2 << 3)
  58 #define FUNC_CTRL_TERMSELECT            (1 << 2)
  59 #define FUNC_CTRL_XCVRSELECT_MASK       (3 << 0) /* bits 0 and 1 */
  60 #define FUNC_CTRL_XCVRSELECT_HS         (0 << 0)
  61 #define FUNC_CTRL_XCVRSELECT_FS         (1 << 0)
  62 #define FUNC_CTRL_XCVRSELECT_LS         (2 << 0)
  63 #define FUNC_CTRL_XCVRSELECT_FS4LS      (3 << 0)
  64
  65 #define IFC_CTRL                        0x07
  66 #define IFC_CTRL_SET                    0x08
  67 #define IFC_CTRL_CLR                    0x09
  68 #define IFC_CTRL_INTERFACE_PROTECT_DISABLE      (1 << 7)
  69 #define IFC_CTRL_AUTORESUME             (1 << 4)
  70 #define IFC_CTRL_CLOCKSUSPENDM          (1 << 3)
  71 #define IFC_CTRL_CARKITMODE             (1 << 2)
  72 #define IFC_CTRL_FSLSSERIALMODE_3PIN    (1 << 1)
  73
  74 #define TWL4030_OTG_CTRL                0x0A
  75 #define TWL4030_OTG_CTRL_SET            0x0B
  76 #define TWL4030_OTG_CTRL_CLR            0x0C
  77 #define TWL4030_OTG_CTRL_DRVVBUS        (1 << 5)
  78 #define TWL4030_OTG_CTRL_CHRGVBUS       (1 << 4)
  79 #define TWL4030_OTG_CTRL_DISCHRGVBUS    (1 << 3)
  80 #define TWL4030_OTG_CTRL_DMPULLDOWN     (1 << 2)
  81 #define TWL4030_OTG_CTRL_DPPULLDOWN     (1 << 1)
  82 #define TWL4030_OTG_CTRL_IDPULLUP       (1 << 0)
  83
  84 #define USB_INT_EN_RISE                 0x0D
  85 #define USB_INT_EN_RISE_SET             0x0E
  86 #define USB_INT_EN_RISE_CLR             0x0F
  87 #define USB_INT_EN_FALL                 0x10
  88 #define USB_INT_EN_FALL_SET             0x11
  89 #define USB_INT_EN_FALL_CLR             0x12
  90 #define USB_INT_STS                     0x13
  91 #define USB_INT_LATCH                   0x14
  92 #define USB_INT_IDGND                   (1 << 4)
  93 #define USB_INT_SESSEND                 (1 << 3)
  94 #define USB_INT_SESSVALID               (1 << 2)
  95 #define USB_INT_VBUSVALID               (1 << 1)
  96 #define USB_INT_HOSTDISCONNECT          (1 << 0)
  97
  98 #define CARKIT_CTRL                     0x19
  99 #define CARKIT_CTRL_SET                 0x1A
 100 #define CARKIT_CTRL_CLR                 0x1B
 101 #define CARKIT_CTRL_MICEN               (1 << 6)
 102 #define CARKIT_CTRL_SPKRIGHTEN          (1 << 5)
 103 #define CARKIT_CTRL_SPKLEFTEN           (1 << 4)
 104 #define CARKIT_CTRL_RXDEN               (1 << 3)
 105 #define CARKIT_CTRL_TXDEN               (1 << 2)
 106 #define CARKIT_CTRL_IDGNDDRV            (1 << 1)
 107 #define CARKIT_CTRL_CARKITPWR           (1 << 0)
 108 #define CARKIT_PLS_CTRL                 0x22
 109 #define CARKIT_PLS_CTRL_SET             0x23
 110 #define CARKIT_PLS_CTRL_CLR             0x24
 111 #define CARKIT_PLS_CTRL_SPKRRIGHT_BIASEN        (1 << 3)
 112 #define CARKIT_PLS_CTRL_SPKRLEFT_BIASEN (1 << 2)
 113 #define CARKIT_PLS_CTRL_RXPLSEN         (1 << 1)
 114 #define CARKIT_PLS_CTRL_TXPLSEN         (1 << 0)
 115
 116 #define MCPC_CTRL                       0x30
 117 #define MCPC_CTRL_SET                   0x31
 118 #define MCPC_CTRL_CLR                   0x32
 119 #define MCPC_CTRL_RTSOL                 (1 << 7)
 120 #define MCPC_CTRL_EXTSWR                (1 << 6)
 121 #define MCPC_CTRL_EXTSWC                (1 << 5)
 122 #define MCPC_CTRL_VOICESW               (1 << 4)
 123 #define MCPC_CTRL_OUT64K                (1 << 3)
 124 #define MCPC_CTRL_RTSCTSSW              (1 << 2)
 125 #define MCPC_CTRL_HS_UART               (1 << 0)
 126
 127 #define MCPC_IO_CTRL                    0x33
 128 #define MCPC_IO_CTRL_SET                0x34
 129 #define MCPC_IO_CTRL_CLR                0x35
 130 #define MCPC_IO_CTRL_MICBIASEN          (1 << 5)
 131 #define MCPC_IO_CTRL_CTS_NPU            (1 << 4)
 132 #define MCPC_IO_CTRL_RXD_PU             (1 << 3)
 133 #define MCPC_IO_CTRL_TXDTYP             (1 << 2)
 134 #define MCPC_IO_CTRL_CTSTYP             (1 << 1)
 135 #define MCPC_IO_CTRL_RTSTYP             (1 << 0)
 136
 137 #define MCPC_CTRL2                      0x36
 138 #define MCPC_CTRL2_SET                  0x37
 139 #define MCPC_CTRL2_CLR                  0x38
 140 #define MCPC_CTRL2_MCPC_CK_EN           (1 << 0)
 141
 142 #define OTHER_FUNC_CTRL                 0x80
 143 #define OTHER_FUNC_CTRL_SET             0x81
 144 #define OTHER_FUNC_CTRL_CLR             0x82
 145 #define OTHER_FUNC_CTRL_BDIS_ACON_EN    (1 << 4)
 146 #define OTHER_FUNC_CTRL_FIVEWIRE_MODE   (1 << 2)
 147
 148 #define OTHER_IFC_CTRL                  0x83
 149 #define OTHER_IFC_CTRL_SET              0x84
 150 #define OTHER_IFC_CTRL_CLR              0x85
 151 #define OTHER_IFC_CTRL_OE_INT_EN        (1 << 6)
 152 #define OTHER_IFC_CTRL_CEA2011_MODE     (1 << 5)
 153 #define OTHER_IFC_CTRL_FSLSSERIALMODE_4PIN      (1 << 4)
 154 #define OTHER_IFC_CTRL_HIZ_ULPI_60MHZ_OUT       (1 << 3)
 155 #define OTHER_IFC_CTRL_HIZ_ULPI         (1 << 2)
 156 #define OTHER_IFC_CTRL_ALT_INT_REROUTE  (1 << 0)
 157
 158 #define OTHER_INT_EN_RISE               0x86
 159 #define OTHER_INT_EN_RISE_SET           0x87
 160 #define OTHER_INT_EN_RISE_CLR           0x88
 161 #define OTHER_INT_EN_FALL               0x89
 162 #define OTHER_INT_EN_FALL_SET           0x8A
 163 #define OTHER_INT_EN_FALL_CLR           0x8B
 164 #define OTHER_INT_STS                   0x8C
 165 #define OTHER_INT_LATCH                 0x8D
 166 #define OTHER_INT_VB_SESS_VLD           (1 << 7)
 167 #define OTHER_INT_DM_HI                 (1 << 6) /* not valid for "latch" reg */
 168 #define OTHER_INT_DP_HI                 (1 << 5) /* not valid for "latch" reg */
 169 #define OTHER_INT_BDIS_ACON             (1 << 3) /* not valid for "fall" regs */
 170 #define OTHER_INT_MANU                  (1 << 1)
 171 #define OTHER_INT_ABNORMAL_STRESS       (1 << 0)
 172
 173 #define ID_STATUS                       0x96
 174 #define ID_RES_FLOAT                    (1 << 4)
 175 #define ID_RES_440K                     (1 << 3)
 176 #define ID_RES_200K                     (1 << 2)
 177 #define ID_RES_102K                     (1 << 1)
 178 #define ID_RES_GND                      (1 << 0)
 179
 180 #define POWER_CTRL                      0xAC
 181 #define POWER_CTRL_SET                  0xAD
 182 #define POWER_CTRL_CLR                  0xAE
 183 #define POWER_CTRL_OTG_ENAB             (1 << 5)
 184
 185 #define OTHER_IFC_CTRL2                 0xAF
 186 #define OTHER_IFC_CTRL2_SET             0xB0
 187 #define OTHER_IFC_CTRL2_CLR             0xB1
 188 #define OTHER_IFC_CTRL2_ULPI_STP_LOW    (1 << 4)
 189 #define OTHER_IFC_CTRL2_ULPI_TXEN_POL   (1 << 3)
 190 #define OTHER_IFC_CTRL2_ULPI_4PIN_2430  (1 << 2)
 191 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_MASK     (3 << 0) /* bits 0 and 1 */
 192 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT1N    (0 << 0)
 193 #define OTHER_IFC_CTRL2_USB_INT_OUTSEL_INT2N    (1 << 0)
 194
 195 #define REG_CTRL_EN                     0xB2
 196 #define REG_CTRL_EN_SET                 0xB3
 197 #define REG_CTRL_EN_CLR                 0xB4
 198 #define REG_CTRL_ERROR                  0xB5
 199 #define ULPI_I2C_CONFLICT_INTEN         (1 << 0)
 200
 201 #define OTHER_FUNC_CTRL2                0xB8
 202 #define OTHER_FUNC_CTRL2_SET            0xB9
 203 #define OTHER_FUNC_CTRL2_CLR            0xBA
 204 #define OTHER_FUNC_CTRL2_VBAT_TIMER_EN  (1 << 0)
 205
 206 /* following registers do not have separate _clr and _set registers */
 207 #define VBUS_DEBOUNCE                   0xC0
 208 #define ID_DEBOUNCE                     0xC1
 209 #define VBAT_TIMER                      0xD3
 210 #define PHY_PWR_CTRL                    0xFD
 211 #define PHY_PWR_PHYPWD                  (1 << 0)
 212 #define PHY_CLK_CTRL                    0xFE
 213 #define PHY_CLK_CTRL_CLOCKGATING_EN     (1 << 2)
 214 #define PHY_CLK_CTRL_CLK32K_EN          (1 << 1)
 215 #define REQ_PHY_DPLL_CLK                (1 << 0)
 216 #define PHY_CLK_CTRL_STS                0xFF
 217 #define PHY_DPLL_CLK                    (1 << 0)
 218
 219 /* In module TWL4030_MODULE_PM_MASTER */
 220 #define PROTECT_KEY                     0x0E
 221
 222 /* In module TWL4030_MODULE_PM_RECEIVER */
 223 #define VUSB_DEDICATED1                 0x7D
 224 #define VUSB_DEDICATED2                 0x7E
 225 #define VUSB1V5_DEV_GRP                 0x71
 226 #define VUSB1V5_TYPE                    0x72
 227 #define VUSB1V5_REMAP                   0x73
 228 #define VUSB1V8_DEV_GRP                 0x74
 229 #define VUSB1V8_TYPE                    0x75
 230 #define VUSB1V8_REMAP                   0x76
 231 #define VUSB3V1_DEV_GRP                 0x77
 232 #define VUSB3V1_TYPE                    0x78
 233 #define VUSB3V1_REMAP                   0x79
 234
 235 /* In module TWL4030_MODULE_INTBR */
 236 #define PMBR1                           0x0D
 237 #define GPIO_USB_4PIN_ULPI_2430C        (3 << 0)
 238
 239 /* In module TWL4030_MODULE_INT */
 240 #define REG_PWR_EDR1                    0x05
 241 #define USB_PRES_FALLING                (1 << 4)
 242 #define USB_PRES_RISING                 (1 << 5)
 243
 244 /* bits in OTG_CTRL */
 245 #define OTG_XCEIV_OUTPUTS \
 246         (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID)
 247 #define OTG_XCEIV_INPUTS \
 248         (OTG_PULLDOWN|OTG_PULLUP|OTG_DRV_VBUS|OTG_PD_VBUS|OTG_PU_VBUS|OTG_PU_ID)
 249 #define OTG_CTRL_BITS \
 250         (OTG_A_BUSREQ|OTG_A_SETB_HNPEN|OTG_B_BUSREQ|OTG_B_HNPEN|OTG_BUSDROP)
 251         /* and OTG_PULLUP is sometimes written */
 252
 253 #define OTG_CTRL_MASK   (OTG_DRIVER_SEL| \
 254         OTG_XCEIV_OUTPUTS|OTG_XCEIV_INPUTS| \
 255         OTG_CTRL_BITS)
 256
 257
 258 struct twl4030_usb {
 259         struct work_struct      irq_work;
 260         struct otg_transceiver  otg;
 261         struct device           *dev;
 262
 263         /* for vbus reporting with irqs disabled */
 264         spinlock_t              lock;
 265
 266         /* pin configuration */
 267         enum twl4030_usb_mode   usb_mode;
 268
 269         unsigned                vbus:1;
 270         int                     irq;
 271         u8                      asleep;
 272         bool                    irq_enabled;
 273 };
 274
 275 /* internal define on top of container_of */
 276 #define xceiv_to_twl(x)         container_of((x), struct twl4030_usb, otg);
 277
 278 /*-------------------------------------------------------------------------*/
 279
 280 static int twl4030_i2c_write_u8_verify(struct twl4030_usb *twl,
 281                 u8 module, u8 data, u8 address)
 282 {
 283         u8 check;
 284
 285         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 286             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 287                                                 (check == data))
 288                 return 0;
 289         /* Failed once: Try again */
 290         if ((twl4030_i2c_write_u8(module, data, address) >= 0) &&
 291             (twl4030_i2c_read_u8(module, &check, address) >= 0) &&
 292                                                 (check == data))
 293                 return 0;
 294         /* Failed again: Return error */
 295
 296         return -EBUSY;
 297 }
 298
 299 #define twl4030_usb_write_verify(twl, address, data)    \
 300         twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_USB, (data), (address))
 301
 302 static inline int twl4030_usb_write(struct twl4030_usb *twl,
 303                 u8 address, u8 data)
 304 {
 305         int ret = 0;
 306
 307         ret = twl4030_i2c_write_u8(TWL4030_MODULE_USB, data, address);
 308         if (ret >= 0) {
 309 #if 0   /* debug */
 310                 u8 data1;
 311                 if (twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data1,
 312                                         address) < 0)
 313                         dev_err(twl->dev, "re-read failed\n");
 314                 else
 315                         dev_dbg(twl->dev,
 316                                "Write %s wrote %x read %x from reg %x\n",
 317                                (data1 == data) ? "succeed" : "mismatch",
 318                                data, data1, address);
 319 #endif
 320         } else {
 321                 dev_warn(twl->dev,
 322                         "TWL4030:USB:Write[0x%x] Error %d\n", address, ret);
 323         }
 324
 325         return ret;
 326 }
 327
 328 static inline int twl4030_usb_read(struct twl4030_usb *twl, u8 address)
 329 {
 330         u8 data;
 331         int ret = 0;
 332
 333         ret = twl4030_i2c_read_u8(TWL4030_MODULE_USB, &data, address);
 334         if (ret >= 0)
 335                 ret = data;
 336         else
 337                 dev_warn(twl->dev,
 338                         "TWL4030:USB:Read[0x%x] Error %d\n", address, ret);
 339
 340         return ret;
 341 }
 342
 343 /*-------------------------------------------------------------------------*/
 344
 345 static inline int
 346 twl4030_usb_set_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 347 {
 348         return twl4030_usb_write(twl, reg + 1, bits);
 349 }
 350
 351 static inline int
 352 twl4030_usb_clear_bits(struct twl4030_usb *twl, u8 reg, u8 bits)
 353 {
 354         return twl4030_usb_write(twl, reg + 2, bits);
 355 }
 356
 357 /*-------------------------------------------------------------------------*/
 358
 359 static void twl4030_usb_set_mode(struct twl4030_usb *twl, int mode)
 360 {
 361         twl->usb_mode = mode;
 362
 363         switch (mode) {
 364         case T2_USB_MODE_ULPI:
 365                 twl4030_usb_clear_bits(twl, IFC_CTRL, IFC_CTRL_CARKITMODE);
 366                 twl4030_usb_set_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 367                 twl4030_usb_clear_bits(twl, FUNC_CTRL,
 368                                         FUNC_CTRL_XCVRSELECT_MASK |
 369                                         FUNC_CTRL_OPMODE_MASK);
 370                 break;
 371 /*
 372         case T2_USB_MODE_CEA2011_3PIN:
 373                 twl4030_cea2011_3_pin_FS_setup(twl);
 374                 break;
 375 */
 376         default:
 377                 /* FIXME: power on defaults */
 378                 break;
 379         };
 380 }
 381
 382 static void twl4030_i2c_access(struct twl4030_usb *twl, int on)
 383 {
 384         unsigned long timeout;
 385         int val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 386
 387         if (val >= 0) {
 388                 if (on) {
 389                         /* enable DPLL to access PHY registers over I2C */
 390                         val |= REQ_PHY_DPLL_CLK;
 391                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 392                                                 (u8)val) < 0);
 393
 394                         timeout = jiffies + HZ;
 395                         while (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 396                                                         PHY_DPLL_CLK)
 397                                 && time_before(jiffies, timeout))
 398                                         udelay(10);
 399                         if (!(twl4030_usb_read(twl, PHY_CLK_CTRL_STS) &
 400                                                         PHY_DPLL_CLK))
 401                                 dev_err(twl->dev, "Timeout setting T2 HSUSB "
 402                                                 "PHY DPLL clock\n");
 403                 } else {
 404                         /* let ULPI control the DPLL clock */
 405                         val &= ~REQ_PHY_DPLL_CLK;
 406                         WARN_ON(twl4030_usb_write_verify(twl, PHY_CLK_CTRL,
 407                                                 (u8)val) < 0);
 408                 }
 409         }
 410 }
 411
 412 static void usb_irq_enable(struct twl4030_usb *twl, int rising, int falling)
 413 {
 414         u8 val;
 415
 416         /* FIXME use set_irq_type(...) when that (soon) works */
 417
 418         /* edge setup */
 419         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 420                                 &val, REG_PWR_EDR1) < 0);
 421
 422         val &= ~(USB_PRES_RISING | USB_PRES_FALLING);
 423         if (rising)
 424                 val = val | USB_PRES_RISING;
 425         if (falling)
 426                 val = val | USB_PRES_FALLING;
 427         WARN_ON(twl4030_i2c_write_u8_verify(twl, TWL4030_MODULE_INT,
 428                                 val, REG_PWR_EDR1) < 0);
 429
 430         if (!twl->irq_enabled) {
 431                 enable_irq(twl->irq);
 432                 twl->irq_enabled = true;
 433         }
 434 }
 435
 436 static void usb_irq_disable(struct twl4030_usb *twl)
 437 {
 438         if (twl->irq_enabled) {
 439                 disable_irq(twl->irq);
 440                 twl->irq_enabled = false;
 441         }
 442 }
 443
 444 static void twl4030_phy_power(struct twl4030_usb *twl, int on)
 445 {
 446         u8 pwr;
 447
 448         pwr = twl4030_usb_read(twl, PHY_PWR_CTRL);
 449         if (on) {
 450                 pwr &= ~PHY_PWR_PHYPWD;
 451                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 452                 twl4030_usb_write(twl, PHY_CLK_CTRL,
 453                                   twl4030_usb_read(twl, PHY_CLK_CTRL) |
 454                                         (PHY_CLK_CTRL_CLOCKGATING_EN |
 455                                                 PHY_CLK_CTRL_CLK32K_EN));
 456         } else  {
 457                 pwr |= PHY_PWR_PHYPWD;
 458                 WARN_ON(twl4030_usb_write_verify(twl, PHY_PWR_CTRL, pwr) < 0);
 459         }
 460 }
 461
 462 static void twl4030_phy_suspend(struct twl4030_usb *twl, int controller_off)
 463 {
 464         if (controller_off)
 465                 usb_irq_disable(twl);
 466
 467         if (twl->asleep)
 468                 return;
 469
 470         if (!controller_off)
 471                 /* enable rising edge interrupt to detect cable attach */
 472                 usb_irq_enable(twl, 1, 0);
 473
 474         twl4030_phy_power(twl, 0);
 475         twl->asleep = 1;
 476 }
 477
 478 static void twl4030_phy_resume(struct twl4030_usb *twl)
 479 {
 480         if (!twl->asleep)
 481                 return;
 482
 483         /* enable falling edge interrupt to detect cable detach */
 484         usb_irq_enable(twl, 0, 1);
 485
 486         twl4030_phy_power(twl, 1);
 487         twl4030_i2c_access(twl, 1);
 488         twl4030_usb_set_mode(twl, twl->usb_mode);
 489         if (twl->usb_mode == T2_USB_MODE_ULPI)
 490                 twl4030_i2c_access(twl, 0);
 491         twl->asleep = 0;
 492 }
 493
 494 static void twl4030_usb_ldo_init(struct twl4030_usb *twl)
 495 {
 496         /* Enable writing to power configuration registers */
 497         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0xC0, PROTECT_KEY);
 498         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0x0C, PROTECT_KEY);
 499
 500         /* put VUSB3V1 LDO in active state */
 501         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB_DEDICATED2);
 502
 503         /* input to VUSB3V1 LDO is from VBAT, not VBUS */
 504         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x14, VUSB_DEDICATED1);
 505
 506         /* turn on 3.1V regulator */
 507         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB3V1_DEV_GRP);
 508         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB3V1_TYPE);
 509
 510         /* turn on 1.5V regulator */
 511         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V5_DEV_GRP);
 512         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V5_TYPE);
 513
 514         /* turn on 1.8V regulator */
 515         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0x20, VUSB1V8_DEV_GRP);
 516         twl4030_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, 0, VUSB1V8_TYPE);
 517
 518         /* disable access to power configuration registers */
 519         twl4030_i2c_write_u8(TWL4030_MODULE_PM_MASTER, 0, PROTECT_KEY);
 520 }
 521
 522 static ssize_t twl4030_usb_vbus_show(struct device *dev,
 523                 struct device_attribute *attr, char *buf)
 524 {
 525         struct twl4030_usb *twl = dev_get_drvdata(dev);
 526         unsigned long flags;
 527         int ret = -EINVAL;
 528
 529         spin_lock_irqsave(&twl->lock, flags);
 530         ret = sprintf(buf, "%s\n", twl->vbus ? "on" : "off");
 531         spin_unlock_irqrestore(&twl->lock, flags);
 532
 533         return ret;
 534 }
 535 static DEVICE_ATTR(vbus, 0444, twl4030_usb_vbus_show, NULL);
 536
 537 static void twl4030_usb_irq_work(struct work_struct *work)
 538 {
 539         struct twl4030_usb *twl = container_of(work,
 540                         struct twl4030_usb, irq_work);
 541
 542         sysfs_notify(&twl->dev->kobj, NULL, "vbus");
 543 }
 544
 545 static irqreturn_t twl4030_usb_irq(int irq, void *_twl)
 546 {
 547         struct twl4030_usb *twl = _twl;
 548         u8 val;
 549
 550 #ifdef CONFIG_LOCKDEP
 551         /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
 552          * we don't want and can't tolerate.  Although it might be
 553          * friendlier not to borrow this thread context...
 554          */
 555         local_irq_enable();
 556 #endif
 557
 558         /* FIXME stop accessing PWR_EDR1 ... if nothing else, we
 559          * know which edges we told the IRQ to trigger on.  And
 560          * there seem to be OTG_specific registers and irqs that
 561          * provide the right info without guessing like this:
 562          * USB_INT_STS, ID_STATUS, STS_HW_CONDITIONS, etc.
 563          */
 564
 565         /* action based on cable attach or detach */
 566         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 567                                 &val, REG_PWR_EDR1) < 0);
 568
 569         if (val & USB_PRES_RISING) {
 570                 twl4030_phy_resume(twl);
 571                 twl4030charger_usb_en(1);
 572                 twl->vbus = 1;
 573         } else {
 574                 twl4030charger_usb_en(0);
 575                 twl->vbus = 0;
 576                 twl4030_phy_suspend(twl, 0);
 577         }
 578         schedule_work(&twl->irq_work);
 579
 580         return IRQ_HANDLED;
 581 }
 582
 583 static int twl4030_set_suspend(struct otg_transceiver *x, int suspend)
 584 {
 585         struct twl4030_usb *twl = xceiv_to_twl(x);
 586
 587         if (suspend)
 588                 twl4030_phy_suspend(twl, 1);
 589         else
 590                 twl4030_phy_resume(twl);
 591
 592         return 0;
 593 }
 594
 595 static int twl4030_set_peripheral(struct otg_transceiver *x,
 596                 struct usb_gadget *gadget)
 597 {
 598         struct twl4030_usb *twl;
 599         u32 l;
 600
 601         if (!x)
 602                 return -ENODEV;
 603
 604         twl = xceiv_to_twl(x);
 605
 606         if (!gadget) {
 607                 omap_writew(0, OTG_IRQ_EN);
 608                 twl4030_phy_suspend(twl, 1);
 609                 twl->otg.gadget = NULL;
 610
 611                 return -ENODEV;
 612         }
 613
 614         twl->otg.gadget = gadget;
 615         twl4030_phy_resume(twl);
 616
 617         l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK;
 618         l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS);
 619         l |= OTG_ID;
 620         omap_writel(l, OTG_CTRL);
 621
 622         twl->otg.state = OTG_STATE_B_IDLE;
 623
 624         twl4030_usb_set_bits(twl, USB_INT_EN_RISE,
 625                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 626         twl4030_usb_set_bits(twl, USB_INT_EN_FALL,
 627                         USB_INT_SESSVALID | USB_INT_VBUSVALID);
 628
 629         return 0;
 630 }
 631
 632 static int twl4030_set_host(struct otg_transceiver *x, struct usb_bus *host)
 633 {
 634         struct twl4030_usb *twl;
 635
 636         if (!x)
 637                 return -ENODEV;
 638
 639         twl = xceiv_to_twl(x);
 640
 641         if (!host) {
 642                 omap_writew(0, OTG_IRQ_EN);
 643                 twl4030_phy_suspend(twl, 1);
 644                 twl->otg.host = NULL;
 645
 646                 return -ENODEV;
 647         }
 648
 649         twl->otg.host = host;
 650         twl4030_phy_resume(twl);
 651
 652         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL,
 653                         TWL4030_OTG_CTRL_DMPULLDOWN
 654                                 | TWL4030_OTG_CTRL_DPPULLDOWN);
 655         twl4030_usb_set_bits(twl, USB_INT_EN_RISE, USB_INT_IDGND);
 656         twl4030_usb_set_bits(twl, USB_INT_EN_FALL, USB_INT_IDGND);
 657         twl4030_usb_set_bits(twl, FUNC_CTRL, FUNC_CTRL_SUSPENDM);
 658         twl4030_usb_set_bits(twl, TWL4030_OTG_CTRL, TWL4030_OTG_CTRL_DRVVBUS);
 659
 660         return 0;
 661 }
 662
 663 static int __init twl4030_usb_probe(struct platform_device *pdev)
 664 {
 665         struct twl4030_usb_data *pdata = pdev->dev.platform_data;
 666         struct twl4030_usb      *twl;
 667         int status;
 668         u8                      vbus;
 669
 670         twl = kzalloc(sizeof *twl, GFP_KERNEL);
 671         if (!twl)
 672                 return -ENOMEM;
 673
 674         if (!pdata) {
 675                 dev_info(&pdev->dev, "platform_data not available\n");
 676                 return -EINVAL;
 677         }
 678
 679         WARN_ON(twl4030_i2c_read_u8(TWL4030_MODULE_INT,
 680                                 &vbus, REG_PWR_EDR1) < 0);
 681         vbus &= USB_PRES_RISING;
 682
 683         twl->dev                = &pdev->dev;
 684         twl->irq                = platform_get_irq(pdev, 0);
 685         twl->otg.set_host       = twl4030_set_host;
 686         twl->otg.set_peripheral = twl4030_set_peripheral;
 687         twl->otg.set_suspend    = twl4030_set_suspend;
 688         twl->usb_mode           = pdata->usb_mode;
 689         twl->vbus               = vbus ? 1 : 0;
 690
 691         /* init spinlock for workqueue */
 692         spin_lock_init(&twl->lock);
 693
 694         /* init irq workqueue before request_irq */
 695         INIT_WORK(&twl->irq_work, twl4030_usb_irq_work);
 696
 697         twl->irq_enabled = true;
 698         status = request_irq(twl->irq, twl4030_usb_irq, 0, "twl4030_usb", twl);
 699         if (status < 0) {
 700                 dev_dbg(&pdev->dev, "can't get IRQ %d, err %d\n",
 701                         twl->irq, status);
 702                 kfree(twl);
 703                 return status;
 704         }
 705
 706         twl4030_usb_ldo_init(twl);
 707         twl4030_phy_power(twl, 1);
 708         twl4030_i2c_access(twl, 1);
 709         twl4030_usb_set_mode(twl, twl->usb_mode);
 710
 711         twl->asleep = 0;
 712
 713         if (twl->usb_mode == T2_USB_MODE_ULPI) {
 714                 twl4030_i2c_access(twl, 0);
 715                 twl4030_phy_suspend(twl, 0);
 716         }
 717
 718         otg_set_transceiver(&twl->otg);
 719         platform_set_drvdata(pdev, twl);
 720         dev_info(&pdev->dev, "Initialized TWL4030 USB module\n");
 721
 722         if (device_create_file(&pdev->dev, &dev_attr_vbus))
 723                 dev_warn(&pdev->dev, "could not create sysfs file\n");
 724
 725         return 0;
 726 }
 727
 728 static int __exit twl4030_usb_remove(struct platform_device *pdev)
 729 {
 730         struct twl4030_usb *twl = platform_get_drvdata(pdev);
 731         int val;
 732
 733         usb_irq_disable(twl);
 734         free_irq(twl->irq, twl);
 735         device_remove_file(twl->dev, &dev_attr_vbus);
 736
 737         /* set transceiver mode to power on defaults */
 738         twl4030_usb_set_mode(twl, -1);
 739
 740         /* autogate 60MHz ULPI clock,
 741          * clear dpll clock request for i2c access,
 742          * disable 32KHz
 743          */
 744         val = twl4030_usb_read(twl, PHY_CLK_CTRL);
 745         if (val >= 0) {
 746                 val |= PHY_CLK_CTRL_CLOCKGATING_EN;
 747                 val &= ~(PHY_CLK_CTRL_CLK32K_EN | REQ_PHY_DPLL_CLK);
 748                 twl4030_usb_write(twl, PHY_CLK_CTRL, (u8)val);
 749         }
 750
 751         /* disable complete OTG block */
 752         twl4030_usb_clear_bits(twl, POWER_CTRL, POWER_CTRL_OTG_ENAB);
 753
 754         twl4030_phy_power(twl, 0);
 755
 756         kfree(twl);
 757
 758         return 0;
 759 }
 760
 761 static struct platform_driver twl4030_driver = {
 762         .probe          = twl4030_usb_probe,
 763         .remove         = __exit_p(twl4030_remove),
 764         .driver         = {
 765                 .name   = "twl4030_usb",
 766                 .owner  = THIS_MODULE,
 767         },
 768 };
 769
 770 static int __init twl4030_usb_init(void)
 771 {
 772         return platform_driver_register(&twl4030_driver);
 773 }
 774 subsys_initcall(twl4030_usb_init);
 775
 776 static void __exit twl4030_usb_exit(void)
 777 {
 778         platform_driver_unregister(&twl4030_driver);
 779 }
 780 module_exit(twl4030_usb_exit);
 781
 782 MODULE_ALIAS("platform:twl4030_usb");
 783 MODULE_AUTHOR("Texas Instruments, Inc, Nokia Corporation");
 784 MODULE_DESCRIPTION("TWL4030 USB transceiver driver");
 785 MODULE_LICENSE("GPL");