PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+26)
#define PVRSRV_BRIDGE_RELEASE_MMAP_DATA \
PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+26)
#define PVRSRV_BRIDGE_RELEASE_MMAP_DATA \
PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
#define PVRSRV_BRIDGE_CACHE_FLUSH_DRM \
PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
#define PVRSRV_BRIDGE_CORE_CMD_LAST \
(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
#define PVRSRV_BRIDGE_CACHE_FLUSH_DRM \
PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
#define PVRSRV_BRIDGE_CORE_CMD_LAST \
(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
#define PVRSRV_BRIDGE_SIM_CMD_FIRST \
(PVRSRV_BRIDGE_CORE_CMD_LAST+1)
#define PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT \
#define PVRSRV_BRIDGE_SIM_CMD_FIRST \
(PVRSRV_BRIDGE_CORE_CMD_LAST+1)
#define PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT \