1 /**********************************************************************
3 * Copyright(c) 2008 Imagination Technologies Ltd. All rights reserved.
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
9 * This program is distributed in the hope it will be useful but, except
10 * as otherwise stated in writing, without any warranty; without even the
11 * implied warranty of merchantability or fitness for a particular purpose.
12 * See the GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
21 * Contact Information:
22 * Imagination Technologies Ltd. <gpl-support@imgtec.com>
23 * Home Park Estate, Kings Langley, Herts, WD4 8LZ, UK
25 ******************************************************************************/
27 #ifndef __PVR_BRIDGE_H__
28 #define __PVR_BRIDGE_H__
31 #include "servicesint.h"
34 #include <linux/ioctl.h>
36 #define PVRSRV_IOC_GID 'g'
37 #define PVRSRV_IO(INDEX) \
38 _IO(PVRSRV_IOC_GID, INDEX, struct PVRSRV_BRIDGE_PACKAGE)
39 #define PVRSRV_IOW(INDEX) \
40 _IOW(PVRSRV_IOC_GID, INDEX, struct PVRSRV_BRIDGE_PACKAGE)
41 #define PVRSRV_IOR(INDEX) \
42 _IOR(PVRSRV_IOC_GID, INDEX, struct PVRSRV_BRIDGE_PACKAGE)
43 #define PVRSRV_IOWR(INDEX) \
44 _IOWR(PVRSRV_IOC_GID, INDEX, struct PVRSRV_BRIDGE_PACKAGE)
47 #define PVRSRV_BRIDGE_CORE_CMD_FIRST 0
48 #define PVRSRV_BRIDGE_ENUM_DEVICES \
49 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+0)
50 #define PVRSRV_BRIDGE_ACQUIRE_DEVICEINFO \
51 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+1)
52 #define PVRSRV_BRIDGE_RELEASE_DEVICEINFO \
53 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+2)
54 #define PVRSRV_BRIDGE_CREATE_DEVMEMCONTEXT \
55 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+3)
56 #define PVRSRV_BRIDGE_DESTROY_DEVMEMCONTEXT \
57 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+4)
58 #define PVRSRV_BRIDGE_GET_DEVMEM_HEAPINFO \
59 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+5)
60 #define PVRSRV_BRIDGE_ALLOC_DEVICEMEM \
61 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+6)
62 #define PVRSRV_BRIDGE_FREE_DEVICEMEM \
63 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+7)
64 #define PVRSRV_BRIDGE_GETFREE_DEVICEMEM \
65 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+8)
66 #define PVRSRV_BRIDGE_CREATE_COMMANDQUEUE \
67 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+9)
68 #define PVRSRV_BRIDGE_DESTROY_COMMANDQUEUE \
69 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+10)
70 #define PVRSRV_BRIDGE_MHANDLE_TO_MMAP_DATA \
71 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+11)
72 #define PVRSRV_BRIDGE_CONNECT_SERVICES \
73 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+12)
74 #define PVRSRV_BRIDGE_DISCONNECT_SERVICES \
75 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+13)
76 #define PVRSRV_BRIDGE_WRAP_DEVICE_MEM \
77 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+14)
78 #define PVRSRV_BRIDGE_GET_DEVICEMEMINFO \
79 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+15)
80 #define PVRSRV_BRIDGE_RESERVE_DEV_VIRTMEM \
81 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+16)
82 #define PVRSRV_BRIDGE_FREE_DEV_VIRTMEM \
83 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+17)
84 #define PVRSRV_BRIDGE_MAP_EXT_MEMORY \
85 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+18)
86 #define PVRSRV_BRIDGE_UNMAP_EXT_MEMORY \
87 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+19)
88 #define PVRSRV_BRIDGE_MAP_DEV_MEMORY \
89 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+20)
90 #define PVRSRV_BRIDGE_UNMAP_DEV_MEMORY \
91 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+21)
92 #define PVRSRV_BRIDGE_MAP_DEVICECLASS_MEMORY \
93 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+22)
94 #define PVRSRV_BRIDGE_UNMAP_DEVICECLASS_MEMORY \
95 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+23)
96 #define PVRSRV_BRIDGE_MAP_MEM_INFO_TO_USER \
97 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+24)
98 #define PVRSRV_BRIDGE_UNMAP_MEM_INFO_FROM_USER \
99 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+25)
100 #define PVRSRV_BRIDGE_EXPORT_DEVICEMEM \
101 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+26)
102 #define PVRSRV_BRIDGE_RELEASE_MMAP_DATA \
103 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
105 #define PVRSRV_BRIDGE_CACHE_FLUSH_DRM \
106 PVRSRV_IOWR(PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
107 #define PVRSRV_BRIDGE_CORE_CMD_LAST \
108 (PVRSRV_BRIDGE_CORE_CMD_FIRST+28)
110 #define PVRSRV_BRIDGE_CORE_CMD_LAST \
111 (PVRSRV_BRIDGE_CORE_CMD_FIRST+27)
113 #define PVRSRV_BRIDGE_SIM_CMD_FIRST \
114 (PVRSRV_BRIDGE_CORE_CMD_LAST+1)
115 #define PVRSRV_BRIDGE_PROCESS_SIMISR_EVENT \
116 PVRSRV_IOWR(PVRSRV_BRIDGE_SIM_CMD_FIRST+0)
117 #define PVRSRV_BRIDGE_REGISTER_SIM_PROCESS \
118 PVRSRV_IOWR(PVRSRV_BRIDGE_SIM_CMD_FIRST+1)
119 #define PVRSRV_BRIDGE_UNREGISTER_SIM_PROCESS \
120 PVRSRV_IOWR(PVRSRV_BRIDGE_SIM_CMD_FIRST+2)
121 #define PVRSRV_BRIDGE_SIM_CMD_LAST \
122 (PVRSRV_BRIDGE_SIM_CMD_FIRST+2)
124 #define PVRSRV_BRIDGE_MAPPING_CMD_FIRST \
125 (PVRSRV_BRIDGE_SIM_CMD_LAST+1)
126 #define PVRSRV_BRIDGE_MAPPHYSTOUSERSPACE \
127 PVRSRV_IOWR(PVRSRV_BRIDGE_MAPPING_CMD_FIRST+0)
128 #define PVRSRV_BRIDGE_UNMAPPHYSTOUSERSPACE \
129 PVRSRV_IOWR(PVRSRV_BRIDGE_MAPPING_CMD_FIRST+1)
130 #define PVRSRV_BRIDGE_GETPHYSTOUSERSPACEMAP \
131 PVRSRV_IOWR(PVRSRV_BRIDGE_MAPPING_CMD_FIRST+2)
132 #define PVRSRV_BRIDGE_MAPPING_CMD_LAST \
133 (PVRSRV_BRIDGE_MAPPING_CMD_FIRST+2)
135 #define PVRSRV_BRIDGE_STATS_CMD_FIRST \
136 (PVRSRV_BRIDGE_MAPPING_CMD_LAST+1)
137 #define PVRSRV_BRIDGE_GET_FB_STATS \
138 PVRSRV_IOWR(PVRSRV_BRIDGE_STATS_CMD_FIRST+0)
139 #define PVRSRV_BRIDGE_STATS_CMD_LAST \
140 (PVRSRV_BRIDGE_STATS_CMD_FIRST+0)
142 #define PVRSRV_BRIDGE_MISC_CMD_FIRST \
143 (PVRSRV_BRIDGE_STATS_CMD_LAST+1)
144 #define PVRSRV_BRIDGE_GET_MISC_INFO \
145 PVRSRV_IOWR(PVRSRV_BRIDGE_MISC_CMD_FIRST+0)
146 #define PVRSRV_BRIDGE_RELEASE_MISC_INFO \
147 PVRSRV_IOWR(PVRSRV_BRIDGE_MISC_CMD_FIRST+1)
148 #define PVRSRV_BRIDGE_MISC_CMD_LAST \
149 (PVRSRV_BRIDGE_MISC_CMD_FIRST+1)
151 #define PVRSRV_BRIDGE_OVERLAY_CMD_FIRST \
152 (PVRSRV_BRIDGE_MISC_CMD_LAST+1)
153 #define PVRSRV_BRIDGE_OVERLAY_CMD_LAST \
154 (PVRSRV_BRIDGE_OVERLAY_CMD_FIRST+1)
158 #define PVRSRV_BRIDGE_OEM_CMD_FIRST \
159 (PVRSRV_BRIDGE_OVERLAY_CMD_LAST+1)
160 #define PVRSRV_BRIDGE_GET_OEMJTABLE \
161 PVRSRV_IOWR(PVRSRV_BRIDGE_OEM_CMD_FIRST+0)
162 #define PVRSRV_BRIDGE_OEM_CMD_LAST \
163 (PVRSRV_BRIDGE_OEM_CMD_FIRST+0)
165 #define PVRSRV_BRIDGE_DEVCLASS_CMD_FIRST \
166 (PVRSRV_BRIDGE_OEM_CMD_LAST+1)
167 #define PVRSRV_BRIDGE_ENUM_CLASS \
168 PVRSRV_IOWR(PVRSRV_BRIDGE_DEVCLASS_CMD_FIRST+0)
169 #define PVRSRV_BRIDGE_DEVCLASS_CMD_LAST \
170 (PVRSRV_BRIDGE_DEVCLASS_CMD_FIRST+0)
172 #define PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST \
173 (PVRSRV_BRIDGE_DEVCLASS_CMD_LAST+1)
174 #define PVRSRV_BRIDGE_OPEN_DISPCLASS_DEVICE \
175 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+0)
176 #define PVRSRV_BRIDGE_CLOSE_DISPCLASS_DEVICE \
177 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+1)
178 #define PVRSRV_BRIDGE_ENUM_DISPCLASS_FORMATS \
179 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+2)
180 #define PVRSRV_BRIDGE_ENUM_DISPCLASS_DIMS \
181 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+3)
182 #define PVRSRV_BRIDGE_GET_DISPCLASS_SYSBUFFER \
183 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+4)
184 #define PVRSRV_BRIDGE_GET_DISPCLASS_INFO \
185 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+5)
186 #define PVRSRV_BRIDGE_CREATE_DISPCLASS_SWAPCHAIN \
187 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+6)
188 #define PVRSRV_BRIDGE_DESTROY_DISPCLASS_SWAPCHAIN \
189 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+7)
190 #define PVRSRV_BRIDGE_SET_DISPCLASS_DSTRECT \
191 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+8)
192 #define PVRSRV_BRIDGE_SET_DISPCLASS_SRCRECT \
193 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+9)
194 #define PVRSRV_BRIDGE_SET_DISPCLASS_DSTCOLOURKEY \
195 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+10)
196 #define PVRSRV_BRIDGE_SET_DISPCLASS_SRCCOLOURKEY \
197 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+11)
198 #define PVRSRV_BRIDGE_GET_DISPCLASS_BUFFERS \
199 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+12)
200 #define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_BUFFER \
201 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+13)
202 #define PVRSRV_BRIDGE_SWAP_DISPCLASS_TO_SYSTEM \
203 PVRSRV_IOWR(PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14)
204 #define PVRSRV_BRIDGE_DISPCLASS_CMD_LAST \
205 (PVRSRV_BRIDGE_DISPCLASS_CMD_FIRST+14)
207 #define PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST \
208 (PVRSRV_BRIDGE_DISPCLASS_CMD_LAST+1)
209 #define PVRSRV_BRIDGE_OPEN_BUFFERCLASS_DEVICE \
210 PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+0)
211 #define PVRSRV_BRIDGE_CLOSE_BUFFERCLASS_DEVICE \
212 PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+1)
213 #define PVRSRV_BRIDGE_GET_BUFFERCLASS_INFO \
214 PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+2)
215 #define PVRSRV_BRIDGE_GET_BUFFERCLASS_BUFFER \
216 PVRSRV_IOWR(PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+3)
217 #define PVRSRV_BRIDGE_BUFCLASS_CMD_LAST \
218 (PVRSRV_BRIDGE_BUFCLASS_CMD_FIRST+3)
220 #define PVRSRV_BRIDGE_WRAP_CMD_FIRST \
221 (PVRSRV_BRIDGE_BUFCLASS_CMD_LAST+1)
222 #define PVRSRV_BRIDGE_WRAP_EXT_MEMORY \
223 PVRSRV_IOWR(PVRSRV_BRIDGE_WRAP_CMD_FIRST+0)
224 #define PVRSRV_BRIDGE_UNWRAP_EXT_MEMORY \
225 PVRSRV_IOWR(PVRSRV_BRIDGE_WRAP_CMD_FIRST+1)
226 #define PVRSRV_BRIDGE_WRAP_CMD_LAST \
227 (PVRSRV_BRIDGE_WRAP_CMD_FIRST+1)
229 #define PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST \
230 (PVRSRV_BRIDGE_WRAP_CMD_LAST+1)
231 #define PVRSRV_BRIDGE_ALLOC_SHARED_SYS_MEM \
232 PVRSRV_IOWR(PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST+0)
233 #define PVRSRV_BRIDGE_FREE_SHARED_SYS_MEM \
234 PVRSRV_IOWR(PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST+1)
235 #define PVRSRV_BRIDGE_MAP_MEMINFO_MEM \
236 PVRSRV_IOWR(PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST+2)
237 #define PVRSRV_BRIDGE_UNMAP_MEMINFO_MEM \
238 PVRSRV_IOWR(PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST+3)
239 #define PVRSRV_BRIDGE_SHAREDMEM_CMD_LAST \
240 (PVRSRV_BRIDGE_SHAREDMEM_CMD_FIRST+3)
242 #define PVRSRV_BRIDGE_SERVICES4_TMP_CMD_FIRST \
243 (PVRSRV_BRIDGE_SHAREDMEM_CMD_LAST+1)
244 #define PVRSRV_BRIDGE_GETMMU_PD_DEVPADDR \
245 PVRSRV_IOWR(PVRSRV_BRIDGE_SERVICES4_TMP_CMD_FIRST+0)
246 #define PVRSRV_BRIDGE_SERVICES4_TMP_CMD_LAST \
247 (PVRSRV_BRIDGE_SERVICES4_TMP_CMD_FIRST+0)
249 #define PVRSRV_BRIDGE_INITSRV_CMD_FIRST \
250 (PVRSRV_BRIDGE_SERVICES4_TMP_CMD_LAST+1)
251 #define PVRSRV_BRIDGE_INITSRV_CONNECT \
252 PVRSRV_IOWR(PVRSRV_BRIDGE_INITSRV_CMD_FIRST+0)
253 #define PVRSRV_BRIDGE_INITSRV_DISCONNECT \
254 PVRSRV_IOWR(PVRSRV_BRIDGE_INITSRV_CMD_FIRST+1)
255 #define PVRSRV_BRIDGE_INITSRV_CMD_LAST \
256 (PVRSRV_BRIDGE_INITSRV_CMD_FIRST+1)
258 #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST \
259 (PVRSRV_BRIDGE_INITSRV_CMD_LAST+1)
260 #define PVRSRV_BRIDGE_EVENT_OBJECT_WAIT \
261 PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+0)
262 #define PVRSRV_BRIDGE_EVENT_OBJECT_OPEN \
263 PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+1)
264 #define PVRSRV_BRIDGE_EVENT_OBJECT_CLOSE \
265 PVRSRV_IOWR(PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
266 #define PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST \
267 (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_FIRST+2)
269 #define PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST \
270 (PVRSRV_BRIDGE_EVENT_OBJECT_CMD_LAST+1)
271 #define PVRSRV_BRIDGE_MODIFY_SYNC_OPS \
272 PVRSRV_IOWR(PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+0)
273 #define PVRSRV_BRIDGE_SYNC_OPS_CMD_LAST \
274 (PVRSRV_BRIDGE_SYNC_OPS_CMD_FIRST+0)
276 #define PVRSRV_BRIDGE_LAST_NON_DEVICE_CMD \
277 (PVRSRV_BRIDGE_SYNC_OPS_CMD_LAST+1)
281 #define PVRSRV_BRIDGE_PDUMP_CMD_FIRST 192
282 #define PVRSRV_BRIDGE_PDUMP_INIT \
283 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+0)
284 #define PVRSRV_BRIDGE_PDUMP_MEMPOL \
285 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+1)
286 #define PVRSRV_BRIDGE_PDUMP_DUMPMEM \
287 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+2)
288 #define PVRSRV_BRIDGE_PDUMP_REG \
289 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+3)
290 #define PVRSRV_BRIDGE_PDUMP_REGPOL \
291 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+4)
292 #define PVRSRV_BRIDGE_PDUMP_COMMENT \
293 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+5)
294 #define PVRSRV_BRIDGE_PDUMP_SETFRAME \
295 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+6)
296 #define PVRSRV_BRIDGE_PDUMP_ISCAPTURING \
297 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+7)
298 #define PVRSRV_BRIDGE_PDUMP_DUMPBITMAP \
299 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+8)
300 #define PVRSRV_BRIDGE_PDUMP_DUMPREADREG \
301 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+9)
302 #define PVRSRV_BRIDGE_PDUMP_SYNCPOL \
303 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+10)
304 #define PVRSRV_BRIDGE_PDUMP_DUMPSYNC \
305 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+11)
306 #define PVRSRV_BRIDGE_PDUMP_MEMPAGES \
307 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+12)
308 #define PVRSRV_BRIDGE_PDUMP_DRIVERINFO \
309 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+13)
310 #define PVRSRV_BRIDGE_PDUMP_PDREG \
311 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+14)
312 #define PVRSRV_BRIDGE_PDUMP_DUMPPDDEVPADDR \
313 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+15)
314 #define PVRSRV_BRIDGE_PDUMP_CYCLE_COUNT_REG_READ \
315 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+16)
316 #define PVRSRV_BRIDGE_PDUMP_STARTINITPHASE \
317 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+17)
318 #define PVRSRV_BRIDGE_PDUMP_STOPINITPHASE \
319 PVRSRV_IOWR(PVRSRV_BRIDGE_PDUMP_CMD_FIRST+18)
320 #define PVRSRV_BRIDGE_PDUMP_CMD_LAST \
321 (PVRSRV_BRIDGE_PDUMP_CMD_FIRST+18)
325 #define PVRSRV_KERNEL_MODE_CLIENT 1
327 struct PVRSRV_BRIDGE_RETURN {
328 enum PVRSRV_ERROR eError;
332 struct PVRSRV_BRIDGE_PACKAGE {
335 void __user *pvParamIn;
336 u32 ui32InBufferSize;
337 void __user *pvParamOut;
338 u32 ui32OutBufferSize;
340 void *hKernelServices;
343 struct PVRSRV_BRIDGE_IN_ACQUIRE_DEVICEINFO {
346 enum PVRSRV_DEVICE_TYPE eDeviceType;
349 struct PVRSRV_BRIDGE_IN_ENUMCLASS {
351 enum PVRSRV_DEVICE_CLASS sDeviceClass;
354 struct PVRSRV_BRIDGE_IN_CLOSE_DISPCLASS_DEVICE {
359 struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_FORMATS {
364 struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_SYSBUFFER {
369 struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_INFO {
374 struct PVRSRV_BRIDGE_IN_CLOSE_BUFFERCLASS_DEVICE {
379 struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_INFO {
384 struct PVRSRV_BRIDGE_IN_RELEASE_DEVICEINFO {
389 struct PVRSRV_BRIDGE_IN_FREE_CLASSDEVICEINFO {
391 enum PVRSRV_DEVICE_CLASS DeviceClass;
395 struct PVRSRV_BRIDGE_IN_GET_DEVMEM_HEAPINFO {
398 void *hDevMemContext;
401 struct PVRSRV_BRIDGE_IN_CREATE_DEVMEMCONTEXT {
406 struct PVRSRV_BRIDGE_IN_DESTROY_DEVMEMCONTEXT {
409 void *hDevMemContext;
412 struct PVRSRV_BRIDGE_IN_ALLOCDEVICEMEM {
421 struct PVRSRV_BRIDGE_IN_MAPMEMINFOTOUSER {
423 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
426 struct PVRSRV_BRIDGE_IN_UNMAPMEMINFOFROMUSER {
428 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
433 #define DRM_PVR2D_CFLUSH_FROM_GPU 1
434 #define DRM_PVR2D_CFLUSH_TO_GPU 2
436 struct PVRSRV_BRIDGE_IN_CACHEFLUSHDRMFROMUSER {
444 struct PVRSRV_BRIDGE_IN_FREEDEVICEMEM {
447 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
448 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
452 struct PVRSRV_BRIDGE_IN_EXPORTDEVICEMEM {
455 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
459 struct PVRSRV_BRIDGE_IN_GETFREEDEVICEMEM {
464 struct PVRSRV_BRIDGE_IN_CREATECOMMANDQUEUE {
470 struct PVRSRV_BRIDGE_IN_DESTROYCOMMANDQUEUE {
473 struct PVRSRV_QUEUE_INFO *psQueueInfo;
477 struct PVRSRV_BRIDGE_IN_MHANDLE_TO_MMAP_DATA {
482 struct PVRSRV_BRIDGE_IN_RELEASE_MMAP_DATA {
487 struct PVRSRV_BRIDGE_IN_RESERVE_DEV_VIRTMEM {
490 struct IMG_DEV_VIRTADDR *psDevVAddr;
495 struct PVRSRV_BRIDGE_OUT_CONNECT_SERVICES {
496 enum PVRSRV_ERROR eError;
497 void *hKernelServices;
500 struct PVRSRV_BRIDGE_OUT_RESERVE_DEV_VIRTMEM {
501 enum PVRSRV_ERROR eError;
502 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
503 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
504 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
505 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
508 struct PVRSRV_BRIDGE_IN_FREE_DEV_VIRTMEM {
510 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
511 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
512 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
515 struct PVRSRV_BRIDGE_IN_MAP_DEV_MEMORY {
517 void *hKernelMemInfo;
518 void *hDstDevMemHeap;
521 struct PVRSRV_BRIDGE_OUT_MAP_DEV_MEMORY {
522 enum PVRSRV_ERROR eError;
523 struct PVRSRV_KERNEL_MEM_INFO *psDstKernelMemInfo;
524 struct PVRSRV_KERNEL_SYNC_INFO *psDstKernelSyncInfo;
525 struct PVRSRV_CLIENT_MEM_INFO sDstClientMemInfo;
526 struct PVRSRV_CLIENT_SYNC_INFO sDstClientSyncInfo;
529 struct PVRSRV_BRIDGE_IN_UNMAP_DEV_MEMORY {
531 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
532 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
533 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
536 struct PVRSRV_BRIDGE_IN_MAP_EXT_MEMORY {
538 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
539 struct IMG_SYS_PHYADDR *psSysPAddr;
543 struct PVRSRV_BRIDGE_IN_UNMAP_EXT_MEMORY {
545 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
546 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
550 struct PVRSRV_BRIDGE_IN_MAP_DEVICECLASS_MEMORY {
552 void *hDeviceClassBuffer;
553 void *hDevMemContext;
557 struct PVRSRV_BRIDGE_OUT_MAP_DEVICECLASS_MEMORY {
558 enum PVRSRV_ERROR eError;
559 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
560 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
561 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
562 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
566 struct PVRSRV_BRIDGE_IN_UNMAP_DEVICECLASS_MEMORY {
568 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
569 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
570 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
573 struct PVRSRV_BRIDGE_IN_PDUMP_MEMPOL {
575 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
583 struct PVRSRV_BRIDGE_IN_PDUMP_SYNCPOL {
585 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
591 struct PVRSRV_BRIDGE_IN_PDUMP_DUMPMEM {
595 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
601 struct PVRSRV_BRIDGE_IN_PDUMP_DUMPSYNC {
604 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
609 struct PVRSRV_BRIDGE_IN_PDUMP_DUMPREG {
611 struct PVRSRV_HWREG sHWReg;
615 struct PVRSRV_BRIDGE_IN_PDUMP_REGPOL {
617 struct PVRSRV_HWREG sHWReg;
622 struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDREG {
624 struct PVRSRV_HWREG sHWReg;
628 struct PVRSRV_BRIDGE_IN_PDUMP_MEMPAGES {
630 void *hKernelMemInfo;
631 struct IMG_DEV_PHYADDR *pPages;
633 struct IMG_DEV_VIRTADDR sDevAddr;
636 IMG_BOOL bContinuous;
639 struct PVRSRV_BRIDGE_IN_PDUMP_COMMENT {
641 char szComment[PVRSRV_PDUMP_MAX_COMMENT_SIZE];
645 struct PVRSRV_BRIDGE_IN_PDUMP_SETFRAME {
650 struct PVRSRV_BRIDGE_IN_PDUMP_BITMAP {
652 char szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
656 u32 ui32StrideInBytes;
657 struct IMG_DEV_VIRTADDR sDevBaseAddr;
659 enum PDUMP_PIXEL_FORMAT ePixelFormat;
660 enum PDUMP_MEM_FORMAT eMemFormat;
664 struct PVRSRV_BRIDGE_IN_PDUMP_READREG {
666 char szFileName[PVRSRV_PDUMP_MAX_FILENAME_SIZE];
673 struct PVRSRV_BRIDGE_IN_PDUMP_DRIVERINFO {
675 char szString[PVRSRV_PDUMP_MAX_COMMENT_SIZE];
676 IMG_BOOL bContinuous;
679 struct PVRSRV_BRIDGE_IN_PDUMP_DUMPPDDEVPADDR {
681 void *hKernelMemInfo;
683 struct IMG_DEV_PHYADDR sPDDevPAddr;
686 struct PVRSRV_BRIDGE_IN_PDUMP_CYCLE_COUNT_REG_READ {
692 struct PVRSRV_BRIDGE_OUT_ENUMDEVICE {
693 enum PVRSRV_ERROR eError;
695 struct PVRSRV_DEVICE_IDENTIFIER asDeviceIdentifier[PVRSRV_MAX_DEVICES];
698 struct PVRSRV_BRIDGE_OUT_ACQUIRE_DEVICEINFO {
700 enum PVRSRV_ERROR eError;
704 struct PVRSRV_BRIDGE_OUT_ENUMCLASS {
705 enum PVRSRV_ERROR eError;
707 u32 ui32DevID[PVRSRV_MAX_DEVICES];
710 struct PVRSRV_BRIDGE_IN_OPEN_DISPCLASS_DEVICE {
716 struct PVRSRV_BRIDGE_OUT_OPEN_DISPCLASS_DEVICE {
717 enum PVRSRV_ERROR eError;
721 struct PVRSRV_BRIDGE_IN_WRAP_EXT_MEMORY {
724 void *hDevMemContext;
728 IMG_BOOL bPhysContig;
729 u32 ui32NumPageTableEntries;
730 struct IMG_SYS_PHYADDR __user *psSysPAddr;
733 struct PVRSRV_BRIDGE_OUT_WRAP_EXT_MEMORY {
734 enum PVRSRV_ERROR eError;
735 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
736 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
739 struct PVRSRV_BRIDGE_IN_UNWRAP_EXT_MEMORY {
741 void *hKernelMemInfo;
742 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
743 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
747 #define PVRSRV_MAX_DC_DISPLAY_FORMATS 10
748 #define PVRSRV_MAX_DC_DISPLAY_DIMENSIONS 10
749 #define PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS 4
750 #define PVRSRV_MAX_DC_CLIP_RECTS 32
752 struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_FORMATS {
753 enum PVRSRV_ERROR eError;
755 struct DISPLAY_FORMAT asFormat[PVRSRV_MAX_DC_DISPLAY_FORMATS];
758 struct PVRSRV_BRIDGE_IN_ENUM_DISPCLASS_DIMS {
761 struct DISPLAY_FORMAT sFormat;
764 struct PVRSRV_BRIDGE_OUT_ENUM_DISPCLASS_DIMS {
765 enum PVRSRV_ERROR eError;
767 struct DISPLAY_DIMS asDim[PVRSRV_MAX_DC_DISPLAY_DIMENSIONS];
770 struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_INFO {
771 enum PVRSRV_ERROR eError;
772 struct DISPLAY_INFO sDisplayInfo;
775 struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_SYSBUFFER {
776 enum PVRSRV_ERROR eError;
780 struct PVRSRV_BRIDGE_IN_CREATE_DISPCLASS_SWAPCHAIN {
784 struct DISPLAY_SURF_ATTRIBUTES sDstSurfAttrib;
785 struct DISPLAY_SURF_ATTRIBUTES sSrcSurfAttrib;
791 struct PVRSRV_BRIDGE_OUT_CREATE_DISPCLASS_SWAPCHAIN {
792 enum PVRSRV_ERROR eError;
797 struct PVRSRV_BRIDGE_IN_DESTROY_DISPCLASS_SWAPCHAIN {
803 struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_RECT {
807 struct IMG_RECT sRect;
810 struct PVRSRV_BRIDGE_IN_SET_DISPCLASS_COLOURKEY {
817 struct PVRSRV_BRIDGE_IN_GET_DISPCLASS_BUFFERS {
823 struct PVRSRV_BRIDGE_OUT_GET_DISPCLASS_BUFFERS {
824 enum PVRSRV_ERROR eError;
826 void *ahBuffer[PVRSRV_MAX_DC_SWAPCHAIN_BUFFERS];
829 struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_BUFFER {
833 u32 ui32SwapInterval;
835 u32 ui32ClipRectCount;
836 struct IMG_RECT sClipRect[PVRSRV_MAX_DC_CLIP_RECTS];
839 struct PVRSRV_BRIDGE_IN_SWAP_DISPCLASS_TO_SYSTEM {
845 struct PVRSRV_BRIDGE_IN_OPEN_BUFFERCLASS_DEVICE {
851 struct PVRSRV_BRIDGE_OUT_OPEN_BUFFERCLASS_DEVICE {
852 enum PVRSRV_ERROR eError;
856 struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_INFO {
857 enum PVRSRV_ERROR eError;
858 struct BUFFER_INFO sBufferInfo;
861 struct PVRSRV_BRIDGE_IN_GET_BUFFERCLASS_BUFFER {
867 struct PVRSRV_BRIDGE_OUT_GET_BUFFERCLASS_BUFFER {
868 enum PVRSRV_ERROR eError;
872 struct PVRSRV_BRIDGE_OUT_GET_DEVMEM_HEAPINFO {
873 enum PVRSRV_ERROR eError;
874 u32 ui32ClientHeapCount;
875 struct PVRSRV_HEAP_INFO sHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
878 struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMCONTEXT {
879 enum PVRSRV_ERROR eError;
880 void *hDevMemContext;
881 u32 ui32ClientHeapCount;
882 struct PVRSRV_HEAP_INFO sHeapInfo[PVRSRV_MAX_CLIENT_HEAPS];
885 struct PVRSRV_BRIDGE_OUT_CREATE_DEVMEMHEAP {
886 enum PVRSRV_ERROR eError;
890 struct PVRSRV_BRIDGE_OUT_ALLOCDEVICEMEM {
891 enum PVRSRV_ERROR eError;
892 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
893 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
894 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
895 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
899 struct PVRSRV_BRIDGE_OUT_EXPORTDEVICEMEM {
900 enum PVRSRV_ERROR eError;
905 struct PVRSRV_BRIDGE_OUT_MAPMEMINFOTOUSER {
906 enum PVRSRV_ERROR eError;
911 struct PVRSRV_BRIDGE_OUT_GETFREEDEVICEMEM {
912 enum PVRSRV_ERROR eError;
915 u32 ui32LargestBlock;
919 struct PVRSRV_BRIDGE_OUT_MHANDLE_TO_MMAP_DATA {
920 enum PVRSRV_ERROR eError;
923 u32 ui32RealByteSize;
927 struct PVRSRV_BRIDGE_OUT_RELEASE_MMAP_DATA {
928 enum PVRSRV_ERROR eError;
931 u32 ui32RealByteSize;
934 struct PVRSRV_BRIDGE_IN_GET_MISC_INFO {
936 struct PVRSRV_MISC_INFO sMiscInfo;
939 struct PVRSRV_BRIDGE_OUT_GET_MISC_INFO {
940 enum PVRSRV_ERROR eError;
941 struct PVRSRV_MISC_INFO sMiscInfo;
944 struct PVRSRV_BRIDGE_IN_RELEASE_MISC_INFO {
946 struct PVRSRV_MISC_INFO sMiscInfo;
949 struct PVRSRV_BRIDGE_OUT_RELEASE_MISC_INFO {
950 enum PVRSRV_ERROR eError;
951 struct PVRSRV_MISC_INFO sMiscInfo;
954 struct PVRSRV_BRIDGE_OUT_PDUMP_ISCAPTURING {
955 enum PVRSRV_ERROR eError;
956 IMG_BOOL bIsCapturing;
959 struct PVRSRV_BRIDGE_IN_GET_FB_STATS {
965 struct PVRSRV_BRIDGE_IN_MAPPHYSTOUSERSPACE {
968 struct IMG_SYS_PHYADDR sSysPhysAddr;
972 struct PVRSRV_BRIDGE_OUT_MAPPHYSTOUSERSPACE {
978 struct PVRSRV_BRIDGE_IN_UNMAPPHYSTOUSERSPACE {
985 struct PVRSRV_BRIDGE_OUT_GETPHYSTOUSERSPACEMAP {
990 struct PVRSRV_BRIDGE_IN_REGISTER_SIM_PROCESS {
996 struct PVRSRV_BRIDGE_OUT_REGISTER_SIM_PROCESS {
997 struct IMG_SYS_PHYADDR sRegsPhysBase;
1004 struct PVRSRV_BRIDGE_IN_UNREGISTER_SIM_PROCESS {
1005 u32 ui32BridgeFlags;
1011 struct PVRSRV_BRIDGE_IN_PROCESS_SIMISR_EVENT {
1012 u32 ui32BridgeFlags;
1014 u32 ui32StatusAndMask;
1015 enum PVRSRV_ERROR eError;
1018 struct PVRSRV_BRIDGE_IN_INITSRV_DISCONNECT {
1019 u32 ui32BridgeFlags;
1020 IMG_BOOL bInitSuccesful;
1023 struct PVRSRV_BRIDGE_IN_ALLOC_SHARED_SYS_MEM {
1024 u32 ui32BridgeFlags;
1029 struct PVRSRV_BRIDGE_OUT_ALLOC_SHARED_SYS_MEM {
1030 enum PVRSRV_ERROR eError;
1031 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
1032 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
1035 struct PVRSRV_BRIDGE_IN_FREE_SHARED_SYS_MEM {
1036 u32 ui32BridgeFlags;
1037 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
1038 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
1041 struct PVRSRV_BRIDGE_OUT_FREE_SHARED_SYS_MEM {
1042 enum PVRSRV_ERROR eError;
1045 struct PVRSRV_BRIDGE_IN_MAP_MEMINFO_MEM {
1046 u32 ui32BridgeFlags;
1047 void *hKernelMemInfo;
1050 struct PVRSRV_BRIDGE_OUT_MAP_MEMINFO_MEM {
1051 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
1052 struct PVRSRV_CLIENT_SYNC_INFO sClientSyncInfo;
1053 struct PVRSRV_KERNEL_MEM_INFO *psKernelMemInfo;
1054 struct PVRSRV_KERNEL_SYNC_INFO *psKernelSyncInfo;
1055 enum PVRSRV_ERROR eError;
1058 struct PVRSRV_BRIDGE_IN_UNMAP_MEMINFO_MEM {
1059 u32 ui32BridgeFlags;
1060 struct PVRSRV_CLIENT_MEM_INFO sClientMemInfo;
1063 struct PVRSRV_BRIDGE_OUT_UNMAP_MEMINFO_MEM {
1064 enum PVRSRV_ERROR eError;
1067 struct PVRSRV_BRIDGE_IN_GETMMU_PD_DEVPADDR {
1068 u32 ui32BridgeFlags;
1069 void *hDevMemContext;
1072 struct PVRSRV_BRIDGE_OUT_GETMMU_PD_DEVPADDR {
1073 struct IMG_DEV_PHYADDR sPDDevPAddr;
1074 enum PVRSRV_ERROR eError;
1077 struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_WAIT {
1078 u32 ui32BridgeFlags;
1082 struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_OPEN {
1083 struct PVRSRV_EVENTOBJECT sEventObject;
1086 struct PVRSRV_BRIDGE_OUT_EVENT_OBJECT_OPEN {
1088 enum PVRSRV_ERROR eError;
1091 struct PVRSRV_BRIDGE_IN_EVENT_OBJECT_CLOSE {
1092 struct PVRSRV_EVENTOBJECT sEventObject;
1096 struct PVRSRV_BRIDGE_IN_MODIFY_SYNC_OPS {
1097 u32 ui32BridgeFlags;
1098 void *hKernelSyncInfo;
1099 u32 ui32ModifyFlags;
1103 struct PVRSRV_BRIDGE_OUT_MODIFY_SYNC_OPS {
1104 enum PVRSRV_ERROR eError;
1105 u32 ui32ReadOpsPending;
1106 u32 ui32ReadOpsComplete;
1107 u32 ui32WriteOpsPending;
1108 u32 ui32WriteOpsComplete;