spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.c
authorScott Wood <scottwood@freescale.com>
Thu, 20 Sep 2012 21:35:21 +0000 (16:35 -0500)
committerScott Wood <scottwood@freescale.com>
Mon, 26 Nov 2012 21:41:24 +0000 (15:41 -0600)
There is nothing really NAND-specific about this file.

Signed-off-by: Scott Wood <scottwood@freescale.com>
Cc: Andy Fleming <afleming@freescale.com>
arch/powerpc/cpu/mpc85xx/spl_minimal.c [moved from arch/powerpc/cpu/mpc85xx/cpu_init_nand.c with 100% similarity]
nand_spl/board/freescale/mpc8536ds/Makefile
nand_spl/board/freescale/mpc8569mds/Makefile
nand_spl/board/freescale/mpc8572ds/Makefile
nand_spl/board/freescale/p1010rdb/Makefile
nand_spl/board/freescale/p1023rds/Makefile
nand_spl/board/freescale/p1_p2_rdb/Makefile
nand_spl/board/freescale/p1_p2_rdb_pc/Makefile

index bc3ba35..9c77826 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index bc3ba35..9c77826 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index bc3ba35..9c77826 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index acf7577..c3495ec 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o ticks.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_ifc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index 9500ac8..9b2c0d7 100644 (file)
@@ -34,7 +34,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -75,9 +75,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index bc3ba35..9c77826 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -80,9 +80,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/arch/powerpc/cpu/mpc85xx/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c
index 98d3ad0..797a800 100644 (file)
@@ -39,7 +39,7 @@ AFLAGS        += -DCONFIG_NAND_SPL
 CFLAGS += -DCONFIG_NAND_SPL
 
 SOBJS  = start.o resetvec.o
-COBJS  = cache.o cpu_init_early.o cpu_init_nand.o fsl_law.o law.o \
+COBJS  = cache.o cpu_init_early.o spl_minimal.o fsl_law.o law.o \
          nand_boot.o nand_boot_fsl_elbc.o ns16550.o tlb.o tlb_table.o
 
 SRCS   := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
@@ -79,9 +79,9 @@ $(obj)cpu_init_early.c:
        @rm -f $(obj)cpu_init_early.c
        ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_early.c $(obj)cpu_init_early.c
 
-$(obj)cpu_init_nand.c:
-       @rm -f $(obj)cpu_init_nand.c
-       ln -sf $(SRCTREE)/$(CPUDIR)/cpu_init_nand.c $(obj)cpu_init_nand.c
+$(obj)spl_minimal.c:
+       @rm -f $(obj)spl_minimal.c
+       ln -sf $(SRCTREE)/$(CPUDIR)/spl_minimal.c $(obj)spl_minimal.c
 
 $(obj)fsl_law.c:
        @rm -f $(obj)fsl_law.c