mips: octeon: ebb7304: Add support for some I2C devices

This patch adds support for the following I2C devices connected to
I2C bus 0 on the Octeon EBB7304:
- Dallas DS1337 RTC
- TLV EEPROM

Signed-off-by: Aaron Williams <awilliams@marvell.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

diff --git a/arch/mips/dts/mrvl,octeon-ebb7304.dts b/arch/mips/dts/mrvl,octeon-ebb7304.dts
index b95c18d..fda559d 100644 (file)
--- a/arch/mips/dts/mrvl,octeon-ebb7304.dts
+++ b/arch/mips/dts/mrvl,octeon-ebb7304.dts
@@ -115,6 +115,17 @@
 &i2c0 {
        u-boot,dm-pre-reloc;    /* Needed early for DDR SPD EEPROM */
        clock-frequency = <100000>;
+
+       rtc@68 {
+               compatible = "dallas,ds1337";
+               reg = <0x68>;
+       };
+
+       tlv-eeprom@56 {
+               compatible = "atmel,24c256", "microchip,24lc256";
+               reg = <0x56>;
+               pagesize = <64>;
+       };
 };
 
 &i2c1 {

diff --git a/configs/octeon_ebb7304_defconfig b/configs/octeon_ebb7304_defconfig
index cc8c26d..f614e95 100644 (file)
--- a/configs/octeon_ebb7304_defconfig
+++ b/configs/octeon_ebb7304_defconfig
@@ -9,7 +9,7 @@ CONFIG_DEBUG_UART_CLOCK=1200000000
 CONFIG_ARCH_OCTEON=y
 # CONFIG_MIPS_CACHE_SETUP is not set
 # CONFIG_MIPS_CACHE_DISABLE is not set
-CONFIG_MIPS_RELOCATION_TABLE_SIZE=0x8800
+CONFIG_MIPS_RELOCATION_TABLE_SIZE=0xc000
 CONFIG_DEBUG_UART=y
 CONFIG_OF_BOARD_FIXUP=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
@@ -24,6 +24,7 @@ CONFIG_CMD_PCI=y
 CONFIG_CMD_USB=y
 CONFIG_CMD_DHCP=y
 CONFIG_CMD_PING=y
+CONFIG_CMD_RTC=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT4=y
 CONFIG_CMD_FAT=y
@@ -60,6 +61,8 @@ CONFIG_DM_REGULATOR_FIXED=y
 CONFIG_RAM=y
 CONFIG_RAM_OCTEON=y
 CONFIG_RAM_OCTEON_DDR4=y
+CONFIG_DM_RTC=y
+CONFIG_RTC_DS1307=y
 CONFIG_DEBUG_UART_SHIFT=3
 CONFIG_DEBUG_UART_ANNOUNCE=y
 CONFIG_SYS_NS16550=y