From 86ce6c9a62c333157d3f2ef4e4dc1fe18b70eb63 Mon Sep 17 00:00:00 2001 From: Dimitris Papastamos Date: Mon, 4 Oct 2010 09:31:42 +0100 Subject: [PATCH] ASoC: WM8804: Refactor set_pll code to avoid GCC warnings Ensure that no uninitialised variable warnings are generated by GCC. Signed-off-by: Dimitris Papastamos Acked-by: Liam Girdwood Signed-off-by: Mark Brown --- sound/soc/codecs/wm8804.c | 47 ++++++++++++++++++++++----------------- 1 file changed, 26 insertions(+), 21 deletions(-) diff --git a/sound/soc/codecs/wm8804.c b/sound/soc/codecs/wm8804.c index 40e5067e8246..b23c57ca7c26 100644 --- a/sound/soc/codecs/wm8804.c +++ b/sound/soc/codecs/wm8804.c @@ -390,36 +390,41 @@ static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id, int source, unsigned int freq_in, unsigned int freq_out) { - int ret; struct snd_soc_codec *codec; - struct pll_div pll_div = { 0 }; codec = dai->codec; - if (freq_in && freq_out) { + if (!freq_in || !freq_out) { + /* disable the PLL */ + snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0); + return 0; + } else { + int ret; + struct pll_div pll_div; + ret = pll_factors(&pll_div, freq_out, freq_in); if (ret) return ret; - } - /* power down the PLL before reprogramming it */ - snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0); + /* power down the PLL before reprogramming it */ + snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0); - if (!freq_in || !freq_out) - return 0; + if (!freq_in || !freq_out) + return 0; - /* set PLLN and PRESCALE */ - snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10, - pll_div.n | (pll_div.prescale << 4)); - /* set mclkdiv and freqmode */ - snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8, - pll_div.freqmode | (pll_div.mclkdiv << 3)); - /* set PLLK */ - snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff); - snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff); - snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16); - - /* power up the PLL */ - snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1); + /* set PLLN and PRESCALE */ + snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10, + pll_div.n | (pll_div.prescale << 4)); + /* set mclkdiv and freqmode */ + snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8, + pll_div.freqmode | (pll_div.mclkdiv << 3)); + /* set PLLK */ + snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff); + snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff); + snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16); + + /* power up the PLL */ + snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1); + } return 0; } -- 2.39.2