From: Paul Mundt <lethal@linux-sh.org>
Date: Fri, 20 Aug 2010 11:39:22 +0000 (+0900)
Subject: Merge branch 'sh/pci-express-integration'
X-Git-Tag: v2.6.37-rc1~136^2~70
X-Git-Url: https://git.openpandora.org/cgi-bin/gitweb.cgi?p=pandora-kernel.git;a=commitdiff_plain;h=144c7494239f12d554806439a17ad8203c7b2d3a;hp=-c

Merge branch 'sh/pci-express-integration'
---

144c7494239f12d554806439a17ad8203c7b2d3a
diff --combined arch/sh/drivers/pci/pcie-sh7786.c
index 78f378731858,03e6d8217b0c..d053ffca8196
--- a/arch/sh/drivers/pci/pcie-sh7786.c
+++ b/arch/sh/drivers/pci/pcie-sh7786.c
@@@ -148,16 -148,11 +148,11 @@@ static int pci_wait_for_irq(struct pci_
  static void phy_write_reg(struct pci_channel *chan, unsigned int addr,
  			  unsigned int lane, unsigned int data)
  {
- 	unsigned long phyaddr, ctrl;
+ 	unsigned long phyaddr;
  
  	phyaddr = (1 << BITS_CMD) + ((lane & 0xf) << BITS_LANE) +
  			((addr & 0xff) << BITS_ADR);
  
- 	/* Enable clock */
- 	ctrl = pci_read_reg(chan, SH4A_PCIEPHYCTLR);
- 	ctrl |= (1 << BITS_CKE);
- 	pci_write_reg(chan, ctrl, SH4A_PCIEPHYCTLR);
- 
  	/* Set write data */
  	pci_write_reg(chan, data, SH4A_PCIEPHYDOUTR);
  	pci_write_reg(chan, phyaddr, SH4A_PCIEPHYADRR);
@@@ -165,20 -160,22 +160,22 @@@
  	phy_wait_for_ack(chan);
  
  	/* Clear command */
+ 	pci_write_reg(chan, 0, SH4A_PCIEPHYDOUTR);
  	pci_write_reg(chan, 0, SH4A_PCIEPHYADRR);
  
  	phy_wait_for_ack(chan);
- 
- 	/* Disable clock */
- 	ctrl = pci_read_reg(chan, SH4A_PCIEPHYCTLR);
- 	ctrl &= ~(1 << BITS_CKE);
- 	pci_write_reg(chan, ctrl, SH4A_PCIEPHYCTLR);
  }
  
  static int phy_init(struct pci_channel *chan)
  {
+ 	unsigned long ctrl;
  	unsigned int timeout = 100;
  
+ 	/* Enable clock */
+ 	ctrl = pci_read_reg(chan, SH4A_PCIEPHYCTLR);
+ 	ctrl |= (1 << BITS_CKE);
+ 	pci_write_reg(chan, ctrl, SH4A_PCIEPHYCTLR);
+ 
  	/* Initialize the phy */
  	phy_write_reg(chan, 0x60, 0xf, 0x004b008b);
  	phy_write_reg(chan, 0x61, 0xf, 0x00007b41);
@@@ -187,9 -184,15 +184,15 @@@
  	phy_write_reg(chan, 0x66, 0xf, 0x00000010);
  	phy_write_reg(chan, 0x74, 0xf, 0x0007001c);
  	phy_write_reg(chan, 0x79, 0xf, 0x01fc000d);
+ 	phy_write_reg(chan, 0xb0, 0xf, 0x00000610);
  
  	/* Deassert Standby */
- 	phy_write_reg(chan, 0x67, 0xf, 0x00000400);
+ 	phy_write_reg(chan, 0x67, 0x1, 0x00000400);
+ 
+ 	/* Disable clock */
+ 	ctrl = pci_read_reg(chan, SH4A_PCIEPHYCTLR);
+ 	ctrl &= ~(1 << BITS_CKE);
+ 	pci_write_reg(chan, ctrl, SH4A_PCIEPHYCTLR);
  
  	while (timeout--) {
  		if (pci_read_reg(chan, SH4A_PCIEPHYSR))
@@@ -287,6 -290,9 +290,9 @@@ static int pcie_init(struct sh7786_pcie
  	__raw_writel(memphys, chan->reg_base + SH4A_PCIELAR0);
  	__raw_writel((memsize - SZ_256) | 1, chan->reg_base + SH4A_PCIELAMR0);
  
+ 	__raw_writel(memphys, chan->reg_base + SH4A_PCIEPCICONF4);
+ 	__raw_writel(0, chan->reg_base + SH4A_PCIEPCICONF5);
+ 
  	/* Finish initialization */
  	data = pci_read_reg(chan, SH4A_PCIETCTLR);
  	data |= 0x1;
@@@ -392,7 -398,7 +398,7 @@@ static int __init sh7786_pcie_init(void
  {
  	int ret = 0, i;
  
 -	printk(KERN_NOTICE "PCI: Starting intialization.\n");
 +	printk(KERN_NOTICE "PCI: Starting initialization.\n");
  
  	sh7786_pcie_hwops = &sh7786_65nm_pcie_hwops;