tpm: read burstcount from TPM_STS in one 32-bit transaction

commit 9754d45e997000ad4021bc4606cc266bb38d876f upstream.

Some chips incorrectly support partial reads from TPM_STS register
at non-zero offsets. Read the entire 32-bits register instead of
making two 8-bit reads to support such devices and reduce the number
of bus transactions when obtaining the burstcount from TPM_STS.

Fixes: 27084efee0c3 ("tpm: driver for next generation TPM chips")
Signed-off-by: Andrey Pronin <apronin@chromium.org>
Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
[bwh: Backported to 3.2:
 - Use raw ioread32() instead of tpm_tis_read32()
 - Adjust filename, context]
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>

diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index f8e94fe..0c4885d 100644 (file)
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -176,16 +176,15 @@ static int get_burstcount(struct tpm_chip *chip)
 {
        unsigned long stop;
        int burstcnt;
+       u32 value;
 
        /* wait for burstcount */
        /* which timeout value, spec has 2 answers (c & d) */
        stop = jiffies + chip->vendor.timeout_d;
        do {
-               burstcnt = ioread8(chip->vendor.iobase +
-                                  TPM_STS(chip->vendor.locality) + 1);
-               burstcnt += ioread8(chip->vendor.iobase +
-                                   TPM_STS(chip->vendor.locality) +
-                                   2) << 8;
+               value = ioread32(chip->vendor.iobase +
+                                TPM_STS(chip->vendor.locality));
+               burstcnt = (value >> 8) & 0xFFFF;
                if (burstcnt)
                        return burstcnt;
                msleep(TPM_TIMEOUT);