tile,mn10300: add device parameter to dma_cache_sync()
authorJames Hogan <james.hogan@imgtec.com>
Mon, 4 Apr 2011 15:21:47 +0000 (16:21 +0100)
committerChris Metcalf <cmetcalf@tilera.com>
Wed, 4 May 2011 18:41:36 +0000 (14:41 -0400)
Since v2.6.20 "Pass struct dev pointer to dma_cache_sync()"
(d3fa72e4556ec1f04e46a0d561d9e785ecaa173d), dma_cache_sync() takes a
struct dev pointer, but these appear to be missing from the tile and
mn10300 implementations, so add them.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
[cmetcalf@tilera.com: took only the "tile" portion as I don't maintain mn10300]
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
arch/tile/include/asm/dma-mapping.h
arch/tile/kernel/pci-dma.c

index 15e1dce..eaa06d1 100644 (file)
@@ -65,7 +65,8 @@ extern void dma_sync_single_range_for_cpu(struct device *, dma_addr_t,
 extern void dma_sync_single_range_for_device(struct device *, dma_addr_t,
                                             unsigned long offset, size_t,
                                             enum dma_data_direction);
-extern void dma_cache_sync(void *vaddr, size_t, enum dma_data_direction);
+extern void dma_cache_sync(struct device *dev, void *vaddr, size_t,
+                          enum dma_data_direction);
 
 static inline int
 dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
index 658752b..658f2ce 100644 (file)
@@ -244,7 +244,7 @@ EXPORT_SYMBOL(dma_sync_single_range_for_device);
  * dma_alloc_noncoherent() returns non-cacheable memory, so there's no
  * need to do any flushing here.
  */
-void dma_cache_sync(void *vaddr, size_t size,
+void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                    enum dma_data_direction direction)
 {
 }