Merge branch 'kvm-updates/2.6.39' of git://git.kernel.org/pub/scm/virt/kvm/kvm
authorLinus Torvalds <torvalds@linux-foundation.org>
Fri, 18 Mar 2011 01:40:35 +0000 (18:40 -0700)
committerLinus Torvalds <torvalds@linux-foundation.org>
Fri, 18 Mar 2011 01:40:35 +0000 (18:40 -0700)
* 'kvm-updates/2.6.39' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (55 commits)
  KVM: unbreak userspace that does not sets tss address
  KVM: MMU: cleanup pte write path
  KVM: MMU: introduce a common function to get no-dirty-logged slot
  KVM: fix rcu usage in init_rmode_* functions
  KVM: fix kvmclock regression due to missing clock update
  KVM: emulator: Fix permission checking in io permission bitmap
  KVM: emulator: Fix io permission checking for 64bit guest
  KVM: SVM: Load %gs earlier if CONFIG_X86_32_LAZY_GS=n
  KVM: x86: Remove useless regs_page pointer from kvm_lapic
  KVM: improve comment on rcu use in irqfd_deassign
  KVM: MMU: remove unused macros
  KVM: MMU: cleanup page alloc and free
  KVM: MMU: do not record gfn in kvm_mmu_pte_write
  KVM: MMU: move mmu pages calculated out of mmu lock
  KVM: MMU: set spte accessed bit properly
  KVM: MMU: fix kvm_mmu_slot_remove_write_access dropping intermediate W bits
  KVM: Start lock documentation
  KVM: better readability of efer_reserved_bits
  KVM: Clear async page fault hash after switching to real mode
  KVM: VMX: Initialize vm86 TSS only once.
  ...

756 files changed:
Documentation/cpu-freq/governors.txt
Documentation/filesystems/nfs/pnfs.txt
Documentation/hwmon/f71882fg
Documentation/hwmon/lineage-pem [new file with mode: 0644]
Documentation/hwmon/lm85
Documentation/hwmon/ltc4151 [new file with mode: 0644]
Documentation/hwmon/max6639 [new file with mode: 0644]
Documentation/hwmon/pmbus [new file with mode: 0644]
Documentation/hwmon/sysfs-interface
Documentation/hwmon/w83627ehf
Documentation/kernel-parameters.txt
Documentation/scsi/ChangeLog.megaraid_sas
Documentation/scsi/hpsa.txt
Documentation/scsi/scsi_mid_low_api.txt
MAINTAINERS
arch/arm/mach-s5pv210/cpufreq.c
arch/arm/mach-s5pv310/cpufreq.c
arch/arm/plat-s3c24xx/cpu-freq.c
arch/mips/include/asm/mach-jz4740/platform.h
arch/mips/jz4740/platform.c
arch/powerpc/platforms/powermac/cpufreq_32.c
arch/s390/Kconfig
arch/s390/Kconfig.debug
arch/s390/Makefile
arch/s390/boot/compressed/Makefile
arch/s390/boot/compressed/misc.c
arch/s390/include/asm/cacheflush.h
arch/s390/kernel/machine_kexec.c
arch/s390/mm/Makefile
arch/s390/mm/pageattr.c [new file with mode: 0644]
arch/sh/Kconfig
arch/sh/boards/board-espt.c
arch/sh/boards/board-sh7757lcr.c
arch/sh/boards/mach-ecovec24/setup.c
arch/sh/boards/mach-sh7763rdp/setup.c
arch/sh/boot/compressed/Makefile
arch/sh/configs/sh7757lcr_defconfig
arch/sh/drivers/pci/pcie-sh7786.c
arch/sh/include/asm/unistd_32.h
arch/sh/include/asm/unistd_64.h
arch/sh/include/cpu-sh4/cpu/dma-register.h
arch/sh/include/cpu-sh4/cpu/sh7757.h
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
arch/sh/kernel/cpu/sh4a/setup-sh7757.c
arch/sh/kernel/cpu/shmobile/cpuidle.c
arch/sh/kernel/irq.c
arch/sh/kernel/syscalls_32.S
arch/sh/kernel/syscalls_64.S
arch/sh/mm/Makefile
arch/sparc/Kconfig
arch/sparc/Makefile
arch/sparc/boot/Makefile
arch/sparc/include/asm/irq_64.h
arch/sparc/include/asm/leon.h
arch/sparc/include/asm/leon_amba.h
arch/sparc/include/asm/mmu_32.h
arch/sparc/include/asm/smp_32.h
arch/sparc/kernel/Makefile
arch/sparc/kernel/cpu.c
arch/sparc/kernel/entry.h
arch/sparc/kernel/iommu.c
arch/sparc/kernel/ioport.c
arch/sparc/kernel/irq.h
arch/sparc/kernel/irq_32.c
arch/sparc/kernel/irq_64.c
arch/sparc/kernel/kernel.h
arch/sparc/kernel/ldc.c
arch/sparc/kernel/leon_kernel.c
arch/sparc/kernel/leon_pmc.c [new file with mode: 0644]
arch/sparc/kernel/leon_smp.c
arch/sparc/kernel/of_device_32.c
arch/sparc/kernel/pci.c
arch/sparc/kernel/pci_common.c
arch/sparc/kernel/pci_fire.c
arch/sparc/kernel/pci_impl.h
arch/sparc/kernel/pci_msi.c
arch/sparc/kernel/pci_schizo.c
arch/sparc/kernel/pci_sun4v.c
arch/sparc/kernel/pcr.c
arch/sparc/kernel/prom_irqtrans.c
arch/sparc/kernel/ptrace_64.c
arch/sparc/kernel/setup_32.c
arch/sparc/kernel/smp_64.c
arch/sparc/kernel/sun4c_irq.c
arch/sparc/kernel/sun4d_irq.c
arch/sparc/kernel/sun4d_smp.c
arch/sparc/kernel/sun4m_irq.c
arch/sparc/kernel/sun4m_smp.c
arch/sparc/kernel/sys_sparc_64.c
arch/sparc/kernel/tick14.c [deleted file]
arch/sparc/kernel/time_32.c
arch/sparc/kernel/time_64.c
arch/sparc/kernel/traps_64.c
arch/sparc/kernel/una_asm_64.S
arch/sparc/mm/fault_32.c
arch/sparc/prom/misc_32.c
arch/unicore32/.gitignore [new file with mode: 0644]
arch/unicore32/Kconfig [new file with mode: 0644]
arch/unicore32/Kconfig.debug [new file with mode: 0644]
arch/unicore32/Makefile [new file with mode: 0644]
arch/unicore32/boot/Makefile [new file with mode: 0644]
arch/unicore32/boot/compressed/Makefile [new file with mode: 0644]
arch/unicore32/boot/compressed/head.S [new file with mode: 0644]
arch/unicore32/boot/compressed/misc.c [new file with mode: 0644]
arch/unicore32/boot/compressed/piggy.S.in [new file with mode: 0644]
arch/unicore32/boot/compressed/vmlinux.lds.in [new file with mode: 0644]
arch/unicore32/configs/debug_defconfig [new file with mode: 0644]
arch/unicore32/include/asm/Kbuild [new file with mode: 0644]
arch/unicore32/include/asm/assembler.h [new file with mode: 0644]
arch/unicore32/include/asm/bitops.h [new file with mode: 0644]
arch/unicore32/include/asm/byteorder.h [new file with mode: 0644]
arch/unicore32/include/asm/cache.h [new file with mode: 0644]
arch/unicore32/include/asm/cacheflush.h [new file with mode: 0644]
arch/unicore32/include/asm/checksum.h [new file with mode: 0644]
arch/unicore32/include/asm/cpu-single.h [new file with mode: 0644]
arch/unicore32/include/asm/cputype.h [new file with mode: 0644]
arch/unicore32/include/asm/delay.h [new file with mode: 0644]
arch/unicore32/include/asm/dma-mapping.h [new file with mode: 0644]
arch/unicore32/include/asm/dma.h [new file with mode: 0644]
arch/unicore32/include/asm/elf.h [new file with mode: 0644]
arch/unicore32/include/asm/fpstate.h [new file with mode: 0644]
arch/unicore32/include/asm/fpu-ucf64.h [new file with mode: 0644]
arch/unicore32/include/asm/futex.h [new file with mode: 0644]
arch/unicore32/include/asm/gpio.h [new file with mode: 0644]
arch/unicore32/include/asm/hwcap.h [new file with mode: 0644]
arch/unicore32/include/asm/io.h [new file with mode: 0644]
arch/unicore32/include/asm/irq.h [new file with mode: 0644]
arch/unicore32/include/asm/irqflags.h [new file with mode: 0644]
arch/unicore32/include/asm/linkage.h [new file with mode: 0644]
arch/unicore32/include/asm/memblock.h [new file with mode: 0644]
arch/unicore32/include/asm/memory.h [new file with mode: 0644]
arch/unicore32/include/asm/mmu.h [new file with mode: 0644]
arch/unicore32/include/asm/mmu_context.h [new file with mode: 0644]
arch/unicore32/include/asm/mutex.h [new file with mode: 0644]
arch/unicore32/include/asm/page.h [new file with mode: 0644]
arch/unicore32/include/asm/pci.h [new file with mode: 0644]
arch/unicore32/include/asm/pgalloc.h [new file with mode: 0644]
arch/unicore32/include/asm/pgtable-hwdef.h [new file with mode: 0644]
arch/unicore32/include/asm/pgtable.h [new file with mode: 0644]
arch/unicore32/include/asm/processor.h [new file with mode: 0644]
arch/unicore32/include/asm/ptrace.h [new file with mode: 0644]
arch/unicore32/include/asm/sigcontext.h [new file with mode: 0644]
arch/unicore32/include/asm/stacktrace.h [new file with mode: 0644]
arch/unicore32/include/asm/string.h [new file with mode: 0644]
arch/unicore32/include/asm/suspend.h [new file with mode: 0644]
arch/unicore32/include/asm/system.h [new file with mode: 0644]
arch/unicore32/include/asm/thread_info.h [new file with mode: 0644]
arch/unicore32/include/asm/timex.h [new file with mode: 0644]
arch/unicore32/include/asm/tlb.h [new file with mode: 0644]
arch/unicore32/include/asm/tlbflush.h [new file with mode: 0644]
arch/unicore32/include/asm/traps.h [new file with mode: 0644]
arch/unicore32/include/asm/uaccess.h [new file with mode: 0644]
arch/unicore32/include/asm/unistd.h [new file with mode: 0644]
arch/unicore32/include/mach/PKUnity.h [new file with mode: 0644]
arch/unicore32/include/mach/bitfield.h [new file with mode: 0644]
arch/unicore32/include/mach/dma.h [new file with mode: 0644]
arch/unicore32/include/mach/hardware.h [new file with mode: 0644]
arch/unicore32/include/mach/map.h [new file with mode: 0644]
arch/unicore32/include/mach/memory.h [new file with mode: 0644]
arch/unicore32/include/mach/ocd.h [new file with mode: 0644]
arch/unicore32/include/mach/pm.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-ac97.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-dmac.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-gpio.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-i2c.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-intc.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-nand.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-ost.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-pci.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-pm.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-ps2.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-resetc.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-rtc.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-sdc.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-spi.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-uart.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-umal.h [new file with mode: 0644]
arch/unicore32/include/mach/regs-unigfx.h [new file with mode: 0644]
arch/unicore32/include/mach/uncompress.h [new file with mode: 0644]
arch/unicore32/kernel/Makefile [new file with mode: 0644]
arch/unicore32/kernel/asm-offsets.c [new file with mode: 0644]
arch/unicore32/kernel/clock.c [new file with mode: 0644]
arch/unicore32/kernel/cpu-ucv2.c [new file with mode: 0644]
arch/unicore32/kernel/debug-macro.S [new file with mode: 0644]
arch/unicore32/kernel/debug.S [new file with mode: 0644]
arch/unicore32/kernel/dma.c [new file with mode: 0644]
arch/unicore32/kernel/early_printk.c [new file with mode: 0644]
arch/unicore32/kernel/elf.c [new file with mode: 0644]
arch/unicore32/kernel/entry.S [new file with mode: 0644]
arch/unicore32/kernel/fpu-ucf64.c [new file with mode: 0644]
arch/unicore32/kernel/gpio.c [new file with mode: 0644]
arch/unicore32/kernel/head.S [new file with mode: 0644]
arch/unicore32/kernel/hibernate.c [new file with mode: 0644]
arch/unicore32/kernel/hibernate_asm.S [new file with mode: 0644]
arch/unicore32/kernel/init_task.c [new file with mode: 0644]
arch/unicore32/kernel/irq.c [new file with mode: 0644]
arch/unicore32/kernel/ksyms.c [new file with mode: 0644]
arch/unicore32/kernel/ksyms.h [new file with mode: 0644]
arch/unicore32/kernel/module.c [new file with mode: 0644]
arch/unicore32/kernel/pci.c [new file with mode: 0644]
arch/unicore32/kernel/pm.c [new file with mode: 0644]
arch/unicore32/kernel/process.c [new file with mode: 0644]
arch/unicore32/kernel/ptrace.c [new file with mode: 0644]
arch/unicore32/kernel/puv3-core.c [new file with mode: 0644]
arch/unicore32/kernel/puv3-nb0916.c [new file with mode: 0644]
arch/unicore32/kernel/pwm.c [new file with mode: 0644]
arch/unicore32/kernel/rtc.c [new file with mode: 0644]
arch/unicore32/kernel/setup.c [new file with mode: 0644]
arch/unicore32/kernel/setup.h [new file with mode: 0644]
arch/unicore32/kernel/signal.c [new file with mode: 0644]
arch/unicore32/kernel/sleep.S [new file with mode: 0644]
arch/unicore32/kernel/stacktrace.c [new file with mode: 0644]
arch/unicore32/kernel/sys.c [new file with mode: 0644]
arch/unicore32/kernel/time.c [new file with mode: 0644]
arch/unicore32/kernel/traps.c [new file with mode: 0644]
arch/unicore32/kernel/vmlinux.lds.S [new file with mode: 0644]
arch/unicore32/lib/Makefile [new file with mode: 0644]
arch/unicore32/lib/backtrace.S [new file with mode: 0644]
arch/unicore32/lib/clear_user.S [new file with mode: 0644]
arch/unicore32/lib/copy_from_user.S [new file with mode: 0644]
arch/unicore32/lib/copy_page.S [new file with mode: 0644]
arch/unicore32/lib/copy_template.S [new file with mode: 0644]
arch/unicore32/lib/copy_to_user.S [new file with mode: 0644]
arch/unicore32/lib/delay.S [new file with mode: 0644]
arch/unicore32/lib/findbit.S [new file with mode: 0644]
arch/unicore32/lib/strncpy_from_user.S [new file with mode: 0644]
arch/unicore32/lib/strnlen_user.S [new file with mode: 0644]
arch/unicore32/mm/Kconfig [new file with mode: 0644]
arch/unicore32/mm/Makefile [new file with mode: 0644]
arch/unicore32/mm/alignment.c [new file with mode: 0644]
arch/unicore32/mm/cache-ucv2.S [new file with mode: 0644]
arch/unicore32/mm/dma-swiotlb.c [new file with mode: 0644]
arch/unicore32/mm/extable.c [new file with mode: 0644]
arch/unicore32/mm/fault.c [new file with mode: 0644]
arch/unicore32/mm/flush.c [new file with mode: 0644]
arch/unicore32/mm/init.c [new file with mode: 0644]
arch/unicore32/mm/ioremap.c [new file with mode: 0644]
arch/unicore32/mm/mm.h [new file with mode: 0644]
arch/unicore32/mm/mmu.c [new file with mode: 0644]
arch/unicore32/mm/pgd.c [new file with mode: 0644]
arch/unicore32/mm/proc-macros.S [new file with mode: 0644]
arch/unicore32/mm/proc-syms.c [new file with mode: 0644]
arch/unicore32/mm/proc-ucv2.S [new file with mode: 0644]
arch/unicore32/mm/tlb-ucv2.S [new file with mode: 0644]
arch/x86/kernel/amd_nb.c
arch/x86/kernel/cpu/cpufreq/pcc-cpufreq.c
arch/x86/kernel/cpu/cpufreq/powernow-k8.c
arch/x86/pci/xen.c
arch/x86/xen/mmu.c
block/blk-core.c
drivers/cpufreq/cpufreq.c
drivers/cpufreq/cpufreq_conservative.c
drivers/cpufreq/cpufreq_ondemand.c
drivers/edac/amd64_edac.c
drivers/edac/amd64_edac.h
drivers/edac/amd64_edac_inj.c
drivers/edac/edac_mc_sysfs.c
drivers/edac/mce_amd.c
drivers/edac/mce_amd.h
drivers/gpu/drm/Kconfig
drivers/gpu/drm/Makefile
drivers/gpu/drm/drm_crtc.c
drivers/gpu/drm/drm_drv.c
drivers/gpu/drm/drm_edid.c
drivers/gpu/drm/drm_edid_modes.h
drivers/gpu/drm/drm_fb_helper.c
drivers/gpu/drm/drm_gem.c
drivers/gpu/drm/drm_hashtab.c
drivers/gpu/drm/drm_info.c
drivers/gpu/drm/drm_ioctl.c
drivers/gpu/drm/drm_irq.c
drivers/gpu/drm/drm_mm.c
drivers/gpu/drm/drm_modes.c
drivers/gpu/drm/drm_pci.c
drivers/gpu/drm/drm_platform.c
drivers/gpu/drm/drm_stub.c
drivers/gpu/drm/drm_sysfs.c
drivers/gpu/drm/drm_usb.c [new file with mode: 0644]
drivers/gpu/drm/i810/i810_dma.c
drivers/gpu/drm/i810/i810_drv.c
drivers/gpu/drm/i830/Makefile [deleted file]
drivers/gpu/drm/i830/i830_dma.c [deleted file]
drivers/gpu/drm/i830/i830_drv.c [deleted file]
drivers/gpu/drm/i830/i830_drv.h [deleted file]
drivers/gpu/drm/i830/i830_irq.c [deleted file]
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_dma.c
drivers/gpu/drm/i915/i915_drv.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem.c
drivers/gpu/drm/i915/i915_gem_debug.c
drivers/gpu/drm/i915/i915_gem_evict.c
drivers/gpu/drm/i915/i915_gem_execbuffer.c
drivers/gpu/drm/i915/i915_gem_tiling.c
drivers/gpu/drm/i915/i915_irq.c
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/i915_suspend.c
drivers/gpu/drm/i915/i915_trace.h
drivers/gpu/drm/i915/intel_bios.c
drivers/gpu/drm/i915/intel_crt.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_drv.h
drivers/gpu/drm/i915/intel_dvo.c
drivers/gpu/drm/i915/intel_hdmi.c
drivers/gpu/drm/i915/intel_i2c.c
drivers/gpu/drm/i915/intel_lvds.c
drivers/gpu/drm/i915/intel_modes.c
drivers/gpu/drm/i915/intel_opregion.c
drivers/gpu/drm/i915/intel_overlay.c
drivers/gpu/drm/i915/intel_panel.c
drivers/gpu/drm/i915/intel_ringbuffer.c
drivers/gpu/drm/i915/intel_ringbuffer.h
drivers/gpu/drm/i915/intel_sdvo.c
drivers/gpu/drm/i915/intel_tv.c
drivers/gpu/drm/mga/mga_dma.c
drivers/gpu/drm/mga/mga_drv.c
drivers/gpu/drm/nouveau/nouveau_bios.c
drivers/gpu/drm/nouveau/nouveau_bios.h
drivers/gpu/drm/nouveau/nouveau_bo.c
drivers/gpu/drm/nouveau/nouveau_channel.c
drivers/gpu/drm/nouveau/nouveau_display.c
drivers/gpu/drm/nouveau/nouveau_dma.c
drivers/gpu/drm/nouveau/nouveau_dma.h
drivers/gpu/drm/nouveau/nouveau_dp.c
drivers/gpu/drm/nouveau/nouveau_drv.c
drivers/gpu/drm/nouveau/nouveau_drv.h
drivers/gpu/drm/nouveau/nouveau_fb.h
drivers/gpu/drm/nouveau/nouveau_fbcon.c
drivers/gpu/drm/nouveau/nouveau_fence.c
drivers/gpu/drm/nouveau/nouveau_gem.c
drivers/gpu/drm/nouveau/nouveau_mem.c
drivers/gpu/drm/nouveau/nouveau_mm.h
drivers/gpu/drm/nouveau/nouveau_notifier.c
drivers/gpu/drm/nouveau/nouveau_object.c
drivers/gpu/drm/nouveau/nouveau_ramht.c
drivers/gpu/drm/nouveau/nouveau_sgdma.c
drivers/gpu/drm/nouveau/nouveau_state.c
drivers/gpu/drm/nouveau/nouveau_temp.c
drivers/gpu/drm/nouveau/nouveau_util.c
drivers/gpu/drm/nouveau/nouveau_util.h
drivers/gpu/drm/nouveau/nouveau_vm.c
drivers/gpu/drm/nouveau/nouveau_vm.h
drivers/gpu/drm/nouveau/nv04_crtc.c
drivers/gpu/drm/nouveau/nv04_fifo.c
drivers/gpu/drm/nouveau/nv17_tv.c
drivers/gpu/drm/nouveau/nv17_tv.h
drivers/gpu/drm/nouveau/nv17_tv_modes.c
drivers/gpu/drm/nouveau/nv40_fb.c
drivers/gpu/drm/nouveau/nv50_crtc.c
drivers/gpu/drm/nouveau/nv50_cursor.c
drivers/gpu/drm/nouveau/nv50_dac.c
drivers/gpu/drm/nouveau/nv50_display.c
drivers/gpu/drm/nouveau/nv50_display.h
drivers/gpu/drm/nouveau/nv50_evo.c
drivers/gpu/drm/nouveau/nv50_evo.h
drivers/gpu/drm/nouveau/nv50_fb.c
drivers/gpu/drm/nouveau/nv50_fifo.c
drivers/gpu/drm/nouveau/nv50_gpio.c
drivers/gpu/drm/nouveau/nv50_graph.c
drivers/gpu/drm/nouveau/nv50_instmem.c
drivers/gpu/drm/nouveau/nv50_sor.c
drivers/gpu/drm/nouveau/nv50_vm.c
drivers/gpu/drm/nouveau/nv50_vram.c
drivers/gpu/drm/nouveau/nv84_crypt.c
drivers/gpu/drm/nouveau/nvc0_fifo.c
drivers/gpu/drm/nouveau/nvc0_graph.c
drivers/gpu/drm/nouveau/nvc0_instmem.c
drivers/gpu/drm/nouveau/nvc0_vm.c
drivers/gpu/drm/nouveau/nvc0_vram.c
drivers/gpu/drm/r128/r128_drv.c
drivers/gpu/drm/radeon/Makefile
drivers/gpu/drm/radeon/atombios_crtc.c
drivers/gpu/drm/radeon/cayman_blit_shaders.c [new file with mode: 0644]
drivers/gpu/drm/radeon/cayman_blit_shaders.h [new file with mode: 0644]
drivers/gpu/drm/radeon/evergreen.c
drivers/gpu/drm/radeon/evergreen_blit_kms.c
drivers/gpu/drm/radeon/evergreen_cs.c
drivers/gpu/drm/radeon/evergreend.h
drivers/gpu/drm/radeon/ni.c
drivers/gpu/drm/radeon/nid.h
drivers/gpu/drm/radeon/r100.c
drivers/gpu/drm/radeon/r600.c
drivers/gpu/drm/radeon/r600_audio.c
drivers/gpu/drm/radeon/r600_blit_kms.c
drivers/gpu/drm/radeon/r600_cs.c
drivers/gpu/drm/radeon/r600_hdmi.c
drivers/gpu/drm/radeon/r600d.h
drivers/gpu/drm/radeon/radeon.h
drivers/gpu/drm/radeon/radeon_asic.c
drivers/gpu/drm/radeon/radeon_asic.h
drivers/gpu/drm/radeon/radeon_benchmark.c
drivers/gpu/drm/radeon/radeon_connectors.c
drivers/gpu/drm/radeon/radeon_cp.c
drivers/gpu/drm/radeon/radeon_cs.c
drivers/gpu/drm/radeon/radeon_device.c
drivers/gpu/drm/radeon/radeon_display.c
drivers/gpu/drm/radeon/radeon_drv.c
drivers/gpu/drm/radeon/radeon_family.h
drivers/gpu/drm/radeon/radeon_fb.c
drivers/gpu/drm/radeon/radeon_fence.c
drivers/gpu/drm/radeon/radeon_gart.c
drivers/gpu/drm/radeon/radeon_gem.c
drivers/gpu/drm/radeon/radeon_kms.c
drivers/gpu/drm/radeon/radeon_legacy_crtc.c
drivers/gpu/drm/radeon/radeon_mode.h
drivers/gpu/drm/radeon/radeon_object.c
drivers/gpu/drm/radeon/radeon_object.h
drivers/gpu/drm/radeon/radeon_ring.c
drivers/gpu/drm/radeon/radeon_test.c
drivers/gpu/drm/radeon/radeon_ttm.c
drivers/gpu/drm/radeon/reg_srcs/cayman [new file with mode: 0644]
drivers/gpu/drm/radeon/reg_srcs/evergreen
drivers/gpu/drm/radeon/rv770.c
drivers/gpu/drm/savage/savage_drv.c
drivers/gpu/drm/sis/sis_drv.c
drivers/gpu/drm/tdfx/tdfx_drv.c
drivers/gpu/drm/ttm/ttm_agp_backend.c
drivers/gpu/drm/ttm/ttm_bo.c
drivers/gpu/drm/ttm/ttm_page_alloc.c
drivers/gpu/drm/ttm/ttm_tt.c
drivers/gpu/drm/via/via_drv.c
drivers/gpu/drm/vmwgfx/vmwgfx_buffer.c
drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
drivers/hwmon/Kconfig
drivers/hwmon/Makefile
drivers/hwmon/f71882fg.c
drivers/hwmon/lineage-pem.c [new file with mode: 0644]
drivers/hwmon/lis3lv02d_spi.c
drivers/hwmon/lm85.c
drivers/hwmon/ltc4151.c [new file with mode: 0644]
drivers/hwmon/max16064.c [new file with mode: 0644]
drivers/hwmon/max34440.c [new file with mode: 0644]
drivers/hwmon/max6639.c [new file with mode: 0644]
drivers/hwmon/max8688.c [new file with mode: 0644]
drivers/hwmon/pmbus.c [new file with mode: 0644]
drivers/hwmon/pmbus.h [new file with mode: 0644]
drivers/hwmon/pmbus_core.c [new file with mode: 0644]
drivers/hwmon/w83627ehf.c
drivers/i2c/busses/Kconfig
drivers/i2c/busses/Makefile
drivers/i2c/busses/i2c-mxs.c [new file with mode: 0644]
drivers/i2c/busses/i2c-puv3.c [new file with mode: 0644]
drivers/i2c/busses/i2c-tegra.c [new file with mode: 0644]
drivers/infiniband/ulp/iser/iscsi_iser.c
drivers/input/serio/i8042-unicore32io.h [new file with mode: 0644]
drivers/input/serio/i8042.h
drivers/md/dm-mpath.c
drivers/message/fusion/lsi/mpi_cnfg.h
drivers/message/fusion/lsi/mpi_ioc.h
drivers/message/fusion/mptbase.c
drivers/message/fusion/mptctl.c
drivers/message/fusion/mptsas.c
drivers/net/bnx2x/bnx2x_main.c
drivers/pci/Makefile
drivers/s390/block/dasd_eckd.c
drivers/s390/cio/chsc_sch.c
drivers/s390/cio/cio.c
drivers/s390/cio/cio.h
drivers/s390/cio/css.c
drivers/s390/cio/css.h
drivers/s390/cio/device.c
drivers/s390/cio/io_sch.h
drivers/s390/cio/ioasm.h
drivers/s390/cio/orb.h [new file with mode: 0644]
drivers/s390/scsi/zfcp_aux.c
drivers/s390/scsi/zfcp_def.h
drivers/s390/scsi/zfcp_erp.c
drivers/s390/scsi/zfcp_ext.h
drivers/s390/scsi/zfcp_fc.c
drivers/s390/scsi/zfcp_fc.h
drivers/s390/scsi/zfcp_fsf.c
drivers/s390/scsi/zfcp_scsi.c
drivers/scsi/Kconfig
drivers/scsi/Makefile
drivers/scsi/NCR5380.c
drivers/scsi/arcmsr/arcmsr_hba.c
drivers/scsi/be2iscsi/be_iscsi.c
drivers/scsi/be2iscsi/be_iscsi.h
drivers/scsi/be2iscsi/be_main.c
drivers/scsi/bnx2fc/57xx_hsi_bnx2fc.h [new file with mode: 0644]
drivers/scsi/bnx2fc/Kconfig [new file with mode: 0644]
drivers/scsi/bnx2fc/Makefile [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc.h [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_constants.h [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_debug.h [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_els.c [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_fcoe.c [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_hwi.c [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_io.c [new file with mode: 0644]
drivers/scsi/bnx2fc/bnx2fc_tgt.c [new file with mode: 0644]
drivers/scsi/bnx2i/bnx2i.h
drivers/scsi/bnx2i/bnx2i_hwi.c
drivers/scsi/bnx2i/bnx2i_init.c
drivers/scsi/bnx2i/bnx2i_iscsi.c
drivers/scsi/cxgbi/cxgb3i/cxgb3i.c
drivers/scsi/cxgbi/cxgb3i/cxgb3i.h
drivers/scsi/cxgbi/cxgb4i/cxgb4i.c
drivers/scsi/cxgbi/libcxgbi.c
drivers/scsi/cxgbi/libcxgbi.h
drivers/scsi/device_handler/scsi_dh.c
drivers/scsi/device_handler/scsi_dh_alua.c
drivers/scsi/device_handler/scsi_dh_emc.c
drivers/scsi/device_handler/scsi_dh_hp_sw.c
drivers/scsi/device_handler/scsi_dh_rdac.c
drivers/scsi/fcoe/Makefile
drivers/scsi/fcoe/fcoe.c
drivers/scsi/fcoe/fcoe.h
drivers/scsi/fcoe/fcoe_ctlr.c [moved from drivers/scsi/fcoe/libfcoe.c with 98% similarity]
drivers/scsi/fcoe/fcoe_transport.c [new file with mode: 0644]
drivers/scsi/fcoe/libfcoe.h [new file with mode: 0644]
drivers/scsi/fnic/fnic.h
drivers/scsi/fnic/vnic_dev.c
drivers/scsi/hpsa.c
drivers/scsi/hpsa.h
drivers/scsi/hpsa_cmd.h
drivers/scsi/ipr.c
drivers/scsi/iscsi_tcp.c
drivers/scsi/iscsi_tcp.h
drivers/scsi/libfc/fc_exch.c
drivers/scsi/libfc/fc_fcp.c
drivers/scsi/libfc/fc_libfc.c
drivers/scsi/libfc/fc_libfc.h
drivers/scsi/libfc/fc_lport.c
drivers/scsi/libfc/fc_npiv.c
drivers/scsi/libfc/fc_rport.c
drivers/scsi/libiscsi.c
drivers/scsi/libsas/Kconfig
drivers/scsi/libsas/Makefile
drivers/scsi/libsas/sas_ata.c
drivers/scsi/libsas/sas_dump.c
drivers/scsi/libsas/sas_dump.h
drivers/scsi/libsas/sas_expander.c
drivers/scsi/libsas/sas_internal.h
drivers/scsi/libsas/sas_scsi_host.c
drivers/scsi/lpfc/lpfc.h
drivers/scsi/lpfc/lpfc_attr.c
drivers/scsi/lpfc/lpfc_crtn.h
drivers/scsi/lpfc/lpfc_ct.c
drivers/scsi/lpfc/lpfc_debugfs.c
drivers/scsi/lpfc/lpfc_debugfs.h
drivers/scsi/lpfc/lpfc_els.c
drivers/scsi/lpfc/lpfc_hbadisc.c
drivers/scsi/lpfc/lpfc_hw.h
drivers/scsi/lpfc/lpfc_hw4.h
drivers/scsi/lpfc/lpfc_init.c
drivers/scsi/lpfc/lpfc_mbox.c
drivers/scsi/lpfc/lpfc_nportdisc.c
drivers/scsi/lpfc/lpfc_scsi.c
drivers/scsi/lpfc/lpfc_sli.c
drivers/scsi/lpfc/lpfc_sli4.h
drivers/scsi/lpfc/lpfc_version.h
drivers/scsi/lpfc/lpfc_vport.c
drivers/scsi/megaraid/megaraid_sas.h
drivers/scsi/megaraid/megaraid_sas_base.c
drivers/scsi/megaraid/megaraid_sas_fusion.c
drivers/scsi/mpt2sas/mpi/mpi2.h
drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h
drivers/scsi/mpt2sas/mpi/mpi2_history.txt [deleted file]
drivers/scsi/mpt2sas/mpi/mpi2_sas.h
drivers/scsi/mpt2sas/mpi/mpi2_tool.h
drivers/scsi/mpt2sas/mpt2sas_base.c
drivers/scsi/mpt2sas/mpt2sas_base.h
drivers/scsi/mpt2sas/mpt2sas_scsih.c
drivers/scsi/osd/osd_initiator.c
drivers/scsi/pm8001/pm8001_hwi.c
drivers/scsi/pm8001/pm8001_init.c
drivers/scsi/pm8001/pm8001_sas.h
drivers/scsi/pmcraid.c
drivers/scsi/qla2xxx/qla_def.h
drivers/scsi/qla2xxx/qla_gbl.h
drivers/scsi/qla2xxx/qla_gs.c
drivers/scsi/qla2xxx/qla_init.c
drivers/scsi/qla2xxx/qla_iocb.c
drivers/scsi/qla2xxx/qla_mbx.c
drivers/scsi/qla2xxx/qla_nx.c
drivers/scsi/qla2xxx/qla_os.c
drivers/scsi/qla2xxx/qla_version.h
drivers/scsi/scsi_debug.c
drivers/scsi/scsi_devinfo.c
drivers/scsi/scsi_error.c
drivers/scsi/scsi_lib.c
drivers/scsi/scsi_priv.h
drivers/scsi/scsi_transport_iscsi.c
drivers/scsi/sd.c
drivers/scsi/sd.h
drivers/target/target_core_cdb.c
drivers/tty/hvc/hvc_xen.c
drivers/tty/serial/sh-sci.c
drivers/tty/serial/sh-sci.h
drivers/video/Kconfig
drivers/video/Makefile
drivers/video/fb-puv3.c [new file with mode: 0644]
drivers/video/sh_mobile_lcdcfb.c
drivers/video/sh_mobile_lcdcfb.h
drivers/video/via/chip.h
drivers/video/via/dvi.c
drivers/video/via/hw.c
drivers/video/via/hw.h
drivers/video/via/lcd.c
drivers/video/via/share.h
drivers/video/via/tblDPASetting.c
drivers/video/via/tblDPASetting.h
drivers/video/via/via_i2c.c
drivers/video/via/viafbdev.c
drivers/video/via/viamode.c
drivers/video/via/viamode.h
drivers/video/via/vt1636.c
drivers/watchdog/Kconfig
drivers/watchdog/Makefile
drivers/watchdog/alim1535_wdt.c
drivers/watchdog/alim7101_wdt.c
drivers/watchdog/bcm47xx_wdt.c
drivers/watchdog/bfin_wdt.c
drivers/watchdog/booke_wdt.c
drivers/watchdog/cpwd.c
drivers/watchdog/eurotechwdt.c
drivers/watchdog/hpwdt.c
drivers/watchdog/i6300esb.c
drivers/watchdog/iTCO_wdt.c
drivers/watchdog/intel_scu_watchdog.c [new file with mode: 0644]
drivers/watchdog/intel_scu_watchdog.h [new file with mode: 0644]
drivers/watchdog/it8712f_wdt.c
drivers/watchdog/it87_wdt.c
drivers/watchdog/jz4740_wdt.c [new file with mode: 0644]
drivers/watchdog/machzwd.c
drivers/watchdog/max63xx_wdt.c
drivers/watchdog/mpc8xxx_wdt.c
drivers/watchdog/mpcore_wdt.c
drivers/watchdog/mtx-1_wdt.c
drivers/watchdog/nv_tco.c
drivers/watchdog/omap_wdt.h
drivers/watchdog/pc87413_wdt.c
drivers/watchdog/pcwd_pci.c
drivers/watchdog/pnx4008_wdt.c
drivers/watchdog/s3c2410_wdt.c
drivers/watchdog/sbc8360.c
drivers/watchdog/sbc_fitpc2_wdt.c
drivers/watchdog/shwdt.c
drivers/watchdog/smsc37b787_wdt.c
drivers/watchdog/softdog.c
drivers/watchdog/sp5100_tco.c
drivers/watchdog/ts72xx_wdt.c
drivers/watchdog/w83697ug_wdt.c
drivers/watchdog/wdt.c
drivers/watchdog/wdt977.c
drivers/watchdog/wdt_pci.c
drivers/watchdog/xen_wdt.c [new file with mode: 0644]
drivers/xen/Kconfig
drivers/xen/Makefile
drivers/xen/balloon.c
drivers/xen/events.c
drivers/xen/gntalloc.c [new file with mode: 0644]
drivers/xen/gntdev.c
drivers/xen/grant-table.c
drivers/xen/manage.c
drivers/xen/xen-balloon.c [new file with mode: 0644]
drivers/xen/xenbus/xenbus_probe.c
drivers/xen/xenbus/xenbus_probe.h
drivers/xen/xenbus/xenbus_probe_frontend.c
fs/ext3/balloc.c
fs/ext3/namei.c
fs/ext3/super.c
fs/jbd/journal.c
fs/jbd2/journal.c
fs/nfs/callback_proc.c
fs/nfs/client.c
fs/nfs/direct.c
fs/nfs/file.c
fs/nfs/idmap.c
fs/nfs/internal.h
fs/nfs/nfs3proc.c
fs/nfs/nfs4_fs.h
fs/nfs/nfs4filelayout.c
fs/nfs/nfs4filelayout.h
fs/nfs/nfs4filelayoutdev.c
fs/nfs/nfs4proc.c
fs/nfs/nfs4renewd.c
fs/nfs/nfs4state.c
fs/nfs/nfs4xdr.c
fs/nfs/pagelist.c
fs/nfs/pnfs.c
fs/nfs/pnfs.h
fs/nfs/proc.c
fs/nfs/read.c
fs/nfs/super.c
fs/nfs/write.c
fs/quota/quota_v2.c
fs/udf/balloc.c
fs/udf/file.c
fs/udf/inode.c
fs/udf/truncate.c
fs/udf/udfdecl.h
include/asm-generic/ftrace.h [new file with mode: 0644]
include/asm-generic/io.h
include/asm-generic/sizes.h [new file with mode: 0644]
include/asm-generic/uaccess.h
include/drm/Kbuild
include/drm/drm.h
include/drm/drmP.h
include/drm/drm_crtc.h
include/drm/drm_hashtab.h
include/drm/drm_mm.h
include/drm/drm_mode.h
include/drm/drm_pciids.h
include/drm/drm_usb.h [new file with mode: 0644]
include/drm/i830_drm.h [deleted file]
include/drm/i915_drm.h
include/drm/nouveau_drm.h
include/drm/radeon_drm.h
include/drm/ttm/ttm_bo_driver.h
include/drm/ttm/ttm_page_alloc.h
include/linux/cpufreq.h
include/linux/fb.h
include/linux/i2c-tegra.h [new file with mode: 0644]
include/linux/i2c/max6639.h [new file with mode: 0644]
include/linux/i2c/pmbus.h [new file with mode: 0644]
include/linux/mm.h
include/linux/nfs_fs.h
include/linux/nfs_fs_sb.h
include/linux/nfs_idmap.h
include/linux/nfs_iostat.h
include/linux/nfs_page.h
include/linux/nfs_xdr.h
include/linux/pci_ids.h
include/linux/serial_sci.h
include/linux/sunrpc/clnt.h
include/linux/sunrpc/xprt.h
include/scsi/fc/fc_ns.h
include/scsi/fc_encode.h
include/scsi/libfc.h
include/scsi/libfcoe.h
include/scsi/libiscsi.h
include/scsi/scsi.h
include/scsi/scsi_device.h
include/scsi/scsi_transport_iscsi.h
include/trace/events/scsi.h
include/video/sh_mobile_lcdc.h
include/xen/balloon.h [new file with mode: 0644]
include/xen/events.h
include/xen/gntalloc.h [new file with mode: 0644]
include/xen/gntdev.h
include/xen/interface/sched.h
include/xen/xenbus.h
kernel/gcov/Kconfig
kernel/smp.c
mm/page_alloc.c
net/sunrpc/auth_gss/auth_gss.c
net/sunrpc/auth_gss/gss_krb5_mech.c
net/sunrpc/clnt.c
net/sunrpc/sched.c
net/sunrpc/xprt.c
net/sunrpc/xprtrdma/rpc_rdma.c
net/sunrpc/xprtrdma/verbs.c
net/sunrpc/xprtrdma/xprt_rdma.h

index 737988f..e74d0a2 100644 (file)
@@ -158,6 +158,17 @@ intensive calculation on your laptop that you do not care how long it
 takes to complete as you can 'nice' it and prevent it from taking part
 in the deciding process of whether to increase your CPU frequency.
 
+sampling_down_factor: this parameter controls the rate at which the
+kernel makes a decision on when to decrease the frequency while running
+at top speed. When set to 1 (the default) decisions to reevaluate load
+are made at the same interval regardless of current clock speed. But
+when set to greater than 1 (e.g. 100) it acts as a multiplier for the
+scheduling interval for reevaluating load when the CPU is at its top
+speed due to high load. This improves performance by reducing the overhead
+of load evaluation and helping the CPU stay at its top speed when truly
+busy, rather than shifting back and forth in speed. This tunable has no
+effect on behavior at lower speeds/lower CPU loads.
+
 
 2.5 Conservative
 ----------------
index bc0b9cf..983e14a 100644 (file)
@@ -46,3 +46,10 @@ data server cache
 file driver devices refer to data servers, which are kept in a module
 level cache.  Its reference is held over the lifetime of the deviceid
 pointing to it.
+
+lseg
+----
+lseg maintains an extra reference corresponding to the NFS_LSEG_VALID
+bit which holds it in the pnfs_layout_hdr's list.  When the final lseg
+is removed from the pnfs_layout_hdr's list, the NFS_LAYOUT_DESTROYED
+bit is set, preventing any new lsegs from being added.
index a7952c2..4d0bc70 100644 (file)
@@ -10,6 +10,10 @@ Supported chips:
     Prefix: 'f71862fg'
     Addresses scanned: none, address read from Super I/O config space
     Datasheet: Available from the Fintek website
+  * Fintek F71869F and F71869E
+    Prefix: 'f71869'
+    Addresses scanned: none, address read from Super I/O config space
+    Datasheet: Available from the Fintek website
   * Fintek F71882FG and F71883FG
     Prefix: 'f71882fg'
     Addresses scanned: none, address read from Super I/O config space
@@ -17,6 +21,10 @@ Supported chips:
   * Fintek F71889FG
     Prefix: 'f71889fg'
     Addresses scanned: none, address read from Super I/O config space
+    Datasheet: Available from the Fintek website
+  * Fintek F71889ED
+    Prefix: 'f71889ed'
+    Addresses scanned: none, address read from Super I/O config space
     Datasheet: Should become available on the Fintek website soon
   * Fintek F8000
     Prefix: 'f8000'
@@ -29,9 +37,9 @@ Author: Hans de Goede <hdegoede@redhat.com>
 Description
 -----------
 
-Fintek F718xxFG/F8000 Super I/O chips include complete hardware monitoring
-capabilities. They can monitor up to 9 voltages (3 for the F8000), 4 fans and
-3 temperature sensors.
+Fintek F718xx/F8000 Super I/O chips include complete hardware monitoring
+capabilities. They can monitor up to 9 voltages, 4 fans and 3 temperature
+sensors.
 
 These chips also have fan controlling features, using either DC or PWM, in
 three different modes (one manual, two automatic).
@@ -99,5 +107,5 @@ Writing an unsupported mode will result in an invalid parameter error.
   The fan speed is regulated to keep the temp the fan is mapped to between
   temp#_auto_point2_temp and temp#_auto_point3_temp.
 
-Both of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
+All of the automatic modes require that pwm1 corresponds to fan1, pwm2 to
 fan2 and pwm3 to fan3.
diff --git a/Documentation/hwmon/lineage-pem b/Documentation/hwmon/lineage-pem
new file mode 100644 (file)
index 0000000..2ba5ed1
--- /dev/null
@@ -0,0 +1,77 @@
+Kernel driver lineage-pem
+=========================
+
+Supported devices:
+  * Lineage Compact Power Line Power Entry Modules
+    Prefix: 'lineage-pem'
+    Addresses scanned: -
+    Documentation:
+        http://www.lineagepower.com/oem/pdf/CPLI2C.pdf
+
+Author: Guenter Roeck <guenter.roeck@ericsson.com>
+
+
+Description
+-----------
+
+This driver supports various Lineage Compact Power Line DC/DC and AC/DC
+converters such as CP1800, CP2000AC, CP2000DC, CP2100DC, and others.
+
+Lineage CPL power entry modules are nominally PMBus compliant. However, most
+standard PMBus commands are not supported. Specifically, all hardware monitoring
+and status reporting commands are non-standard. For this reason, a standard
+PMBus driver can not be used.
+
+
+Usage Notes
+-----------
+
+This driver does not probe for Lineage CPL devices, since there is no register
+which can be safely used to identify the chip. You will have to instantiate
+the devices explicitly.
+
+Example: the following will load the driver for a Lineage PEM at address 0x40
+on I2C bus #1:
+$ modprobe lineage-pem
+$ echo lineage-pem 0x40 > /sys/bus/i2c/devices/i2c-1/new_device
+
+All Lineage CPL power entry modules have a built-in I2C bus master selector
+(PCA9541). To ensure device access, this driver should only be used as client
+driver to the pca9541 I2C master selector driver.
+
+
+Sysfs entries
+-------------
+
+All Lineage CPL devices report output voltage and device temperature as well as
+alarms for output voltage, temperature, input voltage, input current, input power,
+and fan status.
+
+Input voltage, input current, input power, and fan speed measurement is only
+supported on newer devices. The driver detects if those attributes are supported,
+and only creates respective sysfs entries if they are.
+
+in1_input              Output voltage (mV)
+in1_min_alarm          Output undervoltage alarm
+in1_max_alarm          Output overvoltage alarm
+in1_crit               Output voltage critical alarm
+
+in2_input              Input voltage (mV, optional)
+in2_alarm              Input voltage alarm
+
+curr1_input            Input current (mA, optional)
+curr1_alarm            Input overcurrent alarm
+
+power1_input           Input power (uW, optional)
+power1_alarm           Input power alarm
+
+fan1_input             Fan 1 speed (rpm, optional)
+fan2_input             Fan 2 speed (rpm, optional)
+fan3_input             Fan 3 speed (rpm, optional)
+
+temp1_input
+temp1_max
+temp1_crit
+temp1_alarm
+temp1_crit_alarm
+temp1_fault
index 239258a..7c49fea 100644 (file)
@@ -26,6 +26,14 @@ Supported chips:
     Prefix: 'emc6d102'
     Addresses scanned: I2C 0x2c, 0x2d, 0x2e
     Datasheet: http://www.smsc.com/main/catalog/emc6d102.html
+  * SMSC EMC6D103
+    Prefix: 'emc6d103'
+    Addresses scanned: I2C 0x2c, 0x2d, 0x2e
+    Datasheet: http://www.smsc.com/main/catalog/emc6d103.html
+  * SMSC EMC6D103S
+    Prefix: 'emc6d103s'
+    Addresses scanned: I2C 0x2c, 0x2d, 0x2e
+    Datasheet: http://www.smsc.com/main/catalog/emc6d103s.html
 
 Authors:
         Philip Pokorny <ppokorny@penguincomputing.com>,
@@ -122,9 +130,11 @@ to be register compatible. The EMC6D100 offers all the features of the
 EMC6D101 plus additional voltage monitoring and system control features.
 Unfortunately it is not possible to distinguish between the package
 versions on register level so these additional voltage inputs may read
-zero. The EMC6D102 features addtional ADC bits thus extending precision
+zero. EMC6D102 and EMC6D103 feature additional ADC bits thus extending precision
 of voltage and temperature channels.
 
+SMSC EMC6D103S is similar to EMC6D103, but does not support pwm#_auto_pwm_minctl
+and temp#_auto_temp_off.
 
 Hardware Configurations
 -----------------------
diff --git a/Documentation/hwmon/ltc4151 b/Documentation/hwmon/ltc4151
new file mode 100644 (file)
index 0000000..43c667e
--- /dev/null
@@ -0,0 +1,47 @@
+Kernel driver ltc4151
+=====================
+
+Supported chips:
+  * Linear Technology LTC4151
+    Prefix: 'ltc4151'
+    Addresses scanned: -
+    Datasheet:
+        http://www.linear.com/docs/Datasheet/4151fc.pdf
+
+Author: Per Dalen <per.dalen@appeartv.com>
+
+
+Description
+-----------
+
+The LTC4151 is a High Voltage I2C Current and Voltage Monitor.
+
+
+Usage Notes
+-----------
+
+This driver does not probe for LTC4151 devices, since there is no register
+which can be safely used to identify the chip. You will have to instantiate
+the devices explicitly.
+
+Example: the following will load the driver for an LTC4151 at address 0x6f
+on I2C bus #0:
+# modprobe ltc4151
+# echo ltc4151 0x6f > /sys/bus/i2c/devices/i2c-0/new_device
+
+
+Sysfs entries
+-------------
+
+Voltage readings provided by this driver are reported as obtained from the ADIN
+and VIN registers.
+
+Current reading provided by this driver is reported as obtained from the Current
+Sense register. The reported value assumes that a 1 mOhm sense resistor is
+installed.
+
+in1_input              VDIN voltage (mV)
+
+in2_input              ADIN voltage (mV)
+
+curr1_input            SENSE current (mA)
diff --git a/Documentation/hwmon/max6639 b/Documentation/hwmon/max6639
new file mode 100644 (file)
index 0000000..dc49f8b
--- /dev/null
@@ -0,0 +1,49 @@
+Kernel driver max6639
+=====================
+
+Supported chips:
+  * Maxim MAX6639
+    Prefix: 'max6639'
+    Addresses scanned: I2C 0x2c, 0x2e, 0x2f
+    Datasheet: http://pdfserv.maxim-ic.com/en/ds/MAX6639.pdf
+
+Authors:
+    He Changqing <hechangqing@semptian.com>
+    Roland Stigge <stigge@antcom.de>
+
+Description
+-----------
+
+This driver implements support for the Maxim MAX6639. This chip is a 2-channel
+temperature monitor with dual PWM fan speed controller. It can monitor its own
+temperature and one external diode-connected transistor or two external
+diode-connected transistors.
+
+The following device attributes are implemented via sysfs:
+
+Attribute              R/W  Contents
+----------------------------------------------------------------------------
+temp1_input            R    Temperature channel 1 input (0..150 C)
+temp2_input            R    Temperature channel 2 input (0..150 C)
+temp1_fault            R    Temperature channel 1 diode fault
+temp2_fault            R    Temperature channel 2 diode fault
+temp1_max              RW   Set THERM temperature for input 1
+                            (in C, see datasheet)
+temp2_max              RW   Set THERM temperature for input 2
+temp1_crit             RW   Set ALERT temperature for input 1
+temp2_crit             RW   Set ALERT temperature for input 2
+temp1_emergency        RW   Set OT temperature for input 1
+                            (in C, see datasheet)
+temp2_emergency        RW   Set OT temperature for input 2
+pwm1                   RW   Fan 1 target duty cycle (0..255)
+pwm2                   RW   Fan 2 target duty cycle (0..255)
+fan1_input             R    TACH1 fan tachometer input (in RPM)
+fan2_input             R    TACH2 fan tachometer input (in RPM)
+fan1_fault             R    Fan 1 fault
+fan2_fault             R    Fan 2 fault
+temp1_max_alarm        R    Alarm on THERM temperature on channel 1
+temp2_max_alarm        R    Alarm on THERM temperature on channel 2
+temp1_crit_alarm       R    Alarm on ALERT temperature on channel 1
+temp2_crit_alarm       R    Alarm on ALERT temperature on channel 2
+temp1_emergency_alarm  R    Alarm on OT temperature on channel 1
+temp2_emergency_alarm  R    Alarm on OT temperature on channel 2
diff --git a/Documentation/hwmon/pmbus b/Documentation/hwmon/pmbus
new file mode 100644 (file)
index 0000000..f2d42e8
--- /dev/null
@@ -0,0 +1,215 @@
+Kernel driver pmbus
+====================
+
+Supported chips:
+  * Ericsson BMR45X series
+    DC/DC Converter
+    Prefixes: 'bmr450', 'bmr451', 'bmr453', 'bmr454'
+    Addresses scanned: -
+    Datasheet:
+ http://archive.ericsson.net/service/internet/picov/get?DocNo=28701-EN/LZT146395
+  * Linear Technology LTC2978
+    Octal PMBus Power Supply Monitor and Controller
+    Prefix: 'ltc2978'
+    Addresses scanned: -
+    Datasheet: http://cds.linear.com/docs/Datasheet/2978fa.pdf
+  * Maxim MAX16064
+    Quad Power-Supply Controller
+    Prefix: 'max16064'
+    Addresses scanned: -
+    Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX16064.pdf
+  * Maxim MAX34440
+    PMBus 6-Channel Power-Supply Manager
+    Prefixes: 'max34440'
+    Addresses scanned: -
+    Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34440.pdf
+  * Maxim MAX34441
+    PMBus 5-Channel Power-Supply Manager and Intelligent Fan Controller
+    Prefixes: 'max34441'
+    Addresses scanned: -
+    Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX34441.pdf
+  * Maxim MAX8688
+    Digital Power-Supply Controller/Monitor
+    Prefix: 'max8688'
+    Addresses scanned: -
+    Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8688.pdf
+  * Generic PMBus devices
+    Prefix: 'pmbus'
+    Addresses scanned: -
+    Datasheet: n.a.
+
+Author: Guenter Roeck <guenter.roeck@ericsson.com>
+
+
+Description
+-----------
+
+This driver supports hardware montoring for various PMBus compliant devices.
+It supports voltage, current, power, and temperature sensors as supported
+by the device.
+
+Each monitored channel has its own high and low limits, plus a critical
+limit.
+
+Fan support will be added in a later version of this driver.
+
+
+Usage Notes
+-----------
+
+This driver does not probe for PMBus devices, since there is no register
+which can be safely used to identify the chip (The MFG_ID register is not
+supported by all chips), and since there is no well defined address range for
+PMBus devices. You will have to instantiate the devices explicitly.
+
+Example: the following will load the driver for an LTC2978 at address 0x60
+on I2C bus #1:
+$ modprobe pmbus
+$ echo ltc2978 0x60 > /sys/bus/i2c/devices/i2c-1/new_device
+
+
+Platform data support
+---------------------
+
+Support for additional PMBus chips can be added by defining chip parameters in
+a new chip specific driver file. For example, (untested) code to add support for
+Emerson DS1200 power modules might look as follows.
+
+static struct pmbus_driver_info ds1200_info = {
+       .pages = 1,
+       /* Note: All other sensors are in linear mode */
+       .direct[PSC_VOLTAGE_OUT] = true,
+       .direct[PSC_TEMPERATURE] = true,
+       .direct[PSC_CURRENT_OUT] = true,
+       .m[PSC_VOLTAGE_IN] = 1,
+       .b[PSC_VOLTAGE_IN] = 0,
+       .R[PSC_VOLTAGE_IN] = 3,
+       .m[PSC_VOLTAGE_OUT] = 1,
+       .b[PSC_VOLTAGE_OUT] = 0,
+       .R[PSC_VOLTAGE_OUT] = 3,
+       .m[PSC_TEMPERATURE] = 1,
+       .b[PSC_TEMPERATURE] = 0,
+       .R[PSC_TEMPERATURE] = 3,
+       .func[0] = PMBUS_HAVE_VIN | PMBUS_HAVE_IIN | PMBUS_HAVE_STATUS_INPUT
+                  | PMBUS_HAVE_VOUT | PMBUS_HAVE_STATUS_VOUT
+                  | PMBUS_HAVE_IOUT | PMBUS_HAVE_STATUS_IOUT
+                  | PMBUS_HAVE_PIN | PMBUS_HAVE_POUT
+                  | PMBUS_HAVE_TEMP | PMBUS_HAVE_STATUS_TEMP
+                  | PMBUS_HAVE_FAN12 | PMBUS_HAVE_STATUS_FAN12,
+};
+
+static int ds1200_probe(struct i2c_client *client,
+                       const struct i2c_device_id *id)
+{
+       return pmbus_do_probe(client, id, &ds1200_info);
+}
+
+static int ds1200_remove(struct i2c_client *client)
+{
+       return pmbus_do_remove(client);
+}
+
+static const struct i2c_device_id ds1200_id[] = {
+       {"ds1200", 0},
+       {}
+};
+
+MODULE_DEVICE_TABLE(i2c, ds1200_id);
+
+/* This is the driver that will be inserted */
+static struct i2c_driver ds1200_driver = {
+       .driver = {
+                  .name = "ds1200",
+                  },
+       .probe = ds1200_probe,
+       .remove = ds1200_remove,
+       .id_table = ds1200_id,
+};
+
+static int __init ds1200_init(void)
+{
+       return i2c_add_driver(&ds1200_driver);
+}
+
+static void __exit ds1200_exit(void)
+{
+       i2c_del_driver(&ds1200_driver);
+}
+
+
+Sysfs entries
+-------------
+
+When probing the chip, the driver identifies which PMBus registers are
+supported, and determines available sensors from this information.
+Attribute files only exist if respective sensors are suported by the chip.
+Labels are provided to inform the user about the sensor associated with
+a given sysfs entry.
+
+The following attributes are supported. Limits are read-write; all other
+attributes are read-only.
+
+inX_input              Measured voltage. From READ_VIN or READ_VOUT register.
+inX_min                        Minumum Voltage.
+                       From VIN_UV_WARN_LIMIT or VOUT_UV_WARN_LIMIT register.
+inX_max                        Maximum voltage.
+                       From VIN_OV_WARN_LIMIT or VOUT_OV_WARN_LIMIT register.
+inX_lcrit              Critical minumum Voltage.
+                       From VIN_UV_FAULT_LIMIT or VOUT_UV_FAULT_LIMIT register.
+inX_crit               Critical maximum voltage.
+                       From VIN_OV_FAULT_LIMIT or VOUT_OV_FAULT_LIMIT register.
+inX_min_alarm          Voltage low alarm. From VOLTAGE_UV_WARNING status.
+inX_max_alarm          Voltage high alarm. From VOLTAGE_OV_WARNING status.
+inX_lcrit_alarm                Voltage critical low alarm.
+                       From VOLTAGE_UV_FAULT status.
+inX_crit_alarm         Voltage critical high alarm.
+                       From VOLTAGE_OV_FAULT status.
+inX_label              "vin", "vcap", or "voutY"
+
+currX_input            Measured current. From READ_IIN or READ_IOUT register.
+currX_max              Maximum current.
+                       From IIN_OC_WARN_LIMIT or IOUT_OC_WARN_LIMIT register.
+currX_lcrit            Critical minumum output current.
+                       From IOUT_UC_FAULT_LIMIT register.
+currX_crit             Critical maximum current.
+                       From IIN_OC_FAULT_LIMIT or IOUT_OC_FAULT_LIMIT register.
+currX_alarm            Current high alarm.
+                       From IIN_OC_WARNING or IOUT_OC_WARNING status.
+currX_lcrit_alarm      Output current critical low alarm.
+                       From IOUT_UC_FAULT status.
+currX_crit_alarm       Current critical high alarm.
+                       From IIN_OC_FAULT or IOUT_OC_FAULT status.
+currX_label            "iin" or "vinY"
+
+powerX_input           Measured power. From READ_PIN or READ_POUT register.
+powerX_cap             Output power cap. From POUT_MAX register.
+powerX_max             Power limit. From PIN_OP_WARN_LIMIT or
+                       POUT_OP_WARN_LIMIT register.
+powerX_crit            Critical output power limit.
+                       From POUT_OP_FAULT_LIMIT register.
+powerX_alarm           Power high alarm.
+                       From PIN_OP_WARNING or POUT_OP_WARNING status.
+powerX_crit_alarm      Output power critical high alarm.
+                       From POUT_OP_FAULT status.
+powerX_label           "pin" or "poutY"
+
+tempX_input            Measured tempererature.
+                       From READ_TEMPERATURE_X register.
+tempX_min              Mimimum tempererature. From UT_WARN_LIMIT register.
+tempX_max              Maximum tempererature. From OT_WARN_LIMIT register.
+tempX_lcrit            Critical low tempererature.
+                       From UT_FAULT_LIMIT register.
+tempX_crit             Critical high tempererature.
+                       From OT_FAULT_LIMIT register.
+tempX_min_alarm                Chip temperature low alarm. Set by comparing
+                       READ_TEMPERATURE_X with UT_WARN_LIMIT if
+                       TEMP_UT_WARNING status is set.
+tempX_max_alarm                Chip temperature high alarm. Set by comparing
+                       READ_TEMPERATURE_X with OT_WARN_LIMIT if
+                       TEMP_OT_WARNING status is set.
+tempX_lcrit_alarm      Chip temperature critical low alarm. Set by comparing
+                       READ_TEMPERATURE_X with UT_FAULT_LIMIT if
+                       TEMP_UT_FAULT status is set.
+tempX_crit_alarm       Chip temperature critical high alarm. Set by comparing
+                       READ_TEMPERATURE_X with OT_FAULT_LIMIT if
+                       TEMP_OT_FAULT status is set.
index c6559f1..83a6987 100644 (file)
@@ -187,6 +187,17 @@ fan[1-*]_div       Fan divisor.
                Note that this is actually an internal clock divisor, which
                affects the measurable speed range, not the read value.
 
+fan[1-*]_pulses        Number of tachometer pulses per fan revolution.
+               Integer value, typically between 1 and 4.
+               RW
+               This value is a characteristic of the fan connected to the
+               device's input, so it has to be set in accordance with the fan
+               model.
+               Should only be created if the chip has a register to configure
+               the number of pulses. In the absence of such a register (and
+               thus attribute) the value assumed by all devices is 2 pulses
+               per fan revolution.
+
 fan[1-*]_target
                Desired fan speed
                Unit: revolution/min (RPM)
index 13d5561..76ffef9 100644 (file)
@@ -5,13 +5,11 @@ Supported chips:
   * Winbond W83627EHF/EHG (ISA access ONLY)
     Prefix: 'w83627ehf'
     Addresses scanned: ISA address retrieved from Super I/O registers
-    Datasheet:
-        http://www.nuvoton.com.tw/NR/rdonlyres/A6A258F0-F0C9-4F97-81C0-C4D29E7E943E/0/W83627EHF.pdf
+    Datasheet: not available
   * Winbond W83627DHG
     Prefix: 'w83627dhg'
     Addresses scanned: ISA address retrieved from Super I/O registers
-    Datasheet:
-        http://www.nuvoton.com.tw/NR/rdonlyres/7885623D-A487-4CF9-A47F-30C5F73D6FE6/0/W83627DHG.pdf
+    Datasheet: not available
   * Winbond W83627DHG-P
     Prefix: 'w83627dhg'
     Addresses scanned: ISA address retrieved from Super I/O registers
@@ -24,6 +22,14 @@ Supported chips:
     Prefix: 'w83667hg'
     Addresses scanned: ISA address retrieved from Super I/O registers
     Datasheet: Available from Nuvoton upon request
+  * Nuvoton NCT6775F/W83667HG-I
+    Prefix: 'nct6775'
+    Addresses scanned: ISA address retrieved from Super I/O registers
+    Datasheet: Available from Nuvoton upon request
+  * Nuvoton NCT6776F
+    Prefix: 'nct6776'
+    Addresses scanned: ISA address retrieved from Super I/O registers
+    Datasheet: Available from Nuvoton upon request
 
 Authors:
         Jean Delvare <khali@linux-fr.org>
@@ -36,19 +42,28 @@ Description
 -----------
 
 This driver implements support for the Winbond W83627EHF, W83627EHG,
-W83627DHG, W83627DHG-P, W83667HG and W83667HG-B super I/O chips.
-We will refer to them collectively as Winbond chips.
-
-The chips implement three temperature sensors, five fan rotation
-speed sensors, ten analog voltage sensors (only nine for the 627DHG), one
-VID (6 pins for the 627EHF/EHG, 8 pins for the 627DHG and 667HG), alarms
-with beep warnings (control unimplemented), and some automatic fan
-regulation strategies (plus manual fan control mode).
+W83627DHG, W83627DHG-P, W83667HG, W83667HG-B, W83667HG-I (NCT6775F),
+and NCT6776F super I/O chips. We will refer to them collectively as
+Winbond chips.
+
+The chips implement three temperature sensors (up to four for 667HG-B, and nine
+for NCT6775F and NCT6776F), five fan rotation speed sensors, ten analog voltage
+sensors (only nine for the 627DHG), one VID (6 pins for the 627EHF/EHG, 8 pins
+for the 627DHG and 667HG), alarms with beep warnings (control unimplemented),
+and some automatic fan regulation strategies (plus manual fan control mode).
+
+The temperature sensor sources on W82677HG-B, NCT6775F, and NCT6776F are
+configurable. temp4 and higher attributes are only reported if its temperature
+source differs from the temperature sources of the already reported temperature
+sensors. The configured source for each of the temperature sensors is provided
+in tempX_label.
 
 Temperatures are measured in degrees Celsius and measurement resolution is 1
-degC for temp1 and 0.5 degC for temp2 and temp3. An alarm is triggered when
-the temperature gets higher than high limit; it stays on until the temperature
-falls below the hysteresis value.
+degC for temp1 and and 0.5 degC for temp2 and temp3. For temp4 and higher,
+resolution is 1 degC for W83667HG-B and 0.0 degC for NCT6775F and NCT6776F.
+An alarm is triggered when the temperature gets higher than high limit;
+it stays on until the temperature falls below the hysteresis value.
+Alarms are only supported for temp1, temp2, and temp3.
 
 Fan rotation speeds are reported in RPM (rotations per minute). An alarm is
 triggered if the rotation speed has dropped below a programmable limit. Fan
@@ -80,7 +95,8 @@ prog  -> pwm4 (not on 667HG and 667HG-B; the programmable setting is not
 
 name - this is a standard hwmon device entry. For the W83627EHF and W83627EHG,
        it is set to "w83627ehf", for the W83627DHG it is set to "w83627dhg",
-       and for the W83667HG it is set to "w83667hg".
+       for the W83667HG and W83667HG-B it is set to "w83667hg", for NCT6775F it
+       is set to "nct6775", and for NCT6776F it is set to "nct6776".
 
 pwm[1-4] - this file stores PWM duty cycle or DC value (fan speed) in range:
           0 (stop) to 255 (full)
@@ -90,6 +106,18 @@ pwm[1-4]_enable - this file controls mode of fan/temperature control:
        * 2 "Thermal Cruise" mode
        * 3 "Fan Speed Cruise" mode
        * 4 "Smart Fan III" mode
+       * 5 "Smart Fan IV" mode
+
+       SmartFan III mode is not supported on NCT6776F.
+
+       SmartFan IV mode is configurable only if it was configured at system
+       startup, and is only supported for W83677HG-B, NCT6775F, and NCT6776F.
+       SmartFan IV operational parameters can not be configured at this time,
+       and the various pwm attributes are not used in SmartFan IV mode.
+       The attributes can be written to, which is useful if you plan to
+       configure the system for a different pwm mode. However, the information
+       returned when reading pwm attributes is unrelated to SmartFan IV
+       operation.
 
 pwm[1-4]_mode - controls if output is PWM or DC level
         * 0 DC output (0 - 12v)
index 738c6fd..534dbaf 100644 (file)
@@ -1580,6 +1580,14 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
                        of returning the full 64-bit number.
                        The default is to return 64-bit inode numbers.
 
+       nfs.nfs4_disable_idmapping=
+                       [NFSv4] When set, this option disables the NFSv4
+                       idmapper on the client, but only if the mount
+                       is using the 'sec=sys' security flavour. This may
+                       make migration from legacy NFSv2/v3 systems easier
+                       provided that the server has the appropriate support.
+                       The default is to always enable NFSv4 idmapping.
+
        nmi_debug=      [KNL,AVR32,SH] Specify one or more actions to take
                        when a NMI is triggered.
                        Format: [state][,regs][,debounce][,die]
index b64d10d..4d9ce73 100644 (file)
@@ -1,3 +1,26 @@
+Release Date    : Thu. Feb 24, 2011 17:00:00 PST 2010 -
+                       (emaild-id:megaraidlinux@lsi.com)
+                       Adam Radford
+Current Version : 00.00.05.34-rc1
+Old Version     : 00.00.05.29-rc1
+    1. Fix some failure gotos from megasas_probe_one(), etc.
+    2. Add missing check_and_restore_queue_depth() call in
+       complete_cmd_fusion().
+    3. Enable MSI-X before calling megasas_init_fw().
+    4. Call tasklet_schedule() even if outbound_intr_status == 0 for MFI based
+       boards in MSI-X mode.
+    5. Fix megasas_probe_one() to clear PCI_MSIX_FLAGS_ENABLE in msi control
+       register in kdump kernel.
+    6. Fix megasas_get_cmd() to only print "Command pool empty" if
+       megasas_dbg_lvl is set.
+    7. Fix megasas_build_dcdb_fusion() to not filter by TYPE_DISK.
+    8. Fix megasas_build_dcdb_fusion() to use io_request->LUN[1] field.
+    9. Add MR_EVT_CFG_CLEARED to megasas_aen_polling().
+    10. Fix tasklet_init() in megasas_init_fw() to use instancet->tasklet.
+    11. Fix fault state handling in megasas_transition_to_ready().
+    12. Fix max_sectors setting for IEEE SGL's.
+    13. Fix iMR OCR support to work correctly.
+-------------------------------------------------------------------------------
 Release Date    : Tues.  Dec 14, 2010 17:00:00 PST 2010 -
                        (emaild-id:megaraidlinux@lsi.com)
                        Adam Radford
index dca6583..891435a 100644 (file)
@@ -28,6 +28,12 @@ boot parameter "hpsa_allow_any=1" is specified, however these are not tested
 nor supported by HP with this driver.  For older Smart Arrays, the cciss
 driver should still be used.
 
+The "hpsa_simple_mode=1" boot parameter may be used to prevent the driver from
+putting the controller into "performant" mode.  The difference is that with simple
+mode, each command completion requires an interrupt, while with "performant mode"
+(the default, and ordinarily better performing) it is possible to have multiple
+command completions indicated by a single interrupt.
+
 HPSA specific entries in /sys
 -----------------------------
 
@@ -39,6 +45,8 @@ HPSA specific entries in /sys
 
   /sys/class/scsi_host/host*/rescan
   /sys/class/scsi_host/host*/firmware_revision
+  /sys/class/scsi_host/host*/resettable
+  /sys/class/scsi_host/host*/transport_mode
 
   the host "rescan" attribute is a write only attribute.  Writing to this
   attribute will cause the driver to scan for new, changed, or removed devices
@@ -55,6 +63,21 @@ HPSA specific entries in /sys
        root@host:/sys/class/scsi_host/host4# cat firmware_revision
        7.14
 
+  The transport_mode indicates whether the controller is in "performant"
+  or "simple" mode.  This is controlled by the "hpsa_simple_mode" module
+  parameter.
+
+  The "resettable" read-only attribute indicates whether a particular
+  controller is able to honor the "reset_devices" kernel parameter.  If the
+  device is resettable, this file will contain a "1", otherwise, a "0".  This
+  parameter is used by kdump, for example, to reset the controller at driver
+  load time to eliminate any outstanding commands on the controller and get the
+  controller into a known state so that the kdump initiated i/o will work right
+  and not be disrupted in any way by stale commands or other stale state
+  remaining on the controller from the previous kernel.  This attribute enables
+  kexec tools to warn the user if they attempt to designate a device which is
+  unable to honor the reset_devices kernel parameter as a dump device.
+
   HPSA specific disk attributes:
   ------------------------------
 
index df322c1..5f17d29 100644 (file)
@@ -1343,7 +1343,7 @@ Members of interest:
                    underruns (overruns should be rare). If possible an LLD
                    should set 'resid' prior to invoking 'done'. The most
                    interesting case is data transfers from a SCSI target
-                   device device (i.e. READs) that underrun. 
+                   device (e.g. READs) that underrun.
     underflow    - LLD should place (DID_ERROR << 16) in 'result' if
                    actual number of bytes transferred is less than this
                    figure. Not many LLDs implement this check and some that
@@ -1351,6 +1351,18 @@ Members of interest:
                    report a DID_ERROR. Better for an LLD to implement
                    'resid'.
 
+It is recommended that a LLD set 'resid' on data transfers from a SCSI
+target device (e.g. READs). It is especially important that 'resid' is set
+when such data transfers have sense keys of MEDIUM ERROR and HARDWARE ERROR
+(and possibly RECOVERED ERROR). In these cases if a LLD is in doubt how much
+data has been received then the safest approach is to indicate no bytes have
+been received. For example: to indicate that no valid data has been received
+a LLD might use these helpers:
+    scsi_set_resid(SCpnt, scsi_bufflen(SCpnt));
+where 'SCpnt' is a pointer to a scsi_cmnd object. To indicate only three 512
+bytes blocks has been received 'resid' could be set like this:
+    scsi_set_resid(SCpnt, scsi_bufflen(SCpnt) - (3 * 512));
+
 The scsi_cmnd structure is defined in include/scsi/scsi_cmnd.h
 
 
index caec208..ab61fb4 100644 (file)
@@ -4907,6 +4907,15 @@ S:       Maintained
 F:     drivers/block/pktcdvd.c
 F:     include/linux/pktcdvd.h
 
+PKUNITY SOC DRIVERS
+M:     Guan Xuetao <gxt@mprc.pku.edu.cn>
+W:     http://mprc.pku.edu.cn/~guanxuetao/linux
+S:     Maintained
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
+F:     drivers/input/serio/i8042-unicore32io.h
+F:     drivers/i2c/busses/i2c-puv3.c
+F:     drivers/video/fb-puv3.c
+
 PMC SIERRA MaxRAID DRIVER
 M:     Anil Ravindranath <anil_ravindranath@pmc-sierra.com>
 L:     linux-scsi@vger.kernel.org
@@ -5350,8 +5359,7 @@ S:        Supported
 F:     drivers/s390/crypto/
 
 S390 ZFCP DRIVER
-M:     Christof Schmitt <christof.schmitt@de.ibm.com>
-M:     Swen Schillig <swen@vnet.ibm.com>
+M:     Steffen Maier <maier@linux.vnet.ibm.com>
 M:     linux390@de.ibm.com
 L:     linux-s390@vger.kernel.org
 W:     http://www.ibm.com/developerworks/linux/linux390/
@@ -6270,6 +6278,13 @@ F:       drivers/uwb/
 F:     include/linux/uwb.h
 F:     include/linux/uwb/
 
+UNICORE32 ARCHITECTURE:
+M:     Guan Xuetao <gxt@mprc.pku.edu.cn>
+W:     http://mprc.pku.edu.cn/~guanxuetao/linux
+S:     Maintained
+T:     git git://git.kernel.org/pub/scm/linux/kernel/git/epip/linux-2.6-unicore32.git
+F:     arch/unicore32/
+
 UNIFDEF
 M:     Tony Finch <dot@dotat.at>
 W:     http://dotat.at/prog/unifdef
index a6f2292..22046e2 100644 (file)
@@ -390,8 +390,7 @@ static int s5pv210_target(struct cpufreq_policy *policy,
 }
 
 #ifdef CONFIG_PM
-static int s5pv210_cpufreq_suspend(struct cpufreq_policy *policy,
-                                  pm_message_t pmsg)
+static int s5pv210_cpufreq_suspend(struct cpufreq_policy *policy)
 {
        return 0;
 }
index b04cbc7..7c08ad7 100644 (file)
@@ -458,8 +458,7 @@ static int s5pv310_target(struct cpufreq_policy *policy,
 }
 
 #ifdef CONFIG_PM
-static int s5pv310_cpufreq_suspend(struct cpufreq_policy *policy,
-                                  pm_message_t pmsg)
+static int s5pv310_cpufreq_suspend(struct cpufreq_policy *policy)
 {
        return 0;
 }
index 25a8fc7..eea75ff 100644 (file)
@@ -433,7 +433,7 @@ static int s3c_cpufreq_verify(struct cpufreq_policy *policy)
 static struct cpufreq_frequency_table suspend_pll;
 static unsigned int suspend_freq;
 
-static int s3c_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
+static int s3c_cpufreq_suspend(struct cpufreq_policy *policy)
 {
        suspend_pll.frequency = clk_get_rate(_clk_mpll);
        suspend_pll.index = __raw_readl(S3C2410_MPLLCON);
index 8987a76..564ab81 100644 (file)
@@ -30,6 +30,7 @@ extern struct platform_device jz4740_i2s_device;
 extern struct platform_device jz4740_pcm_device;
 extern struct platform_device jz4740_codec_device;
 extern struct platform_device jz4740_adc_device;
+extern struct platform_device jz4740_wdt_device;
 
 void jz4740_serial_device_register(void);
 
index 1cc9e54..10929e2 100644 (file)
@@ -289,3 +289,19 @@ void jz4740_serial_device_register(void)
 
        platform_device_register(&jz4740_uart_device);
 }
+
+/* Watchdog */
+static struct resource jz4740_wdt_resources[] = {
+       {
+               .start = JZ4740_WDT_BASE_ADDR,
+               .end   = JZ4740_WDT_BASE_ADDR + 0x10 - 1,
+               .flags = IORESOURCE_MEM,
+       },
+};
+
+struct platform_device jz4740_wdt_device = {
+       .name          = "jz4740-wdt",
+       .id            = -1,
+       .num_resources = ARRAY_SIZE(jz4740_wdt_resources),
+       .resource      = jz4740_wdt_resources,
+};
index 415ca6d..04af5f4 100644 (file)
@@ -429,7 +429,7 @@ static u32 read_gpio(struct device_node *np)
        return offset;
 }
 
-static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
+static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
 {
        /* Ok, this could be made a bit smarter, but let's be robust for now. We
         * always force a speed change to high speed before sleep, to make sure
index 636bcb8..2508a6f 100644 (file)
@@ -85,6 +85,7 @@ config S390
        select HAVE_KERNEL_BZIP2
        select HAVE_KERNEL_LZMA
        select HAVE_KERNEL_LZO
+       select HAVE_KERNEL_XZ
        select HAVE_GET_USER_PAGES_FAST
        select HAVE_ARCH_MUTEX_CPU_RELAX
        select ARCH_INLINE_SPIN_TRYLOCK
@@ -341,26 +342,16 @@ config STACK_GUARD
          The minimum size for the stack guard should be 256 for 31 bit and
          512 for 64 bit.
 
-config WARN_STACK
+config WARN_DYNAMIC_STACK
        def_bool n
-       prompt "Emit compiler warnings for function with broken stack usage"
+       prompt "Emit compiler warnings for function with dynamic stack usage"
        help
-         This option enables the compiler options -mwarn-framesize and
-         -mwarn-dynamicstack. If the compiler supports these options it
-         will generate warnings for function which either use alloca or
-         create a stack frame bigger than CONFIG_WARN_STACK_SIZE.
+         This option enables the compiler option -mwarn-dynamicstack. If the
+         compiler supports this options generates warnings for functions
+         that dynamically allocate stack space using alloca.
 
          Say N if you are unsure.
 
-config WARN_STACK_SIZE
-       int "Maximum frame size considered safe (128-2048)"
-       range 128 2048
-       depends on WARN_STACK
-       default "2048"
-       help
-         This allows you to specify the maximum frame size a function may
-         have without the compiler complaining about it.
-
 config ARCH_POPULATES_NODE_MAP
        def_bool y
 
index 2b380df..d76cef3 100644 (file)
@@ -31,4 +31,7 @@ config DEBUG_STRICT_USER_COPY_CHECKS
 
          If unsure, or if you run an older (pre 4.4) gcc, say N.
 
+config DEBUG_SET_MODULE_RONX
+       def_bool y
+       depends on MODULES
 endmenu
index d5b8a6a..27a0b5d 100644 (file)
@@ -80,8 +80,7 @@ endif
 endif
 
 ifeq ($(call cc-option-yn,-mwarn-dynamicstack),y)
-cflags-$(CONFIG_WARN_STACK) += -mwarn-dynamicstack
-cflags-$(CONFIG_WARN_STACK) += -mwarn-framesize=$(CONFIG_WARN_STACK_SIZE)
+cflags-$(CONFIG_WARN_DYNAMIC_STACK) += -mwarn-dynamicstack
 endif
 
 KBUILD_CFLAGS  += -mbackchain -msoft-float $(cflags-y)
index 1c999f7..10e22c4 100644 (file)
@@ -7,7 +7,8 @@
 BITS := $(if $(CONFIG_64BIT),64,31)
 
 targets        := vmlinux.lds vmlinux vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 \
-          vmlinux.bin.lzma vmlinux.bin.lzo misc.o piggy.o sizes.h head$(BITS).o
+          vmlinux.bin.xz vmlinux.bin.lzma vmlinux.bin.lzo misc.o piggy.o \
+          sizes.h head$(BITS).o
 
 KBUILD_CFLAGS := -m$(BITS) -D__KERNEL__ $(LINUX_INCLUDE) -O2
 KBUILD_CFLAGS += $(cflags-y)
@@ -48,6 +49,7 @@ suffix-$(CONFIG_KERNEL_GZIP)  := gz
 suffix-$(CONFIG_KERNEL_BZIP2) := bz2
 suffix-$(CONFIG_KERNEL_LZMA)  := lzma
 suffix-$(CONFIG_KERNEL_LZO)  := lzo
+suffix-$(CONFIG_KERNEL_XZ)  := xz
 
 $(obj)/vmlinux.bin.gz: $(vmlinux.bin.all-y)
        $(call if_changed,gzip)
@@ -57,6 +59,8 @@ $(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y)
        $(call if_changed,lzma)
 $(obj)/vmlinux.bin.lzo: $(vmlinux.bin.all-y)
        $(call if_changed,lzo)
+$(obj)/vmlinux.bin.xz: $(vmlinux.bin.all-y)
+       $(call if_changed,xzkern)
 
 LDFLAGS_piggy.o := -r --format binary --oformat $(LD_BFD) -T
 $(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.$(suffix-y)
index 2751b3a..028f23e 100644 (file)
@@ -19,6 +19,7 @@
 #undef memset
 #undef memcpy
 #undef memmove
+#define memmove memmove
 #define memzero(s, n) memset((s), 0, (n))
 
 /* Symbols defined by linker scripts */
@@ -54,6 +55,10 @@ static unsigned long free_mem_end_ptr;
 #include "../../../../lib/decompress_unlzo.c"
 #endif
 
+#ifdef CONFIG_KERNEL_XZ
+#include "../../../../lib/decompress_unxz.c"
+#endif
+
 extern _sclp_print_early(const char *);
 
 int puts(const char *s)
index 7e1f776..43a5c78 100644 (file)
@@ -8,4 +8,8 @@
 void kernel_map_pages(struct page *page, int numpages, int enable);
 #endif
 
+int set_memory_ro(unsigned long addr, int numpages);
+int set_memory_rw(unsigned long addr, int numpages);
+int set_memory_nx(unsigned long addr, int numpages);
+
 #endif /* _S390_CACHEFLUSH_H */
index a922d51..b09b9c6 100644 (file)
@@ -12,6 +12,7 @@
 #include <linux/kexec.h>
 #include <linux/delay.h>
 #include <linux/reboot.h>
+#include <linux/ftrace.h>
 #include <asm/cio.h>
 #include <asm/setup.h>
 #include <asm/pgtable.h>
@@ -71,6 +72,7 @@ static void __machine_kexec(void *data)
 
 void machine_kexec(struct kimage *image)
 {
+       tracer_disable();
        smp_send_stop();
        smp_switch_to_ipl_cpu(__machine_kexec, image);
 }
index 6fbc6f3..d98fe90 100644 (file)
@@ -6,3 +6,4 @@ obj-y    := init.o fault.o extmem.o mmap.o vmem.o pgtable.o maccess.o \
            page-states.o gup.o
 obj-$(CONFIG_CMM) += cmm.o
 obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
+obj-$(CONFIG_DEBUG_SET_MODULE_RONX) += pageattr.o
diff --git a/arch/s390/mm/pageattr.c b/arch/s390/mm/pageattr.c
new file mode 100644 (file)
index 0000000..122ffbd
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * Copyright IBM Corp. 2011
+ * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
+ */
+#include <linux/module.h>
+#include <linux/mm.h>
+#include <linux/hugetlb.h>
+#include <asm/pgtable.h>
+
+static void change_page_attr(unsigned long addr, int numpages,
+                            pte_t (*set) (pte_t))
+{
+       pte_t *ptep, pte;
+       pmd_t *pmdp;
+       pud_t *pudp;
+       pgd_t *pgdp;
+       int i;
+
+       for (i = 0; i < numpages; i++) {
+               pgdp = pgd_offset(&init_mm, addr);
+               pudp = pud_offset(pgdp, addr);
+               pmdp = pmd_offset(pudp, addr);
+               if (pmd_huge(*pmdp)) {
+                       WARN_ON_ONCE(1);
+                       continue;
+               }
+               ptep = pte_offset_kernel(pmdp, addr + i * PAGE_SIZE);
+
+               pte = *ptep;
+               pte = set(pte);
+               ptep_invalidate(&init_mm, addr + i * PAGE_SIZE, ptep);
+               *ptep = pte;
+       }
+}
+
+int set_memory_ro(unsigned long addr, int numpages)
+{
+       change_page_attr(addr, numpages, pte_wrprotect);
+       return 0;
+}
+EXPORT_SYMBOL_GPL(set_memory_ro);
+
+int set_memory_rw(unsigned long addr, int numpages)
+{
+       change_page_attr(addr, numpages, pte_mkwrite);
+       return 0;
+}
+EXPORT_SYMBOL_GPL(set_memory_rw);
+
+/* not possible */
+int set_memory_nx(unsigned long addr, int numpages)
+{
+       return 0;
+}
+EXPORT_SYMBOL_GPL(set_memory_nx);
index 8a9011d..2d264fa 100644 (file)
@@ -25,6 +25,7 @@ config SUPERH
        select GENERIC_ATOMIC64
        # Support the deprecated APIs until MFD and GPIOLIB catch up.
        select GENERIC_HARDIRQS_NO_DEPRECATED if !MFD_SUPPORT && !GPIOLIB
+       select GENERIC_IRQ_SHOW
        help
          The SuperH is a RISC processor targeted for use in embedded systems
          and consumer electronics; it was also used in the Sega Dreamcast
@@ -434,6 +435,8 @@ config CPU_SUBTYPE_SH7757
        select CPU_SH4A
        select CPU_SHX2
        select ARCH_WANT_OPTIONAL_GPIOLIB
+       select USB_ARCH_HAS_OHCI
+       select USB_ARCH_HAS_EHCI
        help
          Select SH7757 if you have a SH4A SH7757 CPU.
 
index d5ce5e1..9da92ac 100644 (file)
@@ -66,6 +66,11 @@ static struct resource sh_eth_resources[] = {
                .end    = 0xFEE00F7C - 1,
                .flags  = IORESOURCE_MEM,
        }, {
+               .start  = 0xFEE01800,   /* TSU */
+               .end    = 0xFEE01FFF,
+               .flags  = IORESOURCE_MEM,
+       }, {
+
                .start  = 57,   /* irq number */
                .flags  = IORESOURCE_IRQ,
        },
@@ -74,6 +79,8 @@ static struct resource sh_eth_resources[] = {
 static struct sh_eth_plat_data sh7763_eth_pdata = {
        .phy = 0,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_GIGABIT,
+       .phy_interface = PHY_INTERFACE_MODE_MII,
 };
 
 static struct platform_device espt_eth_device = {
index c475f10..a9e3356 100644 (file)
@@ -15,6 +15,9 @@
 #include <linux/spi/spi.h>
 #include <linux/spi/flash.h>
 #include <linux/io.h>
+#include <linux/mmc/host.h>
+#include <linux/mmc/sh_mmcif.h>
+#include <linux/mfd/sh_mobile_sdhi.h>
 #include <cpu/sh7757.h>
 #include <asm/sh_eth.h>
 #include <asm/heartbeat.h>
@@ -44,6 +47,17 @@ static struct platform_device heartbeat_device = {
 };
 
 /* Fast Ethernet */
+#define GBECONT                0xffc10100
+#define GBECONT_RMII1  BIT(17)
+#define GBECONT_RMII0  BIT(16)
+static void sh7757_eth_set_mdio_gate(unsigned long addr)
+{
+       if ((addr & 0x00000fff) < 0x0800)
+               writel(readl(GBECONT) | GBECONT_RMII0, GBECONT);
+       else
+               writel(readl(GBECONT) | GBECONT_RMII1, GBECONT);
+}
+
 static struct resource sh_eth0_resources[] = {
        {
                .start  = 0xfef00000,
@@ -59,6 +73,8 @@ static struct resource sh_eth0_resources[] = {
 static struct sh_eth_plat_data sh7757_eth0_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_FAST_SH4,
+       .set_mdio_gate = sh7757_eth_set_mdio_gate,
 };
 
 static struct platform_device sh7757_eth0_device = {
@@ -86,6 +102,8 @@ static struct resource sh_eth1_resources[] = {
 static struct sh_eth_plat_data sh7757_eth1_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_FAST_SH4,
+       .set_mdio_gate = sh7757_eth_set_mdio_gate,
 };
 
 static struct platform_device sh7757_eth1_device = {
@@ -98,10 +116,173 @@ static struct platform_device sh7757_eth1_device = {
        },
 };
 
+static void sh7757_eth_giga_set_mdio_gate(unsigned long addr)
+{
+       if ((addr & 0x00000fff) < 0x0800) {
+               gpio_set_value(GPIO_PTT4, 1);
+               writel(readl(GBECONT) & ~GBECONT_RMII0, GBECONT);
+       } else {
+               gpio_set_value(GPIO_PTT4, 0);
+               writel(readl(GBECONT) & ~GBECONT_RMII1, GBECONT);
+       }
+}
+
+static struct resource sh_eth_giga0_resources[] = {
+       {
+               .start  = 0xfee00000,
+               .end    = 0xfee007ff,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               /* TSU */
+               .start  = 0xfee01800,
+               .end    = 0xfee01fff,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = 315,
+               .end    = 315,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct sh_eth_plat_data sh7757_eth_giga0_pdata = {
+       .phy = 18,
+       .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_GIGABIT,
+       .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
+       .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
+};
+
+static struct platform_device sh7757_eth_giga0_device = {
+       .name           = "sh-eth",
+       .resource       = sh_eth_giga0_resources,
+       .id             = 2,
+       .num_resources  = ARRAY_SIZE(sh_eth_giga0_resources),
+       .dev            = {
+               .platform_data = &sh7757_eth_giga0_pdata,
+       },
+};
+
+static struct resource sh_eth_giga1_resources[] = {
+       {
+               .start  = 0xfee00800,
+               .end    = 0xfee00fff,
+               .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = 316,
+               .end    = 316,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct sh_eth_plat_data sh7757_eth_giga1_pdata = {
+       .phy = 19,
+       .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_GIGABIT,
+       .set_mdio_gate = sh7757_eth_giga_set_mdio_gate,
+       .phy_interface = PHY_INTERFACE_MODE_RGMII_ID,
+};
+
+static struct platform_device sh7757_eth_giga1_device = {
+       .name           = "sh-eth",
+       .resource       = sh_eth_giga1_resources,
+       .id             = 3,
+       .num_resources  = ARRAY_SIZE(sh_eth_giga1_resources),
+       .dev            = {
+               .platform_data = &sh7757_eth_giga1_pdata,
+       },
+};
+
+/* SH_MMCIF */
+static struct resource sh_mmcif_resources[] = {
+       [0] = {
+               .start  = 0xffcb0000,
+               .end    = 0xffcb00ff,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = 211,
+               .flags  = IORESOURCE_IRQ,
+       },
+       [2] = {
+               .start  = 212,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct sh_mmcif_dma sh7757lcr_mmcif_dma = {
+       .chan_priv_tx   = SHDMA_SLAVE_MMCIF_TX,
+       .chan_priv_rx   = SHDMA_SLAVE_MMCIF_RX,
+};
+
+static struct sh_mmcif_plat_data sh_mmcif_plat = {
+       .dma            = &sh7757lcr_mmcif_dma,
+       .sup_pclk       = 0x0f,
+       .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
+       .ocr            = MMC_VDD_32_33 | MMC_VDD_33_34,
+};
+
+static struct platform_device sh_mmcif_device = {
+       .name           = "sh_mmcif",
+       .id             = 0,
+       .dev            = {
+               .platform_data          = &sh_mmcif_plat,
+       },
+       .num_resources  = ARRAY_SIZE(sh_mmcif_resources),
+       .resource       = sh_mmcif_resources,
+};
+
+/* SDHI0 */
+static struct sh_mobile_sdhi_info sdhi_info = {
+       .dma_slave_tx   = SHDMA_SLAVE_SDHI_TX,
+       .dma_slave_rx   = SHDMA_SLAVE_SDHI_RX,
+       .tmio_caps      = MMC_CAP_SD_HIGHSPEED,
+};
+
+static struct resource sdhi_resources[] = {
+       [0] = {
+               .start  = 0xffe50000,
+               .end    = 0xffe501ff,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = 20,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device sdhi_device = {
+       .name           = "sh_mobile_sdhi",
+       .num_resources  = ARRAY_SIZE(sdhi_resources),
+       .resource       = sdhi_resources,
+       .id             = 0,
+       .dev    = {
+               .platform_data  = &sdhi_info,
+       },
+};
+
 static struct platform_device *sh7757lcr_devices[] __initdata = {
        &heartbeat_device,
        &sh7757_eth0_device,
        &sh7757_eth1_device,
+       &sh7757_eth_giga0_device,
+       &sh7757_eth_giga1_device,
+       &sh_mmcif_device,
+       &sdhi_device,
+};
+
+static struct flash_platform_data spi_flash_data = {
+       .name = "m25p80",
+       .type = "m25px64",
+};
+
+static struct spi_board_info spi_board_info[] = {
+       {
+               .modalias = "m25p80",
+               .max_speed_hz = 25000000,
+               .bus_num = 0,
+               .chip_select = 1,
+               .platform_data = &spi_flash_data,
+       },
 };
 
 static int __init sh7757lcr_devices_setup(void)
@@ -332,6 +513,10 @@ static int __init sh7757lcr_devices_setup(void)
        gpio_request(GPIO_PTT5, NULL);          /* eMMC_PRST# */
        gpio_direction_output(GPIO_PTT5, 1);
 
+       /* register SPI device information */
+       spi_register_board_info(spi_board_info,
+                               ARRAY_SIZE(spi_board_info));
+
        /* General platform */
        return platform_add_devices(sh7757lcr_devices,
                                    ARRAY_SIZE(sh7757lcr_devices));
index 701667a..3b71d21 100644 (file)
@@ -142,6 +142,8 @@ static struct resource sh_eth_resources[] = {
 static struct sh_eth_plat_data sh_eth_plat = {
        .phy = 0x1f, /* SMSC LAN8700 */
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_FAST_SH4,
+       .phy_interface = PHY_INTERFACE_MODE_MII,
        .ether_link_active_low = 1
 };
 
index f64a691..f3d828f 100644 (file)
@@ -74,6 +74,10 @@ static struct resource sh_eth_resources[] = {
                .start  = 0xFEE00800,   /* use eth1 */
                .end    = 0xFEE00F7C - 1,
                .flags  = IORESOURCE_MEM,
+       }, {
+               .start  = 0xFEE01800,   /* TSU */
+               .end    = 0xFEE01FFF,
+               .flags  = IORESOURCE_MEM,
        }, {
                .start  = 57,   /* irq number */
                .flags  = IORESOURCE_IRQ,
@@ -83,6 +87,8 @@ static struct resource sh_eth_resources[] = {
 static struct sh_eth_plat_data sh7763_eth_pdata = {
        .phy = 1,
        .edmac_endian = EDMAC_LITTLE_ENDIAN,
+       .register_type = SH_ETH_REG_GIGABIT,
+       .phy_interface = PHY_INTERFACE_MODE_MII,
 };
 
 static struct platform_device sh7763rdp_eth_device = {
index e0b0293..780e083 100644 (file)
@@ -11,6 +11,8 @@ targets               := vmlinux vmlinux.bin vmlinux.bin.gz \
 
 OBJECTS = $(obj)/head_$(BITS).o $(obj)/misc.o $(obj)/cache.o
 
+GCOV_PROFILE := n
+
 #
 # IMAGE_OFFSET is the load offset of the compression loader
 #
index 5f7f667..fa0ecf8 100644 (file)
@@ -38,7 +38,15 @@ CONFIG_IPV6=y
 # CONFIG_WIRELESS is not set
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 # CONFIG_FW_LOADER is not set
+CONFIG_MTD=y
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_M25P80=y
 CONFIG_BLK_DEV_RAM=y
+CONFIG_SCSI=y
+CONFIG_BLK_DEV_SD=y
 CONFIG_NETDEVICES=y
 CONFIG_VITESSE_PHY=y
 CONFIG_NET_ETHERNET=y
@@ -53,8 +61,17 @@ CONFIG_SERIAL_SH_SCI_NR_UARTS=3
 CONFIG_SERIAL_SH_SCI_CONSOLE=y
 # CONFIG_LEGACY_PTYS is not set
 # CONFIG_HW_RANDOM is not set
+CONFIG_SPI=y
+CONFIG_SPI_SH=y
 # CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
+CONFIG_MFD_SH_MOBILE_SDHI=y
+CONFIG_USB=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_OHCI_HCD=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_TMIO=y
+CONFIG_MMC_SH_MMCIF=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 CONFIG_ISO9660_FS=y
index 96e9b05..4418f90 100644 (file)
@@ -1,16 +1,19 @@
 /*
  * Low-Level PCI Express Support for the SH7786
  *
- *  Copyright (C) 2009 - 2010  Paul Mundt
+ *  Copyright (C) 2009 - 2011  Paul Mundt
  *
  * This file is subject to the terms and conditions of the GNU General Public
  * License.  See the file "COPYING" in the main directory of this archive
  * for more details.
  */
+#define pr_fmt(fmt) "PCI: " fmt
+
 #include <linux/pci.h>
 #include <linux/init.h>
 #include <linux/kernel.h>
 #include <linux/io.h>
+#include <linux/async.h>
 #include <linux/delay.h>
 #include <linux/slab.h>
 #include <linux/clk.h>
@@ -31,7 +34,7 @@ static unsigned int nr_ports;
 
 static struct sh7786_pcie_hwops {
        int (*core_init)(void);
-       int (*port_init_hw)(struct sh7786_pcie_port *port);
+       async_func_ptr *port_init_hw;
 } *sh7786_pcie_hwops;
 
 static struct resource sh7786_pci0_resources[] = {
@@ -474,8 +477,9 @@ static int __init sh7786_pcie_core_init(void)
        return test_mode_pin(MODE_PIN12) ? 3 : 2;
 }
 
-static int __init sh7786_pcie_init_hw(struct sh7786_pcie_port *port)
+static void __init sh7786_pcie_init_hw(void *data, async_cookie_t cookie)
 {
+       struct sh7786_pcie_port *port = data;
        int ret;
 
        /*
@@ -488,18 +492,30 @@ static int __init sh7786_pcie_init_hw(struct sh7786_pcie_port *port)
         * Setup clocks, needed both for PHY and PCIe registers.
         */
        ret = pcie_clk_init(port);
-       if (unlikely(ret < 0))
-               return ret;
+       if (unlikely(ret < 0)) {
+               pr_err("clock initialization failed for port#%d\n",
+                      port->index);
+               return;
+       }
 
        ret = phy_init(port);
-       if (unlikely(ret < 0))
-               return ret;
+       if (unlikely(ret < 0)) {
+               pr_err("phy initialization failed for port#%d\n",
+                      port->index);
+               return;
+       }
 
        ret = pcie_init(port);
-       if (unlikely(ret < 0))
-               return ret;
+       if (unlikely(ret < 0)) {
+               pr_err("core initialization failed for port#%d\n",
+                              port->index);
+               return;
+       }
 
-       return register_pci_controller(port->hose);
+       /* In the interest of preserving device ordering, synchronize */
+       async_synchronize_cookie(cookie);
+
+       register_pci_controller(port->hose);
 }
 
 static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = {
@@ -510,7 +526,7 @@ static struct sh7786_pcie_hwops sh7786_65nm_pcie_hwops __initdata = {
 static int __init sh7786_pcie_init(void)
 {
        struct clk *platclk;
-       int ret = 0, i;
+       int i;
 
        printk(KERN_NOTICE "PCI: Starting initialization.\n");
 
@@ -552,14 +568,10 @@ static int __init sh7786_pcie_init(void)
                port->hose              = sh7786_pci_channels + i;
                port->hose->io_map_base = port->hose->resources[0].start;
 
-               ret |= sh7786_pcie_hwops->port_init_hw(port);
+               async_schedule(sh7786_pcie_hwops->port_init_hw, port);
        }
 
-       if (unlikely(ret)) {
-               clk_disable(platclk);
-               clk_put(platclk);
-               return ret;
-       }
+       async_synchronize_full();
 
        return 0;
 }
index d6741fc..b5a74e8 100644 (file)
 #define __NR_recvmsg           356
 #define __NR_recvmmsg          357
 #define __NR_accept4           358
+#define __NR_name_to_handle_at 359
+#define __NR_open_by_handle_at 360
+#define __NR_clock_adjtime     361
 
-#define NR_syscalls 359
+#define NR_syscalls 362
 
 #ifdef __KERNEL__
 
index 09aa93f..953da4a 100644 (file)
 #define __NR_fanotify_init     367
 #define __NR_fanotify_mark     368
 #define __NR_prlimit64         369
+#define __NR_name_to_handle_at 370
+#define __NR_open_by_handle_at 371
+#define __NR_clock_adjtime     372
 
 #ifdef __KERNEL__
 
-#define NR_syscalls 370
+#define NR_syscalls 373
 
 #define __ARCH_WANT_IPC_PARSE_VERSION
 #define __ARCH_WANT_OLD_READDIR
index 9a6125e..18fa80a 100644 (file)
 #define CHCR_TS_LOW_SHIFT      3
 #define CHCR_TS_HIGH_MASK      0
 #define CHCR_TS_HIGH_SHIFT     0
+#elif defined(CONFIG_CPU_SUBTYPE_SH7757)
+#define CHCR_TS_LOW_MASK       0x00000018
+#define CHCR_TS_LOW_SHIFT      3
+#define CHCR_TS_HIGH_MASK      0x00100000
+#define CHCR_TS_HIGH_SHIFT     (20 - 2)        /* 2 bits for shifted low TS */
 #elif defined(CONFIG_CPU_SUBTYPE_SH7780)
 #define CHCR_TS_LOW_MASK       0x00000018
 #define CHCR_TS_LOW_SHIFT      3
index 15f3de1..05b8196 100644 (file)
@@ -251,4 +251,36 @@ enum {
        GPIO_FN_ON_DQ3, GPIO_FN_ON_DQ2, GPIO_FN_ON_DQ1, GPIO_FN_ON_DQ0,
 };
 
+enum {
+       SHDMA_SLAVE_SDHI_TX,
+       SHDMA_SLAVE_SDHI_RX,
+       SHDMA_SLAVE_MMCIF_TX,
+       SHDMA_SLAVE_MMCIF_RX,
+       SHDMA_SLAVE_SCIF2_TX,
+       SHDMA_SLAVE_SCIF2_RX,
+       SHDMA_SLAVE_SCIF3_TX,
+       SHDMA_SLAVE_SCIF3_RX,
+       SHDMA_SLAVE_SCIF4_TX,
+       SHDMA_SLAVE_SCIF4_RX,
+       SHDMA_SLAVE_RIIC0_TX,
+       SHDMA_SLAVE_RIIC0_RX,
+       SHDMA_SLAVE_RIIC1_TX,
+       SHDMA_SLAVE_RIIC1_RX,
+       SHDMA_SLAVE_RIIC2_TX,
+       SHDMA_SLAVE_RIIC2_RX,
+       SHDMA_SLAVE_RIIC3_TX,
+       SHDMA_SLAVE_RIIC3_RX,
+       SHDMA_SLAVE_RIIC4_TX,
+       SHDMA_SLAVE_RIIC4_RX,
+       SHDMA_SLAVE_RIIC5_TX,
+       SHDMA_SLAVE_RIIC5_RX,
+       SHDMA_SLAVE_RIIC6_TX,
+       SHDMA_SLAVE_RIIC6_RX,
+       SHDMA_SLAVE_RIIC7_TX,
+       SHDMA_SLAVE_RIIC7_RX,
+       SHDMA_SLAVE_RIIC8_TX,
+       SHDMA_SLAVE_RIIC8_RX,
+       SHDMA_SLAVE_RIIC9_TX,
+       SHDMA_SLAVE_RIIC9_RX,
+};
 #endif /* __ASM_SH7757_H__ */
index e073e3e..eedddad 100644 (file)
@@ -77,9 +77,10 @@ struct clk div4_clks[DIV4_NR] = {
 
 #define MSTPCR0                0xffc80030
 #define MSTPCR1                0xffc80034
+#define MSTPCR2                0xffc10028
 
 enum { MSTP004, MSTP000, MSTP114, MSTP113, MSTP112,
-       MSTP111, MSTP110, MSTP103, MSTP102,
+       MSTP111, MSTP110, MSTP103, MSTP102, MSTP220,
        MSTP_NR };
 
 static struct clk mstp_clks[MSTP_NR] = {
@@ -95,6 +96,9 @@ static struct clk mstp_clks[MSTP_NR] = {
        [MSTP110] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 10, 0),
        [MSTP103] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 3, 0),
        [MSTP102] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 2, 0),
+
+       /* MSTPCR2 */
+       [MSTP220] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 20, 0),
 };
 
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
@@ -140,6 +144,7 @@ static struct clk_lookup lookups[] = {
                .clk            = &mstp_clks[MSTP110],
        },
        CLKDEV_CON_ID("usb0", &mstp_clks[MSTP102]),
+       CLKDEV_CON_ID("mmc0", &mstp_clks[MSTP220]),
 };
 
 int __init arch_clk_init(void)
index 9c1de26..423dabf 100644 (file)
@@ -1,7 +1,7 @@
 /*
  * SH7757 Setup
  *
- * Copyright (C) 2009  Renesas Solutions Corp.
+ * Copyright (C) 2009, 2011  Renesas Solutions Corp.
  *
  *  based on setup-sh7785.c : Copyright (C) 2007  Paul Mundt
  *
 #include <linux/io.h>
 #include <linux/mm.h>
 #include <linux/sh_timer.h>
+#include <linux/sh_dma.h>
+
+#include <cpu/dma-register.h>
+#include <cpu/sh7757.h>
 
 static struct plat_sci_port scif2_platform_data = {
        .mapbase        = 0xfe4b0000,           /* SCIF2 */
@@ -124,12 +128,548 @@ static struct platform_device tmu1_device = {
        .num_resources  = ARRAY_SIZE(tmu1_resources),
 };
 
+static struct resource spi0_resources[] = {
+       [0] = {
+               .start  = 0xfe002000,
+               .end    = 0xfe0020ff,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               .start  = 86,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+/* DMA */
+static const struct sh_dmae_slave_config sh7757_dmae0_slaves[] = {
+       {
+               .slave_id       = SHDMA_SLAVE_SDHI_TX,
+               .addr           = 0x1fe50030,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_16BIT),
+               .mid_rid        = 0xc5,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SDHI_RX,
+               .addr           = 0x1fe50030,
+               .chcr           = DM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_16BIT),
+               .mid_rid        = 0xc6,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_MMCIF_TX,
+               .addr           = 0x1fcb0034,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xd3,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_MMCIF_RX,
+               .addr           = 0x1fcb0034,
+               .chcr           = DM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_32BIT),
+               .mid_rid        = 0xd7,
+       },
+};
+
+static const struct sh_dmae_slave_config sh7757_dmae1_slaves[] = {
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF2_TX,
+               .addr           = 0x1f4b000c,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x21,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF2_RX,
+               .addr           = 0x1f4b0014,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x22,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF3_TX,
+               .addr           = 0x1f4c000c,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x29,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF3_RX,
+               .addr           = 0x1f4c0014,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x2a,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF4_TX,
+               .addr           = 0x1f4d000c,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x41,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_SCIF4_RX,
+               .addr           = 0x1f4d0014,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x42,
+       },
+};
+
+static const struct sh_dmae_slave_config sh7757_dmae2_slaves[] = {
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC0_TX,
+               .addr           = 0x1e500012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x21,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC0_RX,
+               .addr           = 0x1e500013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x22,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC1_TX,
+               .addr           = 0x1e510012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x29,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC1_RX,
+               .addr           = 0x1e510013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x2a,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC2_TX,
+               .addr           = 0x1e520012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xa1,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC2_RX,
+               .addr           = 0x1e520013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xa2,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC3_TX,
+               .addr           = 0x1e530012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xab,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC3_RX,
+               .addr           = 0x1e530013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xaf,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC4_TX,
+               .addr           = 0x1e540012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xc1,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC4_RX,
+               .addr           = 0x1e540013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0xc2,
+       },
+};
+
+static const struct sh_dmae_slave_config sh7757_dmae3_slaves[] = {
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC5_TX,
+               .addr           = 0x1e550012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x21,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC5_RX,
+               .addr           = 0x1e550013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x22,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC6_TX,
+               .addr           = 0x1e560012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x29,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC6_RX,
+               .addr           = 0x1e560013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x2a,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC7_TX,
+               .addr           = 0x1e570012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x41,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC7_RX,
+               .addr           = 0x1e570013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x42,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC8_TX,
+               .addr           = 0x1e580012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x45,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC8_RX,
+               .addr           = 0x1e580013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x46,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC9_TX,
+               .addr           = 0x1e590012,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x51,
+       },
+       {
+               .slave_id       = SHDMA_SLAVE_RIIC9_RX,
+               .addr           = 0x1e590013,
+               .chcr           = SM_INC | 0x800 | 0x40000000 |
+                                 TS_INDEX2VAL(XMIT_SZ_8BIT),
+               .mid_rid        = 0x52,
+       },
+};
+
+static const struct sh_dmae_channel sh7757_dmae_channels[] = {
+       {
+               .offset = 0,
+               .dmars = 0,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x10,
+               .dmars = 0,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x20,
+               .dmars = 4,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x30,
+               .dmars = 4,
+               .dmars_bit = 8,
+       }, {
+               .offset = 0x50,
+               .dmars = 8,
+               .dmars_bit = 0,
+       }, {
+               .offset = 0x60,
+               .dmars = 8,
+               .dmars_bit = 8,
+       }
+};
+
+static const unsigned int ts_shift[] = TS_SHIFT;
+
+static struct sh_dmae_pdata dma0_platform_data = {
+       .slave          = sh7757_dmae0_slaves,
+       .slave_num      = ARRAY_SIZE(sh7757_dmae0_slaves),
+       .channel        = sh7757_dmae_channels,
+       .channel_num    = ARRAY_SIZE(sh7757_dmae_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma1_platform_data = {
+       .slave          = sh7757_dmae1_slaves,
+       .slave_num      = ARRAY_SIZE(sh7757_dmae1_slaves),
+       .channel        = sh7757_dmae_channels,
+       .channel_num    = ARRAY_SIZE(sh7757_dmae_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma2_platform_data = {
+       .slave          = sh7757_dmae2_slaves,
+       .slave_num      = ARRAY_SIZE(sh7757_dmae2_slaves),
+       .channel        = sh7757_dmae_channels,
+       .channel_num    = ARRAY_SIZE(sh7757_dmae_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+static struct sh_dmae_pdata dma3_platform_data = {
+       .slave          = sh7757_dmae3_slaves,
+       .slave_num      = ARRAY_SIZE(sh7757_dmae3_slaves),
+       .channel        = sh7757_dmae_channels,
+       .channel_num    = ARRAY_SIZE(sh7757_dmae_channels),
+       .ts_low_shift   = CHCR_TS_LOW_SHIFT,
+       .ts_low_mask    = CHCR_TS_LOW_MASK,
+       .ts_high_shift  = CHCR_TS_HIGH_SHIFT,
+       .ts_high_mask   = CHCR_TS_HIGH_MASK,
+       .ts_shift       = ts_shift,
+       .ts_shift_num   = ARRAY_SIZE(ts_shift),
+       .dmaor_init     = DMAOR_INIT,
+};
+
+/* channel 0 to 5 */
+static struct resource sh7757_dmae0_resources[] = {
+       [0] = {
+               /* Channel registers and DMAOR */
+               .start  = 0xff608020,
+               .end    = 0xff60808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               /* DMARSx */
+               .start  = 0xff609000,
+               .end    = 0xff60900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               .start  = 34,
+               .end    = 34,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+};
+
+/* channel 6 to 11 */
+static struct resource sh7757_dmae1_resources[] = {
+       [0] = {
+               /* Channel registers and DMAOR */
+               .start  = 0xff618020,
+               .end    = 0xff61808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               /* DMARSx */
+               .start  = 0xff619000,
+               .end    = 0xff61900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMA error */
+               .start  = 34,
+               .end    = 34,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 4 */
+               .start  = 46,
+               .end    = 46,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 5 */
+               .start  = 46,
+               .end    = 46,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 6 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 7 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 8 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 9 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 10 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+       {
+               /* IRQ for channels 11 */
+               .start  = 88,
+               .end    = 88,
+               .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
+       },
+};
+
+/* channel 12 to 17 */
+static struct resource sh7757_dmae2_resources[] = {
+       [0] = {
+               /* Channel registers and DMAOR */
+               .start  = 0xff708020,
+               .end    = 0xff70808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               /* DMARSx */
+               .start  = 0xff709000,
+               .end    = 0xff70900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMA error */
+               .start  = 323,
+               .end    = 323,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 12 to 16 */
+               .start  = 272,
+               .end    = 276,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channel 17 */
+               .start  = 279,
+               .end    = 279,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+/* channel 18 to 23 */
+static struct resource sh7757_dmae3_resources[] = {
+       [0] = {
+               /* Channel registers and DMAOR */
+               .start  = 0xff718020,
+               .end    = 0xff71808f,
+               .flags  = IORESOURCE_MEM,
+       },
+       [1] = {
+               /* DMARSx */
+               .start  = 0xff719000,
+               .end    = 0xff71900b,
+               .flags  = IORESOURCE_MEM,
+       },
+       {
+               /* DMA error */
+               .start  = 324,
+               .end    = 324,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channels 18 to 22 */
+               .start  = 280,
+               .end    = 284,
+               .flags  = IORESOURCE_IRQ,
+       },
+       {
+               /* IRQ for channel 23 */
+               .start  = 288,
+               .end    = 288,
+               .flags  = IORESOURCE_IRQ,
+       },
+};
+
+static struct platform_device dma0_device = {
+       .name           = "sh-dma-engine",
+       .id             = 0,
+       .resource       = sh7757_dmae0_resources,
+       .num_resources  = ARRAY_SIZE(sh7757_dmae0_resources),
+       .dev            = {
+               .platform_data  = &dma0_platform_data,
+       },
+};
+
+static struct platform_device dma1_device = {
+       .name           = "sh-dma-engine",
+       .id             = 1,
+       .resource       = sh7757_dmae1_resources,
+       .num_resources  = ARRAY_SIZE(sh7757_dmae1_resources),
+       .dev            = {
+               .platform_data  = &dma1_platform_data,
+       },
+};
+
+static struct platform_device dma2_device = {
+       .name           = "sh-dma-engine",
+       .id             = 2,
+       .resource       = sh7757_dmae2_resources,
+       .num_resources  = ARRAY_SIZE(sh7757_dmae2_resources),
+       .dev            = {
+               .platform_data  = &dma2_platform_data,
+       },
+};
+
+static struct platform_device dma3_device = {
+       .name           = "sh-dma-engine",
+       .id             = 3,
+       .resource       = sh7757_dmae3_resources,
+       .num_resources  = ARRAY_SIZE(sh7757_dmae3_resources),
+       .dev            = {
+               .platform_data  = &dma3_platform_data,
+       },
+};
+
+static struct platform_device spi0_device = {
+       .name   = "sh_spi",
+       .id     = 0,
+       .dev    = {
+               .dma_mask               = NULL,
+               .coherent_dma_mask      = 0xffffffff,
+       },
+       .num_resources  = ARRAY_SIZE(spi0_resources),
+       .resource       = spi0_resources,
+};
+
 static struct platform_device *sh7757_devices[] __initdata = {
        &scif2_device,
        &scif3_device,
        &scif4_device,
        &tmu0_device,
        &tmu1_device,
+       &dma0_device,
+       &dma1_device,
+       &dma2_device,
+       &dma3_device,
+       &spi0_device,
 };
 
 static int __init sh7757_devices_setup(void)
index c19e2a9..e4469e7 100644 (file)
@@ -75,7 +75,7 @@ void sh_mobile_setup_cpuidle(void)
        i = CPUIDLE_DRIVER_STATE_START;
 
        state = &dev->states[i++];
-       snprintf(state->name, CPUIDLE_NAME_LEN, "C0");
+       snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
        strncpy(state->desc, "SuperH Sleep Mode", CPUIDLE_DESC_LEN);
        state->exit_latency = 1;
        state->target_residency = 1 * 2;
@@ -88,7 +88,7 @@ void sh_mobile_setup_cpuidle(void)
 
        if (sh_mobile_sleep_supported & SUSP_SH_SF) {
                state = &dev->states[i++];
-               snprintf(state->name, CPUIDLE_NAME_LEN, "C1");
+               snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
                strncpy(state->desc, "SuperH Sleep Mode [SF]",
                        CPUIDLE_DESC_LEN);
                state->exit_latency = 100;
@@ -101,7 +101,7 @@ void sh_mobile_setup_cpuidle(void)
 
        if (sh_mobile_sleep_supported & SUSP_SH_STANDBY) {
                state = &dev->states[i++];
-               snprintf(state->name, CPUIDLE_NAME_LEN, "C2");
+               snprintf(state->name, CPUIDLE_NAME_LEN, "C3");
                strncpy(state->desc, "SuperH Mobile Standby Mode [SF]",
                        CPUIDLE_DESC_LEN);
                state->exit_latency = 2300;
index 68ecbe6..64ea0b1 100644 (file)
@@ -34,9 +34,9 @@ void ack_bad_irq(unsigned int irq)
 
 #if defined(CONFIG_PROC_FS)
 /*
- * /proc/interrupts printing:
+ * /proc/interrupts printing for arch specific interrupts
  */
-static int show_other_interrupts(struct seq_file *p, int prec)
+int arch_show_interrupts(struct seq_file *p, int prec)
 {
        int j;
 
@@ -49,63 +49,6 @@ static int show_other_interrupts(struct seq_file *p, int prec)
 
        return 0;
 }
-
-int show_interrupts(struct seq_file *p, void *v)
-{
-       unsigned long flags, any_count = 0;
-       int i = *(loff_t *)v, j, prec;
-       struct irqaction *action;
-       struct irq_desc *desc;
-       struct irq_data *data;
-       struct irq_chip *chip;
-
-       if (i > nr_irqs)
-               return 0;
-
-       for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
-               j *= 10;
-
-       if (i == nr_irqs)
-               return show_other_interrupts(p, prec);
-
-       if (i == 0) {
-               seq_printf(p, "%*s", prec + 8, "");
-               for_each_online_cpu(j)
-                       seq_printf(p, "CPU%-8d", j);
-               seq_putc(p, '\n');
-       }
-
-       desc = irq_to_desc(i);
-       if (!desc)
-               return 0;
-
-       data = irq_get_irq_data(i);
-       chip = irq_data_get_irq_chip(data);
-
-       raw_spin_lock_irqsave(&desc->lock, flags);
-       for_each_online_cpu(j)
-               any_count |= kstat_irqs_cpu(i, j);
-       action = desc->action;
-       if (!action && !any_count)
-               goto out;
-
-       seq_printf(p, "%*d: ", prec, i);
-       for_each_online_cpu(j)
-               seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
-       seq_printf(p, " %14s", chip->name);
-       seq_printf(p, "-%-8s", desc->name);
-
-       if (action) {
-               seq_printf(p, "  %s", action->name);
-               while ((action = action->next) != NULL)
-                       seq_printf(p, ", %s", action->name);
-       }
-
-       seq_putc(p, '\n');
-out:
-       raw_spin_unlock_irqrestore(&desc->lock, flags);
-       return 0;
-}
 #endif
 
 #ifdef CONFIG_IRQSTACKS
index 6fc347e..768fb33 100644 (file)
@@ -376,3 +376,6 @@ ENTRY(sys_call_table)
        .long sys_recvmsg
        .long sys_recvmmsg
        .long sys_accept4
+       .long sys_name_to_handle_at
+       .long sys_open_by_handle_at     /* 360 */
+       .long sys_clock_adjtime
index 6658570..44e7b00 100644 (file)
@@ -396,3 +396,6 @@ sys_call_table:
        .long sys_fanotify_init
        .long sys_fanotify_mark
        .long sys_prlimit64
+       .long sys_name_to_handle_at     /* 370 */
+       .long sys_open_by_handle_at
+       .long sys_clock_adjtime
index 150aa32..2228c8c 100644 (file)
@@ -42,6 +42,8 @@ obj-$(CONFIG_IOREMAP_FIXED)   += ioremap_fixed.o
 obj-$(CONFIG_UNCACHED_MAPPING) += uncached.o
 obj-$(CONFIG_HAVE_SRAM_POOL)   += sram.o
 
+GCOV_PROFILE_pmb.o := n
+
 # Special flags for fault_64.o.  This puts restrictions on the number of
 # caller-save registers that the compiler can target when building this file.
 # This is required because the code is called from a context in entry.S where
index 95695e9..e48f471 100644 (file)
@@ -51,6 +51,7 @@ config SPARC64
        select HAVE_PERF_EVENTS
        select PERF_USE_VMALLOC
        select HAVE_GENERIC_HARDIRQS
+       select GENERIC_HARDIRQS_NO_DEPRECATED
 
 config ARCH_DEFCONFIG
        string
@@ -460,6 +461,39 @@ config SPARC_LEON
          from www.gaisler.com. You can download a sparc-linux cross-compilation
          toolchain at www.gaisler.com.
 
+if SPARC_LEON
+menu "U-Boot options"
+
+config UBOOT_LOAD_ADDR
+       hex "uImage Load Address"
+       default 0x40004000
+       ---help---
+        U-Boot kernel load address, the address in physical address space
+        where u-boot will place the Linux kernel before booting it.
+        This address is normally the base address of main memory + 0x4000.
+
+config UBOOT_FLASH_ADDR
+       hex "uImage.o Load Address"
+       default 0x00080000
+       ---help---
+        Optional setting only affecting the uImage.o ELF-image used to
+        download the uImage file to the target using a ELF-loader other than
+        U-Boot. It may for example be used to download an uImage to FLASH with
+        the GRMON utility before even starting u-boot.
+
+config UBOOT_ENTRY_ADDR
+       hex "uImage Entry Address"
+       default 0xf0004000
+       ---help---
+        Do not change this unless you know what you're doing. This is
+        hardcoded by the SPARC32 and LEON port.
+
+        This is the virtual address u-boot jumps to when booting the Linux
+        Kernel.
+
+endmenu
+endif
+
 endmenu
 
 menu "Bus options (PCI etc.)"
index 113225b..ad1fb5d 100644 (file)
@@ -88,7 +88,7 @@ boot := arch/sparc/boot
 # Default target
 all: zImage
 
-image zImage tftpboot.img vmlinux.aout: vmlinux
+image zImage uImage tftpboot.img vmlinux.aout: vmlinux
        $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
 
 archclean:
@@ -102,6 +102,7 @@ ifeq ($(ARCH),sparc)
 define archhelp
   echo  '* image        - kernel image ($(boot)/image)'
   echo  '* zImage       - stripped kernel image ($(boot)/zImage)'
+  echo  '  uImage       - U-Boot SPARC32 Image (only for LEON)'
   echo  '  tftpboot.img - image prepared for tftp'
 endef
 else
index a2c5898..9205416 100644 (file)
@@ -5,6 +5,7 @@
 
 ROOT_IMG       := /usr/src/root.img
 ELFTOAOUT      := elftoaout
+MKIMAGE        := $(srctree)/scripts/mkuboot.sh
 
 hostprogs-y    := piggyback btfixupprep
 targets                := tftpboot.img btfix.o btfix.S image zImage vmlinux.aout
@@ -77,6 +78,36 @@ $(obj)/zImage: $(obj)/image
 $(obj)/vmlinux.aout: vmlinux FORCE
        $(call if_changed,elftoaout)
        @echo '  kernel: $@ is ready'
+else
+
+# The following lines make a readable image for U-Boot.
+#  uImage   - Binary file read by U-boot
+#  uImage.o - object file of uImage for loading with a
+#             flash programmer understanding ELF.
+
+OBJCOPYFLAGS_image.bin := -S -O binary -R .note -R .comment
+$(obj)/image.bin: $(obj)/image FORCE
+       $(call if_changed,objcopy)
+
+$(obj)/image.gz: $(obj)/image.bin
+       $(call if_changed,gzip)
+
+quiet_cmd_uimage = UIMAGE  $@
+      cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sparc -O linux -T kernel \
+               -C gzip -a $(CONFIG_UBOOT_LOAD_ADDR) \
+              -e $(CONFIG_UBOOT_ENTRY_ADDR) -n 'Linux-$(KERNELRELEASE)' \
+               -d $< $@
+
+quiet_cmd_uimage.o = UIMAGE.O $@
+      cmd_uimage.o = $(LD) -Tdata $(CONFIG_UBOOT_FLASH_ADDR) \
+                     -r -b binary $@ -o $@.o
+
+targets += uImage
+$(obj)/uImage: $(obj)/image.gz
+       $(call if_changed,uimage)
+       $(call if_changed,uimage.o)
+       @echo '  Image $@ is ready'
+
 endif
 
 $(obj)/tftpboot.img: $(obj)/image $(obj)/piggyback System.map $(ROOT_IMG) FORCE
index a0b443c..4f09666 100644 (file)
 
 /* The largest number of unique interrupt sources we support.
  * If this needs to ever be larger than 255, you need to change
- * the type of ino_bucket->virt_irq as appropriate.
+ * the type of ino_bucket->irq as appropriate.
  *
- * ino_bucket->virt_irq allocation is made during {sun4v_,}build_irq().
+ * ino_bucket->irq allocation is made during {sun4v_,}build_irq().
  */
 #define NR_IRQS    255
 
-extern void irq_install_pre_handler(int virt_irq,
+extern void irq_install_pre_handler(int irq,
                                    void (*func)(unsigned int, void *, void *),
                                    void *arg1, void *arg2);
 #define irq_canonicalize(irq)  (irq)
 extern unsigned int build_irq(int inofixup, unsigned long iclr, unsigned long imap);
 extern unsigned int sun4v_build_irq(u32 devhandle, unsigned int devino);
 extern unsigned int sun4v_build_virq(u32 devhandle, unsigned int devino);
-extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *virt_irq_p,
+extern unsigned int sun4v_build_msi(u32 devhandle, unsigned int *irq_p,
                                    unsigned int msi_devino_start,
                                    unsigned int msi_devino_end);
-extern void sun4v_destroy_msi(unsigned int virt_irq);
-extern unsigned int sun4u_build_msi(u32 portid, unsigned int *virt_irq_p,
+extern void sun4v_destroy_msi(unsigned int irq);
+extern unsigned int sun4u_build_msi(u32 portid, unsigned int *irq_p,
                                    unsigned int msi_devino_start,
                                    unsigned int msi_devino_end,
                                    unsigned long imap_base,
                                    unsigned long iclr_base);
-extern void sun4u_destroy_msi(unsigned int virt_irq);
+extern void sun4u_destroy_msi(unsigned int irq);
 
-extern unsigned char virt_irq_alloc(unsigned int dev_handle,
+extern unsigned char irq_alloc(unsigned int dev_handle,
                                    unsigned int dev_ino);
 #ifdef CONFIG_PCI_MSI
-extern void virt_irq_free(unsigned int virt_irq);
+extern void irq_free(unsigned int irq);
 #endif
 
 extern void __init init_IRQ(void);
index 8580d17..c04f96f 100644 (file)
@@ -375,9 +375,6 @@ void leon_enable_irq_cpu(unsigned int irq_nr, unsigned int cpu);
 
 extern unsigned int real_irq_entry[], smpleon_ticker[];
 extern unsigned int patchme_maybe_smp_msg[];
-extern unsigned long trapbase_cpu1[];
-extern unsigned long trapbase_cpu2[];
-extern unsigned long trapbase_cpu3[];
 extern unsigned int t_nmi[], linux_trap_ipi15_leon[];
 extern unsigned int linux_trap_ipi15_sun4m[];
 
index 263c719..e50f326 100644 (file)
@@ -180,6 +180,7 @@ struct amba_ahb_device {
 struct device_node;
 void _amba_init(struct device_node *dp, struct device_node ***nextp);
 
+extern unsigned long amba_system_id;
 extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
 extern struct leon3_gptimer_regs_map *leon3_gptimer_regs;
 extern struct amba_apb_device leon_percpu_timer_dev[16];
@@ -254,6 +255,11 @@ extern unsigned int sparc_leon_eirq;
 #define GAISLER_L2C      0xffe /* internal device: leon2compat */
 #define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
 
+/* Chip IDs */
+#define AEROFLEX_UT699    0x0699
+#define LEON4_NEXTREME1   0x0102
+#define GAISLER_GR712RC   0x0712
+
 #define amba_vendor(x) (((x) >> 24) & 0xff)
 
 #define amba_device(x) (((x) >> 12) & 0xfff)
index ccd36d2..6f056e5 100644 (file)
@@ -4,4 +4,7 @@
 /* Default "unsigned long" context */
 typedef unsigned long mm_context_t;
 
+/* mm/srmmu.c */
+extern ctxd_t *srmmu_ctx_table_phys;
+
 #endif
index 841905c..d82d7f4 100644 (file)
  */
 
 extern unsigned char boot_cpu_id;
+extern volatile unsigned long cpu_callin_map[NR_CPUS];
+extern cpumask_t smp_commenced_mask;
+extern struct linux_prom_registers smp_penguin_ctable;
 
 typedef void (*smpfunc_t)(unsigned long, unsigned long, unsigned long,
                       unsigned long, unsigned long);
 
+void cpu_panic(void);
+extern void smp4m_irq_rotate(int cpu);
+
 /*
  *     General functions that each host system must provide.
  */
index 599398f..99aa4db 100644 (file)
@@ -42,7 +42,6 @@ obj-$(CONFIG_SPARC32)   += windows.o
 obj-y                   += cpu.o
 obj-$(CONFIG_SPARC32)   += devices.o
 obj-$(CONFIG_SPARC32)   += tadpole.o
-obj-$(CONFIG_SPARC32)   += tick14.o
 obj-y                   += ptrace_$(BITS).o
 obj-y                   += unaligned_$(BITS).o
 obj-y                   += una_asm_$(BITS).o
@@ -54,6 +53,7 @@ obj-y                   += of_device_$(BITS).o
 obj-$(CONFIG_SPARC64)   += prom_irqtrans.o
 
 obj-$(CONFIG_SPARC_LEON)+= leon_kernel.o
+obj-$(CONFIG_SPARC_LEON)+= leon_pmc.o
 
 obj-$(CONFIG_SPARC64)   += reboot.o
 obj-$(CONFIG_SPARC64)   += sysfs.o
index 0dc714f..7925c54 100644 (file)
@@ -324,7 +324,7 @@ void __cpuinit cpu_probe(void)
        psr = get_psr();
        put_psr(psr | PSR_EF);
 #ifdef CONFIG_SPARC_LEON
-       fpu_vers = 7;
+       fpu_vers = get_psr() & PSR_EF ? ((get_fsr() >> 17) & 0x7) : 7;
 #else
        fpu_vers = ((get_fsr() >> 17) & 0x7);
 #endif
index c011b93..d1f1361 100644 (file)
@@ -213,8 +213,8 @@ extern struct cheetah_err_info *cheetah_error_log;
 struct ino_bucket {
 /*0x00*/unsigned long __irq_chain_pa;
 
-       /* Virtual interrupt number assigned to this INO.  */
-/*0x08*/unsigned int __virt_irq;
+       /* Interrupt number assigned to this INO.  */
+/*0x08*/unsigned int __irq;
 /*0x0c*/unsigned int __pad;
 };
 
index 72509d0..6f01e8c 100644 (file)
@@ -333,13 +333,10 @@ static void dma_4u_free_coherent(struct device *dev, size_t size,
                                 void *cpu, dma_addr_t dvma)
 {
        struct iommu *iommu;
-       iopte_t *iopte;
        unsigned long flags, order, npages;
 
        npages = IO_PAGE_ALIGN(size) >> IO_PAGE_SHIFT;
        iommu = dev->archdata.iommu;
-       iopte = iommu->page_table +
-               ((dvma - iommu->page_table_map_base) >> IO_PAGE_SHIFT);
 
        spin_lock_irqsave(&iommu->lock, flags);
 
index 41f7e4e..c6ce9a6 100644 (file)
 #include <asm/io-unit.h>
 #include <asm/leon.h>
 
-#ifdef CONFIG_SPARC_LEON
-#define mmu_inval_dma_area(p, l) leon_flush_dcache_all()
-#else
+#ifndef CONFIG_SPARC_LEON
 #define mmu_inval_dma_area(p, l)       /* Anton pulled it out for 2.4.0-xx */
+#else
+static inline void mmu_inval_dma_area(void *va, unsigned long len)
+{
+       if (!sparc_leon3_snooping_enabled())
+               leon_flush_dcache_all();
+}
 #endif
 
 static struct resource *_sparc_find_resource(struct resource *r,
@@ -254,7 +258,7 @@ static void *sbus_alloc_coherent(struct device *dev, size_t len,
                                 dma_addr_t *dma_addrp, gfp_t gfp)
 {
        struct platform_device *op = to_platform_device(dev);
-       unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
+       unsigned long len_total = PAGE_ALIGN(len);
        unsigned long va;
        struct resource *res;
        int order;
@@ -280,7 +284,8 @@ static void *sbus_alloc_coherent(struct device *dev, size_t len,
                printk("sbus_alloc_consistent: cannot occupy 0x%lx", len_total);
                goto err_nova;
        }
-       mmu_inval_dma_area(va, len_total);
+       mmu_inval_dma_area((void *)va, len_total);
+
        // XXX The mmu_map_dma_area does this for us below, see comments.
        // sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
        /*
@@ -297,9 +302,9 @@ static void *sbus_alloc_coherent(struct device *dev, size_t len,
 err_noiommu:
        release_resource(res);
 err_nova:
-       free_pages(va, order);
-err_nomem:
        kfree(res);
+err_nomem:
+       free_pages(va, order);
 err_nopages:
        return NULL;
 }
@@ -321,7 +326,7 @@ static void sbus_free_coherent(struct device *dev, size_t n, void *p,
                return;
        }
 
-       n = (n + PAGE_SIZE-1) & PAGE_MASK;
+       n = PAGE_ALIGN(n);
        if ((res->end-res->start)+1 != n) {
                printk("sbus_free_consistent: region 0x%lx asked 0x%zx\n",
                    (long)((res->end-res->start)+1), n);
@@ -408,9 +413,6 @@ struct dma_map_ops sbus_dma_ops = {
        .sync_sg_for_device     = sbus_sync_sg_for_device,
 };
 
-struct dma_map_ops *dma_ops = &sbus_dma_ops;
-EXPORT_SYMBOL(dma_ops);
-
 static int __init sparc_register_ioport(void)
 {
        register_proc_sparc_ioport();
@@ -422,7 +424,9 @@ arch_initcall(sparc_register_ioport);
 
 #endif /* CONFIG_SBUS */
 
-#ifdef CONFIG_PCI
+
+/* LEON reuses PCI DMA ops */
+#if defined(CONFIG_PCI) || defined(CONFIG_SPARC_LEON)
 
 /* Allocate and map kernel buffer using consistent mode DMA for a device.
  * hwdev should be valid struct pci_dev pointer for PCI devices.
@@ -430,8 +434,8 @@ arch_initcall(sparc_register_ioport);
 static void *pci32_alloc_coherent(struct device *dev, size_t len,
                                  dma_addr_t *pba, gfp_t gfp)
 {
-       unsigned long len_total = (len + PAGE_SIZE-1) & PAGE_MASK;
-       unsigned long va;
+       unsigned long len_total = PAGE_ALIGN(len);
+       void *va;
        struct resource *res;
        int order;
 
@@ -443,34 +447,34 @@ static void *pci32_alloc_coherent(struct device *dev, size_t len,
        }
 
        order = get_order(len_total);
-       va = __get_free_pages(GFP_KERNEL, order);
-       if (va == 0) {
+       va = (void *) __get_free_pages(GFP_KERNEL, order);
+       if (va == NULL) {
                printk("pci_alloc_consistent: no %ld pages\n", len_total>>PAGE_SHIFT);
-               return NULL;
+               goto err_nopages;
        }
 
        if ((res = kzalloc(sizeof(struct resource), GFP_KERNEL)) == NULL) {
-               free_pages(va, order);
                printk("pci_alloc_consistent: no core\n");
-               return NULL;
+               goto err_nomem;
        }
 
        if (allocate_resource(&_sparc_dvma, res, len_total,
            _sparc_dvma.start, _sparc_dvma.end, PAGE_SIZE, NULL, NULL) != 0) {
                printk("pci_alloc_consistent: cannot occupy 0x%lx", len_total);
-               free_pages(va, order);
-               kfree(res);
-               return NULL;
+               goto err_nova;
        }
        mmu_inval_dma_area(va, len_total);
-#if 0
-/* P3 */ printk("pci_alloc_consistent: kva %lx uncva %lx phys %lx size %lx\n",
-  (long)va, (long)res->start, (long)virt_to_phys(va), len_total);
-#endif
        sparc_mapiorange(0, virt_to_phys(va), res->start, len_total);
 
        *pba = virt_to_phys(va); /* equals virt_to_bus (R.I.P.) for us. */
        return (void *) res->start;
+
+err_nova:
+       kfree(res);
+err_nomem:
+       free_pages((unsigned long)va, order);
+err_nopages:
+       return NULL;
 }
 
 /* Free and unmap a consistent DMA buffer.
@@ -485,7 +489,7 @@ static void pci32_free_coherent(struct device *dev, size_t n, void *p,
                                dma_addr_t ba)
 {
        struct resource *res;
-       unsigned long pgp;
+       void *pgp;
 
        if ((res = _sparc_find_resource(&_sparc_dvma,
            (unsigned long)p)) == NULL) {
@@ -498,21 +502,21 @@ static void pci32_free_coherent(struct device *dev, size_t n, void *p,
                return;
        }
 
-       n = (n + PAGE_SIZE-1) & PAGE_MASK;
+       n = PAGE_ALIGN(n);
        if ((res->end-res->start)+1 != n) {
                printk("pci_free_consistent: region 0x%lx asked 0x%lx\n",
                    (long)((res->end-res->start)+1), (long)n);
                return;
        }
 
-       pgp = (unsigned long) phys_to_virt(ba); /* bus_to_virt actually */
+       pgp = phys_to_virt(ba); /* bus_to_virt actually */
        mmu_inval_dma_area(pgp, n);
        sparc_unmapiorange((unsigned long)p, n);
 
        release_resource(res);
        kfree(res);